| Apurva Nandan | 3818b14 | 2024-02-24 01:51:49 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* |
| 3 | * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ |
| 4 | * This file was generated by the Jacinto7_DDRSS_RegConfigTool, Revision: 0.10.0 |
| 5 | * This file was generated on 04/12/2023 |
| 6 | */ |
| 7 | |
| 8 | #define DDRSS_PLL_FHS_CNT 10 |
| 9 | #define DDRSS_PLL_FREQUENCY_0 27500000 |
| 10 | #define DDRSS_PLL_FREQUENCY_1 1066500000 |
| 11 | #define DDRSS_PLL_FREQUENCY_2 1066500000 |
| 12 | |
| 13 | #define MULTI_DDR_CFG_INTRLV_GRAN 0 |
| 14 | #define MULTI_DDR_CFG_INTRLV_SIZE 12 |
| 15 | #define MULTI_DDR_CFG_ECC_ENABLE 0 |
| 16 | #define MULTI_DDR_CFG_HYBRID_SELECT 24 |
| 17 | #define MULTI_DDR_CFG_EMIFS_ACTIVE 15 |
| 18 | |
| 19 | #define DDRSS0_CTL_00_DATA 0x00000B00 |
| 20 | #define DDRSS0_CTL_01_DATA 0x00000000 |
| 21 | #define DDRSS0_CTL_02_DATA 0x00000000 |
| 22 | #define DDRSS0_CTL_03_DATA 0x00000000 |
| 23 | #define DDRSS0_CTL_04_DATA 0x00000000 |
| 24 | #define DDRSS0_CTL_05_DATA 0x00000000 |
| 25 | #define DDRSS0_CTL_06_DATA 0x00000000 |
| 26 | #define DDRSS0_CTL_07_DATA 0x00002AF8 |
| 27 | #define DDRSS0_CTL_08_DATA 0x0001ADAF |
| 28 | #define DDRSS0_CTL_09_DATA 0x00000005 |
| 29 | #define DDRSS0_CTL_10_DATA 0x0000006E |
| 30 | #define DDRSS0_CTL_11_DATA 0x000681C8 |
| 31 | #define DDRSS0_CTL_12_DATA 0x004111C9 |
| 32 | #define DDRSS0_CTL_13_DATA 0x00000005 |
| 33 | #define DDRSS0_CTL_14_DATA 0x000010A9 |
| 34 | #define DDRSS0_CTL_15_DATA 0x000681C8 |
| 35 | #define DDRSS0_CTL_16_DATA 0x004111C9 |
| 36 | #define DDRSS0_CTL_17_DATA 0x00000005 |
| 37 | #define DDRSS0_CTL_18_DATA 0x000010A9 |
| 38 | #define DDRSS0_CTL_19_DATA 0x01010000 |
| 39 | #define DDRSS0_CTL_20_DATA 0x02011001 |
| 40 | #define DDRSS0_CTL_21_DATA 0x02010000 |
| 41 | #define DDRSS0_CTL_22_DATA 0x00020100 |
| 42 | #define DDRSS0_CTL_23_DATA 0x0000000B |
| 43 | #define DDRSS0_CTL_24_DATA 0x0000001C |
| 44 | #define DDRSS0_CTL_25_DATA 0x00000000 |
| 45 | #define DDRSS0_CTL_26_DATA 0x00000000 |
| 46 | #define DDRSS0_CTL_27_DATA 0x03020200 |
| 47 | #define DDRSS0_CTL_28_DATA 0x00005656 |
| 48 | #define DDRSS0_CTL_29_DATA 0x00100000 |
| 49 | #define DDRSS0_CTL_30_DATA 0x00000000 |
| 50 | #define DDRSS0_CTL_31_DATA 0x00000000 |
| 51 | #define DDRSS0_CTL_32_DATA 0x00000000 |
| 52 | #define DDRSS0_CTL_33_DATA 0x00000000 |
| 53 | #define DDRSS0_CTL_34_DATA 0x040C0000 |
| 54 | #define DDRSS0_CTL_35_DATA 0x12481248 |
| 55 | #define DDRSS0_CTL_36_DATA 0x00050804 |
| 56 | #define DDRSS0_CTL_37_DATA 0x09040008 |
| 57 | #define DDRSS0_CTL_38_DATA 0x15000204 |
| 58 | #define DDRSS0_CTL_39_DATA 0x1760008B |
| 59 | #define DDRSS0_CTL_40_DATA 0x1500422B |
| 60 | #define DDRSS0_CTL_41_DATA 0x1760008B |
| 61 | #define DDRSS0_CTL_42_DATA 0x2000422B |
| 62 | #define DDRSS0_CTL_43_DATA 0x000A0A09 |
| 63 | #define DDRSS0_CTL_44_DATA 0x040003C5 |
| 64 | #define DDRSS0_CTL_45_DATA 0x1E161104 |
| 65 | #define DDRSS0_CTL_46_DATA 0x1000922C |
| 66 | #define DDRSS0_CTL_47_DATA 0x1E161110 |
| 67 | #define DDRSS0_CTL_48_DATA 0x1000922C |
| 68 | #define DDRSS0_CTL_49_DATA 0x02030410 |
| 69 | #define DDRSS0_CTL_50_DATA 0x2C040500 |
| 70 | #define DDRSS0_CTL_51_DATA 0x08292C29 |
| 71 | #define DDRSS0_CTL_52_DATA 0x14000E0A |
| 72 | #define DDRSS0_CTL_53_DATA 0x04010A0A |
| 73 | #define DDRSS0_CTL_54_DATA 0x01010004 |
| 74 | #define DDRSS0_CTL_55_DATA 0x04545408 |
| 75 | #define DDRSS0_CTL_56_DATA 0x04313104 |
| 76 | #define DDRSS0_CTL_57_DATA 0x00003131 |
| 77 | #define DDRSS0_CTL_58_DATA 0x00010100 |
| 78 | #define DDRSS0_CTL_59_DATA 0x03010000 |
| 79 | #define DDRSS0_CTL_60_DATA 0x00001508 |
| 80 | #define DDRSS0_CTL_61_DATA 0x00000063 |
| 81 | #define DDRSS0_CTL_62_DATA 0x0000032B |
| 82 | #define DDRSS0_CTL_63_DATA 0x00001035 |
| 83 | #define DDRSS0_CTL_64_DATA 0x0000032B |
| 84 | #define DDRSS0_CTL_65_DATA 0x00001035 |
| 85 | #define DDRSS0_CTL_66_DATA 0x00000005 |
| 86 | #define DDRSS0_CTL_67_DATA 0x00050000 |
| 87 | #define DDRSS0_CTL_68_DATA 0x00CB0012 |
| 88 | #define DDRSS0_CTL_69_DATA 0x00CB0408 |
| 89 | #define DDRSS0_CTL_70_DATA 0x00400408 |
| 90 | #define DDRSS0_CTL_71_DATA 0x00120103 |
| 91 | #define DDRSS0_CTL_72_DATA 0x00100005 |
| 92 | #define DDRSS0_CTL_73_DATA 0x2F080010 |
| 93 | #define DDRSS0_CTL_74_DATA 0x0505012F |
| 94 | #define DDRSS0_CTL_75_DATA 0x0401030A |
| 95 | #define DDRSS0_CTL_76_DATA 0x041E100B |
| 96 | #define DDRSS0_CTL_77_DATA 0x100B0401 |
| 97 | #define DDRSS0_CTL_78_DATA 0x0001041E |
| 98 | #define DDRSS0_CTL_79_DATA 0x00160016 |
| 99 | #define DDRSS0_CTL_80_DATA 0x033B033B |
| 100 | #define DDRSS0_CTL_81_DATA 0x033B033B |
| 101 | #define DDRSS0_CTL_82_DATA 0x03050505 |
| 102 | #define DDRSS0_CTL_83_DATA 0x03010303 |
| 103 | #define DDRSS0_CTL_84_DATA 0x200B100B |
| 104 | #define DDRSS0_CTL_85_DATA 0x04041004 |
| 105 | #define DDRSS0_CTL_86_DATA 0x200B100B |
| 106 | #define DDRSS0_CTL_87_DATA 0x04041004 |
| 107 | #define DDRSS0_CTL_88_DATA 0x03010000 |
| 108 | #define DDRSS0_CTL_89_DATA 0x00010000 |
| 109 | #define DDRSS0_CTL_90_DATA 0x00000000 |
| 110 | #define DDRSS0_CTL_91_DATA 0x00000000 |
| 111 | #define DDRSS0_CTL_92_DATA 0x01000000 |
| 112 | #define DDRSS0_CTL_93_DATA 0x80104002 |
| 113 | #define DDRSS0_CTL_94_DATA 0x00000000 |
| 114 | #define DDRSS0_CTL_95_DATA 0x00040005 |
| 115 | #define DDRSS0_CTL_96_DATA 0x00000000 |
| 116 | #define DDRSS0_CTL_97_DATA 0x00050000 |
| 117 | #define DDRSS0_CTL_98_DATA 0x00000004 |
| 118 | #define DDRSS0_CTL_99_DATA 0x00000000 |
| 119 | #define DDRSS0_CTL_100_DATA 0x00040005 |
| 120 | #define DDRSS0_CTL_101_DATA 0x00000000 |
| 121 | #define DDRSS0_CTL_102_DATA 0x000018C0 |
| 122 | #define DDRSS0_CTL_103_DATA 0x000018C0 |
| 123 | #define DDRSS0_CTL_104_DATA 0x000018C0 |
| 124 | #define DDRSS0_CTL_105_DATA 0x000018C0 |
| 125 | #define DDRSS0_CTL_106_DATA 0x000018C0 |
| 126 | #define DDRSS0_CTL_107_DATA 0x00000000 |
| 127 | #define DDRSS0_CTL_108_DATA 0x000002B5 |
| 128 | #define DDRSS0_CTL_109_DATA 0x00040D40 |
| 129 | #define DDRSS0_CTL_110_DATA 0x00040D40 |
| 130 | #define DDRSS0_CTL_111_DATA 0x00040D40 |
| 131 | #define DDRSS0_CTL_112_DATA 0x00040D40 |
| 132 | #define DDRSS0_CTL_113_DATA 0x00040D40 |
| 133 | #define DDRSS0_CTL_114_DATA 0x00000000 |
| 134 | #define DDRSS0_CTL_115_DATA 0x00007173 |
| 135 | #define DDRSS0_CTL_116_DATA 0x00040D40 |
| 136 | #define DDRSS0_CTL_117_DATA 0x00040D40 |
| 137 | #define DDRSS0_CTL_118_DATA 0x00040D40 |
| 138 | #define DDRSS0_CTL_119_DATA 0x00040D40 |
| 139 | #define DDRSS0_CTL_120_DATA 0x00040D40 |
| 140 | #define DDRSS0_CTL_121_DATA 0x00000000 |
| 141 | #define DDRSS0_CTL_122_DATA 0x00007173 |
| 142 | #define DDRSS0_CTL_123_DATA 0x00000000 |
| 143 | #define DDRSS0_CTL_124_DATA 0x00000000 |
| 144 | #define DDRSS0_CTL_125_DATA 0x00000000 |
| 145 | #define DDRSS0_CTL_126_DATA 0x00000000 |
| 146 | #define DDRSS0_CTL_127_DATA 0x00000000 |
| 147 | #define DDRSS0_CTL_128_DATA 0x00000000 |
| 148 | #define DDRSS0_CTL_129_DATA 0x00000000 |
| 149 | #define DDRSS0_CTL_130_DATA 0x00000000 |
| 150 | #define DDRSS0_CTL_131_DATA 0x0B030500 |
| 151 | #define DDRSS0_CTL_132_DATA 0x00040B04 |
| 152 | #define DDRSS0_CTL_133_DATA 0x0A090000 |
| 153 | #define DDRSS0_CTL_134_DATA 0x0A090701 |
| 154 | #define DDRSS0_CTL_135_DATA 0x0900000E |
| 155 | #define DDRSS0_CTL_136_DATA 0x0907010A |
| 156 | #define DDRSS0_CTL_137_DATA 0x00000E0A |
| 157 | #define DDRSS0_CTL_138_DATA 0x07010A09 |
| 158 | #define DDRSS0_CTL_139_DATA 0x000E0A09 |
| 159 | #define DDRSS0_CTL_140_DATA 0x07000401 |
| 160 | #define DDRSS0_CTL_141_DATA 0x00000000 |
| 161 | #define DDRSS0_CTL_142_DATA 0x00000000 |
| 162 | #define DDRSS0_CTL_143_DATA 0x00000000 |
| 163 | #define DDRSS0_CTL_144_DATA 0x00000000 |
| 164 | #define DDRSS0_CTL_145_DATA 0x00000000 |
| 165 | #define DDRSS0_CTL_146_DATA 0x00000000 |
| 166 | #define DDRSS0_CTL_147_DATA 0x00000000 |
| 167 | #define DDRSS0_CTL_148_DATA 0x08080000 |
| 168 | #define DDRSS0_CTL_149_DATA 0x01000000 |
| 169 | #define DDRSS0_CTL_150_DATA 0x800000C0 |
| 170 | #define DDRSS0_CTL_151_DATA 0x800000C0 |
| 171 | #define DDRSS0_CTL_152_DATA 0x800000C0 |
| 172 | #define DDRSS0_CTL_153_DATA 0x00000000 |
| 173 | #define DDRSS0_CTL_154_DATA 0x00001500 |
| 174 | #define DDRSS0_CTL_155_DATA 0x00000000 |
| 175 | #define DDRSS0_CTL_156_DATA 0x00000001 |
| 176 | #define DDRSS0_CTL_157_DATA 0x00000002 |
| 177 | #define DDRSS0_CTL_158_DATA 0x0000100E |
| 178 | #define DDRSS0_CTL_159_DATA 0x00000000 |
| 179 | #define DDRSS0_CTL_160_DATA 0x00000000 |
| 180 | #define DDRSS0_CTL_161_DATA 0x00000000 |
| 181 | #define DDRSS0_CTL_162_DATA 0x00000000 |
| 182 | #define DDRSS0_CTL_163_DATA 0x00000000 |
| 183 | #define DDRSS0_CTL_164_DATA 0x000B0000 |
| 184 | #define DDRSS0_CTL_165_DATA 0x000E0006 |
| 185 | #define DDRSS0_CTL_166_DATA 0x000E0404 |
| 186 | #define DDRSS0_CTL_167_DATA 0x00D601AB |
| 187 | #define DDRSS0_CTL_168_DATA 0x10100216 |
| 188 | #define DDRSS0_CTL_169_DATA 0x01AB0216 |
| 189 | #define DDRSS0_CTL_170_DATA 0x021600D6 |
| 190 | #define DDRSS0_CTL_171_DATA 0x02161010 |
| 191 | #define DDRSS0_CTL_172_DATA 0x00000000 |
| 192 | #define DDRSS0_CTL_173_DATA 0x00000000 |
| 193 | #define DDRSS0_CTL_174_DATA 0x00000000 |
| 194 | #define DDRSS0_CTL_175_DATA 0x3FF40084 |
| 195 | #define DDRSS0_CTL_176_DATA 0x33003FF4 |
| 196 | #define DDRSS0_CTL_177_DATA 0x00003333 |
| 197 | #define DDRSS0_CTL_178_DATA 0x35000000 |
| 198 | #define DDRSS0_CTL_179_DATA 0x27270035 |
| 199 | #define DDRSS0_CTL_180_DATA 0x0F0F0000 |
| 200 | #define DDRSS0_CTL_181_DATA 0x16000000 |
| 201 | #define DDRSS0_CTL_182_DATA 0x00841616 |
| 202 | #define DDRSS0_CTL_183_DATA 0x3FF43FF4 |
| 203 | #define DDRSS0_CTL_184_DATA 0x33333300 |
| 204 | #define DDRSS0_CTL_185_DATA 0x00000000 |
| 205 | #define DDRSS0_CTL_186_DATA 0x00353500 |
| 206 | #define DDRSS0_CTL_187_DATA 0x00002727 |
| 207 | #define DDRSS0_CTL_188_DATA 0x00000F0F |
| 208 | #define DDRSS0_CTL_189_DATA 0x16161600 |
| 209 | #define DDRSS0_CTL_190_DATA 0x00000020 |
| 210 | #define DDRSS0_CTL_191_DATA 0x00000000 |
| 211 | #define DDRSS0_CTL_192_DATA 0x00000001 |
| 212 | #define DDRSS0_CTL_193_DATA 0x00000000 |
| 213 | #define DDRSS0_CTL_194_DATA 0x01000000 |
| 214 | #define DDRSS0_CTL_195_DATA 0x00000001 |
| 215 | #define DDRSS0_CTL_196_DATA 0x00000000 |
| 216 | #define DDRSS0_CTL_197_DATA 0x00000000 |
| 217 | #define DDRSS0_CTL_198_DATA 0x00000000 |
| 218 | #define DDRSS0_CTL_199_DATA 0x00000000 |
| 219 | #define DDRSS0_CTL_200_DATA 0x00000000 |
| 220 | #define DDRSS0_CTL_201_DATA 0x00000000 |
| 221 | #define DDRSS0_CTL_202_DATA 0x00000000 |
| 222 | #define DDRSS0_CTL_203_DATA 0x00000000 |
| 223 | #define DDRSS0_CTL_204_DATA 0x00000000 |
| 224 | #define DDRSS0_CTL_205_DATA 0x00000000 |
| 225 | #define DDRSS0_CTL_206_DATA 0x02000000 |
| 226 | #define DDRSS0_CTL_207_DATA 0x01080101 |
| 227 | #define DDRSS0_CTL_208_DATA 0x00000000 |
| 228 | #define DDRSS0_CTL_209_DATA 0x00000000 |
| 229 | #define DDRSS0_CTL_210_DATA 0x00000000 |
| 230 | #define DDRSS0_CTL_211_DATA 0x00000000 |
| 231 | #define DDRSS0_CTL_212_DATA 0x00000000 |
| 232 | #define DDRSS0_CTL_213_DATA 0x00000000 |
| 233 | #define DDRSS0_CTL_214_DATA 0x00000000 |
| 234 | #define DDRSS0_CTL_215_DATA 0x00000000 |
| 235 | #define DDRSS0_CTL_216_DATA 0x00000000 |
| 236 | #define DDRSS0_CTL_217_DATA 0x00000000 |
| 237 | #define DDRSS0_CTL_218_DATA 0x00000000 |
| 238 | #define DDRSS0_CTL_219_DATA 0x00000000 |
| 239 | #define DDRSS0_CTL_220_DATA 0x00000000 |
| 240 | #define DDRSS0_CTL_221_DATA 0x00000000 |
| 241 | #define DDRSS0_CTL_222_DATA 0x00001000 |
| 242 | #define DDRSS0_CTL_223_DATA 0x006403E8 |
| 243 | #define DDRSS0_CTL_224_DATA 0x00000000 |
| 244 | #define DDRSS0_CTL_225_DATA 0x00000000 |
| 245 | #define DDRSS0_CTL_226_DATA 0x00000000 |
| 246 | #define DDRSS0_CTL_227_DATA 0x15110000 |
| 247 | #define DDRSS0_CTL_228_DATA 0x00040C18 |
| 248 | #define DDRSS0_CTL_229_DATA 0xF000C000 |
| 249 | #define DDRSS0_CTL_230_DATA 0x0000F000 |
| 250 | #define DDRSS0_CTL_231_DATA 0x00000000 |
| 251 | #define DDRSS0_CTL_232_DATA 0x00000000 |
| 252 | #define DDRSS0_CTL_233_DATA 0xC0000000 |
| 253 | #define DDRSS0_CTL_234_DATA 0xF000F000 |
| 254 | #define DDRSS0_CTL_235_DATA 0x00000000 |
| 255 | #define DDRSS0_CTL_236_DATA 0x00000000 |
| 256 | #define DDRSS0_CTL_237_DATA 0x00000000 |
| 257 | #define DDRSS0_CTL_238_DATA 0xF000C000 |
| 258 | #define DDRSS0_CTL_239_DATA 0x0000F000 |
| 259 | #define DDRSS0_CTL_240_DATA 0x00000000 |
| 260 | #define DDRSS0_CTL_241_DATA 0x00000000 |
| 261 | #define DDRSS0_CTL_242_DATA 0x00030000 |
| 262 | #define DDRSS0_CTL_243_DATA 0x00000000 |
| 263 | #define DDRSS0_CTL_244_DATA 0x00000000 |
| 264 | #define DDRSS0_CTL_245_DATA 0x00000000 |
| 265 | #define DDRSS0_CTL_246_DATA 0x00000000 |
| 266 | #define DDRSS0_CTL_247_DATA 0x00000000 |
| 267 | #define DDRSS0_CTL_248_DATA 0x00000000 |
| 268 | #define DDRSS0_CTL_249_DATA 0x00000000 |
| 269 | #define DDRSS0_CTL_250_DATA 0x00000000 |
| 270 | #define DDRSS0_CTL_251_DATA 0x00000000 |
| 271 | #define DDRSS0_CTL_252_DATA 0x00000000 |
| 272 | #define DDRSS0_CTL_253_DATA 0x00000000 |
| 273 | #define DDRSS0_CTL_254_DATA 0x00000000 |
| 274 | #define DDRSS0_CTL_255_DATA 0x00000000 |
| 275 | #define DDRSS0_CTL_256_DATA 0x00000000 |
| 276 | #define DDRSS0_CTL_257_DATA 0x01000200 |
| 277 | #define DDRSS0_CTL_258_DATA 0x00370040 |
| 278 | #define DDRSS0_CTL_259_DATA 0x00020008 |
| 279 | #define DDRSS0_CTL_260_DATA 0x00400100 |
| 280 | #define DDRSS0_CTL_261_DATA 0x00400855 |
| 281 | #define DDRSS0_CTL_262_DATA 0x01000200 |
| 282 | #define DDRSS0_CTL_263_DATA 0x08550040 |
| 283 | #define DDRSS0_CTL_264_DATA 0x00000040 |
| 284 | #define DDRSS0_CTL_265_DATA 0x006B0003 |
| 285 | #define DDRSS0_CTL_266_DATA 0x0100006B |
| 286 | #define DDRSS0_CTL_267_DATA 0x03030303 |
| 287 | #define DDRSS0_CTL_268_DATA 0x00000000 |
| 288 | #define DDRSS0_CTL_269_DATA 0x00000202 |
| 289 | #define DDRSS0_CTL_270_DATA 0x00001FFF |
| 290 | #define DDRSS0_CTL_271_DATA 0x3FFF2000 |
| 291 | #define DDRSS0_CTL_272_DATA 0x03FF0000 |
| 292 | #define DDRSS0_CTL_273_DATA 0x000103FF |
| 293 | #define DDRSS0_CTL_274_DATA 0x0FFF0B00 |
| 294 | #define DDRSS0_CTL_275_DATA 0x01010001 |
| 295 | #define DDRSS0_CTL_276_DATA 0x01010101 |
| 296 | #define DDRSS0_CTL_277_DATA 0x01180101 |
| 297 | #define DDRSS0_CTL_278_DATA 0x00030000 |
| 298 | #define DDRSS0_CTL_279_DATA 0x00000000 |
| 299 | #define DDRSS0_CTL_280_DATA 0x00000000 |
| 300 | #define DDRSS0_CTL_281_DATA 0x00000000 |
| 301 | #define DDRSS0_CTL_282_DATA 0x00000000 |
| 302 | #define DDRSS0_CTL_283_DATA 0x00000000 |
| 303 | #define DDRSS0_CTL_284_DATA 0x00000000 |
| 304 | #define DDRSS0_CTL_285_DATA 0x00000000 |
| 305 | #define DDRSS0_CTL_286_DATA 0x00040101 |
| 306 | #define DDRSS0_CTL_287_DATA 0x04010100 |
| 307 | #define DDRSS0_CTL_288_DATA 0x00000000 |
| 308 | #define DDRSS0_CTL_289_DATA 0x00000000 |
| 309 | #define DDRSS0_CTL_290_DATA 0x03030300 |
| 310 | #define DDRSS0_CTL_291_DATA 0x00000001 |
| 311 | #define DDRSS0_CTL_292_DATA 0x00000000 |
| 312 | #define DDRSS0_CTL_293_DATA 0x00000000 |
| 313 | #define DDRSS0_CTL_294_DATA 0x00000000 |
| 314 | #define DDRSS0_CTL_295_DATA 0x00000000 |
| 315 | #define DDRSS0_CTL_296_DATA 0x00000000 |
| 316 | #define DDRSS0_CTL_297_DATA 0x00000000 |
| 317 | #define DDRSS0_CTL_298_DATA 0x00000000 |
| 318 | #define DDRSS0_CTL_299_DATA 0x00000000 |
| 319 | #define DDRSS0_CTL_300_DATA 0x00000000 |
| 320 | #define DDRSS0_CTL_301_DATA 0x00000000 |
| 321 | #define DDRSS0_CTL_302_DATA 0x00000000 |
| 322 | #define DDRSS0_CTL_303_DATA 0x00000000 |
| 323 | #define DDRSS0_CTL_304_DATA 0x00000000 |
| 324 | #define DDRSS0_CTL_305_DATA 0x00000000 |
| 325 | #define DDRSS0_CTL_306_DATA 0x00000000 |
| 326 | #define DDRSS0_CTL_307_DATA 0x00000000 |
| 327 | #define DDRSS0_CTL_308_DATA 0x00000000 |
| 328 | #define DDRSS0_CTL_309_DATA 0x00000000 |
| 329 | #define DDRSS0_CTL_310_DATA 0x00000000 |
| 330 | #define DDRSS0_CTL_311_DATA 0x00000000 |
| 331 | #define DDRSS0_CTL_312_DATA 0x00000000 |
| 332 | #define DDRSS0_CTL_313_DATA 0x01000000 |
| 333 | #define DDRSS0_CTL_314_DATA 0x00020201 |
| 334 | #define DDRSS0_CTL_315_DATA 0x01000101 |
| 335 | #define DDRSS0_CTL_316_DATA 0x01010001 |
| 336 | #define DDRSS0_CTL_317_DATA 0x00010101 |
| 337 | #define DDRSS0_CTL_318_DATA 0x050A0A03 |
| 338 | #define DDRSS0_CTL_319_DATA 0x10081F1F |
| 339 | #define DDRSS0_CTL_320_DATA 0x00090310 |
| 340 | #define DDRSS0_CTL_321_DATA 0x0B0C030F |
| 341 | #define DDRSS0_CTL_322_DATA 0x0B0C0306 |
| 342 | #define DDRSS0_CTL_323_DATA 0x0C090006 |
| 343 | #define DDRSS0_CTL_324_DATA 0x0100000C |
| 344 | #define DDRSS0_CTL_325_DATA 0x08040801 |
| 345 | #define DDRSS0_CTL_326_DATA 0x00000004 |
| 346 | #define DDRSS0_CTL_327_DATA 0x00000000 |
| 347 | #define DDRSS0_CTL_328_DATA 0x00010000 |
| 348 | #define DDRSS0_CTL_329_DATA 0x00280D00 |
| 349 | #define DDRSS0_CTL_330_DATA 0x00000001 |
| 350 | #define DDRSS0_CTL_331_DATA 0x00030001 |
| 351 | #define DDRSS0_CTL_332_DATA 0x00000000 |
| 352 | #define DDRSS0_CTL_333_DATA 0x00000000 |
| 353 | #define DDRSS0_CTL_334_DATA 0x00000000 |
| 354 | #define DDRSS0_CTL_335_DATA 0x00000000 |
| 355 | #define DDRSS0_CTL_336_DATA 0x00000000 |
| 356 | #define DDRSS0_CTL_337_DATA 0x00000000 |
| 357 | #define DDRSS0_CTL_338_DATA 0x00000000 |
| 358 | #define DDRSS0_CTL_339_DATA 0x00000000 |
| 359 | #define DDRSS0_CTL_340_DATA 0x01000000 |
| 360 | #define DDRSS0_CTL_341_DATA 0x00000001 |
| 361 | #define DDRSS0_CTL_342_DATA 0x00010100 |
| 362 | #define DDRSS0_CTL_343_DATA 0x03030000 |
| 363 | #define DDRSS0_CTL_344_DATA 0x00000000 |
| 364 | #define DDRSS0_CTL_345_DATA 0x00000000 |
| 365 | #define DDRSS0_CTL_346_DATA 0x00000000 |
| 366 | #define DDRSS0_CTL_347_DATA 0x00000000 |
| 367 | #define DDRSS0_CTL_348_DATA 0x00000000 |
| 368 | #define DDRSS0_CTL_349_DATA 0x00000000 |
| 369 | #define DDRSS0_CTL_350_DATA 0x00000000 |
| 370 | #define DDRSS0_CTL_351_DATA 0x00000000 |
| 371 | #define DDRSS0_CTL_352_DATA 0x00000000 |
| 372 | #define DDRSS0_CTL_353_DATA 0x00000000 |
| 373 | #define DDRSS0_CTL_354_DATA 0x00000000 |
| 374 | #define DDRSS0_CTL_355_DATA 0x00000000 |
| 375 | #define DDRSS0_CTL_356_DATA 0x00000000 |
| 376 | #define DDRSS0_CTL_357_DATA 0x00000000 |
| 377 | #define DDRSS0_CTL_358_DATA 0x00000000 |
| 378 | #define DDRSS0_CTL_359_DATA 0x00000000 |
| 379 | #define DDRSS0_CTL_360_DATA 0x000556AA |
| 380 | #define DDRSS0_CTL_361_DATA 0x000AAAAA |
| 381 | #define DDRSS0_CTL_362_DATA 0x000AA955 |
| 382 | #define DDRSS0_CTL_363_DATA 0x00055555 |
| 383 | #define DDRSS0_CTL_364_DATA 0x000B3133 |
| 384 | #define DDRSS0_CTL_365_DATA 0x0004CD33 |
| 385 | #define DDRSS0_CTL_366_DATA 0x0004CECC |
| 386 | #define DDRSS0_CTL_367_DATA 0x000B32CC |
| 387 | #define DDRSS0_CTL_368_DATA 0x00010300 |
| 388 | #define DDRSS0_CTL_369_DATA 0x03000100 |
| 389 | #define DDRSS0_CTL_370_DATA 0x00000000 |
| 390 | #define DDRSS0_CTL_371_DATA 0x00000000 |
| 391 | #define DDRSS0_CTL_372_DATA 0x00000000 |
| 392 | #define DDRSS0_CTL_373_DATA 0x00000000 |
| 393 | #define DDRSS0_CTL_374_DATA 0x00000000 |
| 394 | #define DDRSS0_CTL_375_DATA 0x00000000 |
| 395 | #define DDRSS0_CTL_376_DATA 0x00000000 |
| 396 | #define DDRSS0_CTL_377_DATA 0x00010000 |
| 397 | #define DDRSS0_CTL_378_DATA 0x00000404 |
| 398 | #define DDRSS0_CTL_379_DATA 0x00000000 |
| 399 | #define DDRSS0_CTL_380_DATA 0x00000000 |
| 400 | #define DDRSS0_CTL_381_DATA 0x00000000 |
| 401 | #define DDRSS0_CTL_382_DATA 0x00000000 |
| 402 | #define DDRSS0_CTL_383_DATA 0x00000000 |
| 403 | #define DDRSS0_CTL_384_DATA 0x00000000 |
| 404 | #define DDRSS0_CTL_385_DATA 0x00000000 |
| 405 | #define DDRSS0_CTL_386_DATA 0x00000000 |
| 406 | #define DDRSS0_CTL_387_DATA 0x3A3A1B00 |
| 407 | #define DDRSS0_CTL_388_DATA 0x000A0000 |
| 408 | #define DDRSS0_CTL_389_DATA 0x000000C6 |
| 409 | #define DDRSS0_CTL_390_DATA 0x00000200 |
| 410 | #define DDRSS0_CTL_391_DATA 0x00000200 |
| 411 | #define DDRSS0_CTL_392_DATA 0x00000200 |
| 412 | #define DDRSS0_CTL_393_DATA 0x00000200 |
| 413 | #define DDRSS0_CTL_394_DATA 0x00000252 |
| 414 | #define DDRSS0_CTL_395_DATA 0x000007BC |
| 415 | #define DDRSS0_CTL_396_DATA 0x00000204 |
| 416 | #define DDRSS0_CTL_397_DATA 0x0000206A |
| 417 | #define DDRSS0_CTL_398_DATA 0x00000200 |
| 418 | #define DDRSS0_CTL_399_DATA 0x00000200 |
| 419 | #define DDRSS0_CTL_400_DATA 0x00000200 |
| 420 | #define DDRSS0_CTL_401_DATA 0x00000200 |
| 421 | #define DDRSS0_CTL_402_DATA 0x0000613E |
| 422 | #define DDRSS0_CTL_403_DATA 0x00014424 |
| 423 | #define DDRSS0_CTL_404_DATA 0x00000E15 |
| 424 | #define DDRSS0_CTL_405_DATA 0x0000206A |
| 425 | #define DDRSS0_CTL_406_DATA 0x00000200 |
| 426 | #define DDRSS0_CTL_407_DATA 0x00000200 |
| 427 | #define DDRSS0_CTL_408_DATA 0x00000200 |
| 428 | #define DDRSS0_CTL_409_DATA 0x00000200 |
| 429 | #define DDRSS0_CTL_410_DATA 0x0000613E |
| 430 | #define DDRSS0_CTL_411_DATA 0x00014424 |
| 431 | #define DDRSS0_CTL_412_DATA 0x02020E15 |
| 432 | #define DDRSS0_CTL_413_DATA 0x03030202 |
| 433 | #define DDRSS0_CTL_414_DATA 0x00000022 |
| 434 | #define DDRSS0_CTL_415_DATA 0x00000000 |
| 435 | #define DDRSS0_CTL_416_DATA 0x00000000 |
| 436 | #define DDRSS0_CTL_417_DATA 0x00001403 |
| 437 | #define DDRSS0_CTL_418_DATA 0x000007D0 |
| 438 | #define DDRSS0_CTL_419_DATA 0x00000000 |
| 439 | #define DDRSS0_CTL_420_DATA 0x00000000 |
| 440 | #define DDRSS0_CTL_421_DATA 0x00030000 |
| 441 | #define DDRSS0_CTL_422_DATA 0x0007001F |
| 442 | #define DDRSS0_CTL_423_DATA 0x001B0033 |
| 443 | #define DDRSS0_CTL_424_DATA 0x001B0033 |
| 444 | #define DDRSS0_CTL_425_DATA 0x00000000 |
| 445 | #define DDRSS0_CTL_426_DATA 0x00000000 |
| 446 | #define DDRSS0_CTL_427_DATA 0x02000000 |
| 447 | #define DDRSS0_CTL_428_DATA 0x01000404 |
| 448 | #define DDRSS0_CTL_429_DATA 0x0B1E0B1E |
| 449 | #define DDRSS0_CTL_430_DATA 0x00000105 |
| 450 | #define DDRSS0_CTL_431_DATA 0x00010101 |
| 451 | #define DDRSS0_CTL_432_DATA 0x00010101 |
| 452 | #define DDRSS0_CTL_433_DATA 0x00010001 |
| 453 | #define DDRSS0_CTL_434_DATA 0x00000101 |
| 454 | #define DDRSS0_CTL_435_DATA 0x02000201 |
| 455 | #define DDRSS0_CTL_436_DATA 0x02010000 |
| 456 | #define DDRSS0_CTL_437_DATA 0x00000200 |
| 457 | #define DDRSS0_CTL_438_DATA 0x28060000 |
| 458 | #define DDRSS0_CTL_439_DATA 0x00000128 |
| 459 | #define DDRSS0_CTL_440_DATA 0xFFFFFFFF |
| 460 | #define DDRSS0_CTL_441_DATA 0xFFFFFFFF |
| 461 | #define DDRSS0_CTL_442_DATA 0x00000000 |
| 462 | #define DDRSS0_CTL_443_DATA 0x00000000 |
| 463 | #define DDRSS0_CTL_444_DATA 0x00000000 |
| 464 | #define DDRSS0_CTL_445_DATA 0x00000000 |
| 465 | #define DDRSS0_CTL_446_DATA 0x00000000 |
| 466 | #define DDRSS0_CTL_447_DATA 0x00000000 |
| 467 | #define DDRSS0_CTL_448_DATA 0x00000000 |
| 468 | #define DDRSS0_CTL_449_DATA 0x00000000 |
| 469 | #define DDRSS0_CTL_450_DATA 0x00000000 |
| 470 | #define DDRSS0_CTL_451_DATA 0x00000000 |
| 471 | #define DDRSS0_CTL_452_DATA 0x00000000 |
| 472 | #define DDRSS0_CTL_453_DATA 0x00000000 |
| 473 | #define DDRSS0_CTL_454_DATA 0x00000000 |
| 474 | #define DDRSS0_CTL_455_DATA 0x00000000 |
| 475 | #define DDRSS0_CTL_456_DATA 0x00000000 |
| 476 | #define DDRSS0_CTL_457_DATA 0x00000000 |
| 477 | #define DDRSS0_CTL_458_DATA 0x00000000 |
| 478 | |
| 479 | #define DDRSS0_PI_00_DATA 0x00000B00 |
| 480 | #define DDRSS0_PI_01_DATA 0x00000000 |
| 481 | #define DDRSS0_PI_02_DATA 0x00000000 |
| 482 | #define DDRSS0_PI_03_DATA 0x00000000 |
| 483 | #define DDRSS0_PI_04_DATA 0x00000000 |
| 484 | #define DDRSS0_PI_05_DATA 0x00000101 |
| 485 | #define DDRSS0_PI_06_DATA 0x00640000 |
| 486 | #define DDRSS0_PI_07_DATA 0x00000001 |
| 487 | #define DDRSS0_PI_08_DATA 0x00000000 |
| 488 | #define DDRSS0_PI_09_DATA 0x00000000 |
| 489 | #define DDRSS0_PI_10_DATA 0x00000000 |
| 490 | #define DDRSS0_PI_11_DATA 0x00000000 |
| 491 | #define DDRSS0_PI_12_DATA 0x00000007 |
| 492 | #define DDRSS0_PI_13_DATA 0x00010002 |
| 493 | #define DDRSS0_PI_14_DATA 0x0800000F |
| 494 | #define DDRSS0_PI_15_DATA 0x00000103 |
| 495 | #define DDRSS0_PI_16_DATA 0x00000005 |
| 496 | #define DDRSS0_PI_17_DATA 0x00000000 |
| 497 | #define DDRSS0_PI_18_DATA 0x00000000 |
| 498 | #define DDRSS0_PI_19_DATA 0x00000000 |
| 499 | #define DDRSS0_PI_20_DATA 0x00000000 |
| 500 | #define DDRSS0_PI_21_DATA 0x00000000 |
| 501 | #define DDRSS0_PI_22_DATA 0x00000000 |
| 502 | #define DDRSS0_PI_23_DATA 0x00000000 |
| 503 | #define DDRSS0_PI_24_DATA 0x00000000 |
| 504 | #define DDRSS0_PI_25_DATA 0x00000000 |
| 505 | #define DDRSS0_PI_26_DATA 0x00010100 |
| 506 | #define DDRSS0_PI_27_DATA 0x00280A00 |
| 507 | #define DDRSS0_PI_28_DATA 0x00000000 |
| 508 | #define DDRSS0_PI_29_DATA 0x0F000000 |
| 509 | #define DDRSS0_PI_30_DATA 0x00003200 |
| 510 | #define DDRSS0_PI_31_DATA 0x00000000 |
| 511 | #define DDRSS0_PI_32_DATA 0x00000000 |
| 512 | #define DDRSS0_PI_33_DATA 0x01010102 |
| 513 | #define DDRSS0_PI_34_DATA 0x00000000 |
| 514 | #define DDRSS0_PI_35_DATA 0x000000AA |
| 515 | #define DDRSS0_PI_36_DATA 0x00000055 |
| 516 | #define DDRSS0_PI_37_DATA 0x000000B5 |
| 517 | #define DDRSS0_PI_38_DATA 0x0000004A |
| 518 | #define DDRSS0_PI_39_DATA 0x00000056 |
| 519 | #define DDRSS0_PI_40_DATA 0x000000A9 |
| 520 | #define DDRSS0_PI_41_DATA 0x000000A9 |
| 521 | #define DDRSS0_PI_42_DATA 0x000000B5 |
| 522 | #define DDRSS0_PI_43_DATA 0x00000000 |
| 523 | #define DDRSS0_PI_44_DATA 0x00000000 |
| 524 | #define DDRSS0_PI_45_DATA 0x000F0F00 |
| 525 | #define DDRSS0_PI_46_DATA 0x0000001B |
| 526 | #define DDRSS0_PI_47_DATA 0x000007D0 |
| 527 | #define DDRSS0_PI_48_DATA 0x00000300 |
| 528 | #define DDRSS0_PI_49_DATA 0x00000000 |
| 529 | #define DDRSS0_PI_50_DATA 0x00000000 |
| 530 | #define DDRSS0_PI_51_DATA 0x01000000 |
| 531 | #define DDRSS0_PI_52_DATA 0x00010101 |
| 532 | #define DDRSS0_PI_53_DATA 0x00000000 |
| 533 | #define DDRSS0_PI_54_DATA 0x00030000 |
| 534 | #define DDRSS0_PI_55_DATA 0x0F000000 |
| 535 | #define DDRSS0_PI_56_DATA 0x00000017 |
| 536 | #define DDRSS0_PI_57_DATA 0x00000000 |
| 537 | #define DDRSS0_PI_58_DATA 0x00000000 |
| 538 | #define DDRSS0_PI_59_DATA 0x00000000 |
| 539 | #define DDRSS0_PI_60_DATA 0x0A0A140A |
| 540 | #define DDRSS0_PI_61_DATA 0x10020101 |
| 541 | #define DDRSS0_PI_62_DATA 0x00020805 |
| 542 | #define DDRSS0_PI_63_DATA 0x01000404 |
| 543 | #define DDRSS0_PI_64_DATA 0x00000000 |
| 544 | #define DDRSS0_PI_65_DATA 0x00000000 |
| 545 | #define DDRSS0_PI_66_DATA 0x00000100 |
| 546 | #define DDRSS0_PI_67_DATA 0x0001010F |
| 547 | #define DDRSS0_PI_68_DATA 0x00340000 |
| 548 | #define DDRSS0_PI_69_DATA 0x00000000 |
| 549 | #define DDRSS0_PI_70_DATA 0x00000000 |
| 550 | #define DDRSS0_PI_71_DATA 0x0000FFFF |
| 551 | #define DDRSS0_PI_72_DATA 0x00000000 |
| 552 | #define DDRSS0_PI_73_DATA 0x00080000 |
| 553 | #define DDRSS0_PI_74_DATA 0x02000200 |
| 554 | #define DDRSS0_PI_75_DATA 0x01000100 |
| 555 | #define DDRSS0_PI_76_DATA 0x01000000 |
| 556 | #define DDRSS0_PI_77_DATA 0x02000200 |
| 557 | #define DDRSS0_PI_78_DATA 0x00000200 |
| 558 | #define DDRSS0_PI_79_DATA 0x00000000 |
| 559 | #define DDRSS0_PI_80_DATA 0x00000000 |
| 560 | #define DDRSS0_PI_81_DATA 0x00000000 |
| 561 | #define DDRSS0_PI_82_DATA 0x00000000 |
| 562 | #define DDRSS0_PI_83_DATA 0x00000000 |
| 563 | #define DDRSS0_PI_84_DATA 0x00000000 |
| 564 | #define DDRSS0_PI_85_DATA 0x00000000 |
| 565 | #define DDRSS0_PI_86_DATA 0x00000000 |
| 566 | #define DDRSS0_PI_87_DATA 0x00000000 |
| 567 | #define DDRSS0_PI_88_DATA 0x00000000 |
| 568 | #define DDRSS0_PI_89_DATA 0x00000000 |
| 569 | #define DDRSS0_PI_90_DATA 0x00000000 |
| 570 | #define DDRSS0_PI_91_DATA 0x00000400 |
| 571 | #define DDRSS0_PI_92_DATA 0x02010000 |
| 572 | #define DDRSS0_PI_93_DATA 0x00080003 |
| 573 | #define DDRSS0_PI_94_DATA 0x00080000 |
| 574 | #define DDRSS0_PI_95_DATA 0x00000001 |
| 575 | #define DDRSS0_PI_96_DATA 0x00000000 |
| 576 | #define DDRSS0_PI_97_DATA 0x0000AA00 |
| 577 | #define DDRSS0_PI_98_DATA 0x00000000 |
| 578 | #define DDRSS0_PI_99_DATA 0x00000000 |
| 579 | #define DDRSS0_PI_100_DATA 0x00010000 |
| 580 | #define DDRSS0_PI_101_DATA 0x00000000 |
| 581 | #define DDRSS0_PI_102_DATA 0x00000000 |
| 582 | #define DDRSS0_PI_103_DATA 0x00000000 |
| 583 | #define DDRSS0_PI_104_DATA 0x00000000 |
| 584 | #define DDRSS0_PI_105_DATA 0x00000000 |
| 585 | #define DDRSS0_PI_106_DATA 0x00000000 |
| 586 | #define DDRSS0_PI_107_DATA 0x00000000 |
| 587 | #define DDRSS0_PI_108_DATA 0x00000000 |
| 588 | #define DDRSS0_PI_109_DATA 0x00000000 |
| 589 | #define DDRSS0_PI_110_DATA 0x00000000 |
| 590 | #define DDRSS0_PI_111_DATA 0x00000000 |
| 591 | #define DDRSS0_PI_112_DATA 0x00000000 |
| 592 | #define DDRSS0_PI_113_DATA 0x00000000 |
| 593 | #define DDRSS0_PI_114_DATA 0x00000000 |
| 594 | #define DDRSS0_PI_115_DATA 0x00000000 |
| 595 | #define DDRSS0_PI_116_DATA 0x00000000 |
| 596 | #define DDRSS0_PI_117_DATA 0x00000000 |
| 597 | #define DDRSS0_PI_118_DATA 0x00000000 |
| 598 | #define DDRSS0_PI_119_DATA 0x00000000 |
| 599 | #define DDRSS0_PI_120_DATA 0x00000000 |
| 600 | #define DDRSS0_PI_121_DATA 0x00000000 |
| 601 | #define DDRSS0_PI_122_DATA 0x00000000 |
| 602 | #define DDRSS0_PI_123_DATA 0x00000000 |
| 603 | #define DDRSS0_PI_124_DATA 0x00000000 |
| 604 | #define DDRSS0_PI_125_DATA 0x00000008 |
| 605 | #define DDRSS0_PI_126_DATA 0x00000000 |
| 606 | #define DDRSS0_PI_127_DATA 0x00000000 |
| 607 | #define DDRSS0_PI_128_DATA 0x00000000 |
| 608 | #define DDRSS0_PI_129_DATA 0x00000000 |
| 609 | #define DDRSS0_PI_130_DATA 0x00000000 |
| 610 | #define DDRSS0_PI_131_DATA 0x00000000 |
| 611 | #define DDRSS0_PI_132_DATA 0x00000000 |
| 612 | #define DDRSS0_PI_133_DATA 0x00000000 |
| 613 | #define DDRSS0_PI_134_DATA 0x00000002 |
| 614 | #define DDRSS0_PI_135_DATA 0x00000000 |
| 615 | #define DDRSS0_PI_136_DATA 0x00000000 |
| 616 | #define DDRSS0_PI_137_DATA 0x0000000A |
| 617 | #define DDRSS0_PI_138_DATA 0x00000019 |
| 618 | #define DDRSS0_PI_139_DATA 0x00000100 |
| 619 | #define DDRSS0_PI_140_DATA 0x00000000 |
| 620 | #define DDRSS0_PI_141_DATA 0x00000000 |
| 621 | #define DDRSS0_PI_142_DATA 0x00000000 |
| 622 | #define DDRSS0_PI_143_DATA 0x00000000 |
| 623 | #define DDRSS0_PI_144_DATA 0x01000000 |
| 624 | #define DDRSS0_PI_145_DATA 0x00010003 |
| 625 | #define DDRSS0_PI_146_DATA 0x02000101 |
| 626 | #define DDRSS0_PI_147_DATA 0x01030001 |
| 627 | #define DDRSS0_PI_148_DATA 0x00010400 |
| 628 | #define DDRSS0_PI_149_DATA 0x06000105 |
| 629 | #define DDRSS0_PI_150_DATA 0x01070001 |
| 630 | #define DDRSS0_PI_151_DATA 0x00000000 |
| 631 | #define DDRSS0_PI_152_DATA 0x00000000 |
| 632 | #define DDRSS0_PI_153_DATA 0x00000000 |
| 633 | #define DDRSS0_PI_154_DATA 0x00010001 |
| 634 | #define DDRSS0_PI_155_DATA 0x00000000 |
| 635 | #define DDRSS0_PI_156_DATA 0x00000000 |
| 636 | #define DDRSS0_PI_157_DATA 0x00000000 |
| 637 | #define DDRSS0_PI_158_DATA 0x00000000 |
| 638 | #define DDRSS0_PI_159_DATA 0x00000401 |
| 639 | #define DDRSS0_PI_160_DATA 0x00000000 |
| 640 | #define DDRSS0_PI_161_DATA 0x00010000 |
| 641 | #define DDRSS0_PI_162_DATA 0x00000000 |
| 642 | #define DDRSS0_PI_163_DATA 0x2B2B0200 |
| 643 | #define DDRSS0_PI_164_DATA 0x00000034 |
| 644 | #define DDRSS0_PI_165_DATA 0x00000064 |
| 645 | #define DDRSS0_PI_166_DATA 0x00020064 |
| 646 | #define DDRSS0_PI_167_DATA 0x02000200 |
| 647 | #define DDRSS0_PI_168_DATA 0x48120C04 |
| 648 | #define DDRSS0_PI_169_DATA 0x00154812 |
| 649 | #define DDRSS0_PI_170_DATA 0x00000063 |
| 650 | #define DDRSS0_PI_171_DATA 0x0000032B |
| 651 | #define DDRSS0_PI_172_DATA 0x00001035 |
| 652 | #define DDRSS0_PI_173_DATA 0x0000032B |
| 653 | #define DDRSS0_PI_174_DATA 0x04001035 |
| 654 | #define DDRSS0_PI_175_DATA 0x01010404 |
| 655 | #define DDRSS0_PI_176_DATA 0x00001501 |
| 656 | #define DDRSS0_PI_177_DATA 0x00150015 |
| 657 | #define DDRSS0_PI_178_DATA 0x01000100 |
| 658 | #define DDRSS0_PI_179_DATA 0x00000100 |
| 659 | #define DDRSS0_PI_180_DATA 0x00000000 |
| 660 | #define DDRSS0_PI_181_DATA 0x01010101 |
| 661 | #define DDRSS0_PI_182_DATA 0x00000101 |
| 662 | #define DDRSS0_PI_183_DATA 0x00000000 |
| 663 | #define DDRSS0_PI_184_DATA 0x00000000 |
| 664 | #define DDRSS0_PI_185_DATA 0x15040000 |
| 665 | #define DDRSS0_PI_186_DATA 0x0E0E0215 |
| 666 | #define DDRSS0_PI_187_DATA 0x00040402 |
| 667 | #define DDRSS0_PI_188_DATA 0x000D0035 |
| 668 | #define DDRSS0_PI_189_DATA 0x00218049 |
| 669 | #define DDRSS0_PI_190_DATA 0x00218049 |
| 670 | #define DDRSS0_PI_191_DATA 0x01010101 |
| 671 | #define DDRSS0_PI_192_DATA 0x0004000E |
| 672 | #define DDRSS0_PI_193_DATA 0x00040216 |
| 673 | #define DDRSS0_PI_194_DATA 0x01000216 |
| 674 | #define DDRSS0_PI_195_DATA 0x000F000F |
| 675 | #define DDRSS0_PI_196_DATA 0x02170100 |
| 676 | #define DDRSS0_PI_197_DATA 0x01000217 |
| 677 | #define DDRSS0_PI_198_DATA 0x02170217 |
| 678 | #define DDRSS0_PI_199_DATA 0x32103200 |
| 679 | #define DDRSS0_PI_200_DATA 0x01013210 |
| 680 | #define DDRSS0_PI_201_DATA 0x0A070601 |
| 681 | #define DDRSS0_PI_202_DATA 0x1F130A0D |
| 682 | #define DDRSS0_PI_203_DATA 0x1F130A14 |
| 683 | #define DDRSS0_PI_204_DATA 0x0000C014 |
| 684 | #define DDRSS0_PI_205_DATA 0x00C01000 |
| 685 | #define DDRSS0_PI_206_DATA 0x00C01000 |
| 686 | #define DDRSS0_PI_207_DATA 0x00021000 |
| 687 | #define DDRSS0_PI_208_DATA 0x0024000E |
| 688 | #define DDRSS0_PI_209_DATA 0x00240216 |
| 689 | #define DDRSS0_PI_210_DATA 0x00110216 |
| 690 | #define DDRSS0_PI_211_DATA 0x32000056 |
| 691 | #define DDRSS0_PI_212_DATA 0x00000301 |
| 692 | #define DDRSS0_PI_213_DATA 0x005B0036 |
| 693 | #define DDRSS0_PI_214_DATA 0x03013212 |
| 694 | #define DDRSS0_PI_215_DATA 0x00003600 |
| 695 | #define DDRSS0_PI_216_DATA 0x3212005B |
| 696 | #define DDRSS0_PI_217_DATA 0x09000301 |
| 697 | #define DDRSS0_PI_218_DATA 0x04010504 |
| 698 | #define DDRSS0_PI_219_DATA 0x04000364 |
| 699 | #define DDRSS0_PI_220_DATA 0x0A032001 |
| 700 | #define DDRSS0_PI_221_DATA 0x2C31110A |
| 701 | #define DDRSS0_PI_222_DATA 0x00002918 |
| 702 | #define DDRSS0_PI_223_DATA 0x6000838E |
| 703 | #define DDRSS0_PI_224_DATA 0x1E202008 |
| 704 | #define DDRSS0_PI_225_DATA 0x2C311116 |
| 705 | #define DDRSS0_PI_226_DATA 0x00002918 |
| 706 | #define DDRSS0_PI_227_DATA 0x6000838E |
| 707 | #define DDRSS0_PI_228_DATA 0x1E202008 |
| 708 | #define DDRSS0_PI_229_DATA 0x0000C616 |
| 709 | #define DDRSS0_PI_230_DATA 0x000007BC |
| 710 | #define DDRSS0_PI_231_DATA 0x0000206A |
| 711 | #define DDRSS0_PI_232_DATA 0x00014424 |
| 712 | #define DDRSS0_PI_233_DATA 0x0000206A |
| 713 | #define DDRSS0_PI_234_DATA 0x00014424 |
| 714 | #define DDRSS0_PI_235_DATA 0x033B0016 |
| 715 | #define DDRSS0_PI_236_DATA 0x0303033B |
| 716 | #define DDRSS0_PI_237_DATA 0x002AF803 |
| 717 | #define DDRSS0_PI_238_DATA 0x0001ADAF |
| 718 | #define DDRSS0_PI_239_DATA 0x00000005 |
| 719 | #define DDRSS0_PI_240_DATA 0x0000006E |
| 720 | #define DDRSS0_PI_241_DATA 0x00000016 |
| 721 | #define DDRSS0_PI_242_DATA 0x000681C8 |
| 722 | #define DDRSS0_PI_243_DATA 0x0001ADAF |
| 723 | #define DDRSS0_PI_244_DATA 0x00000005 |
| 724 | #define DDRSS0_PI_245_DATA 0x000010A9 |
| 725 | #define DDRSS0_PI_246_DATA 0x0000033B |
| 726 | #define DDRSS0_PI_247_DATA 0x000681C8 |
| 727 | #define DDRSS0_PI_248_DATA 0x0001ADAF |
| 728 | #define DDRSS0_PI_249_DATA 0x00000005 |
| 729 | #define DDRSS0_PI_250_DATA 0x000010A9 |
| 730 | #define DDRSS0_PI_251_DATA 0x0100033B |
| 731 | #define DDRSS0_PI_252_DATA 0x00370040 |
| 732 | #define DDRSS0_PI_253_DATA 0x00010008 |
| 733 | #define DDRSS0_PI_254_DATA 0x08550040 |
| 734 | #define DDRSS0_PI_255_DATA 0x00010040 |
| 735 | #define DDRSS0_PI_256_DATA 0x08550040 |
| 736 | #define DDRSS0_PI_257_DATA 0x00000340 |
| 737 | #define DDRSS0_PI_258_DATA 0x006B006B |
| 738 | #define DDRSS0_PI_259_DATA 0x08040404 |
| 739 | #define DDRSS0_PI_260_DATA 0x00000055 |
| 740 | #define DDRSS0_PI_261_DATA 0x55083C5A |
| 741 | #define DDRSS0_PI_262_DATA 0x5A000000 |
| 742 | #define DDRSS0_PI_263_DATA 0x0055083C |
| 743 | #define DDRSS0_PI_264_DATA 0x3C5A0000 |
| 744 | #define DDRSS0_PI_265_DATA 0x00005508 |
| 745 | #define DDRSS0_PI_266_DATA 0x0C3C5A00 |
| 746 | #define DDRSS0_PI_267_DATA 0x080F0E0D |
| 747 | #define DDRSS0_PI_268_DATA 0x000B0A09 |
| 748 | #define DDRSS0_PI_269_DATA 0x00030201 |
| 749 | #define DDRSS0_PI_270_DATA 0x01000000 |
| 750 | #define DDRSS0_PI_271_DATA 0x04020201 |
| 751 | #define DDRSS0_PI_272_DATA 0x00080804 |
| 752 | #define DDRSS0_PI_273_DATA 0x00000000 |
| 753 | #define DDRSS0_PI_274_DATA 0x00000000 |
| 754 | #define DDRSS0_PI_275_DATA 0x00330084 |
| 755 | #define DDRSS0_PI_276_DATA 0x00160000 |
| 756 | #define DDRSS0_PI_277_DATA 0x35333FF4 |
| 757 | #define DDRSS0_PI_278_DATA 0x00160F27 |
| 758 | #define DDRSS0_PI_279_DATA 0x35333FF4 |
| 759 | #define DDRSS0_PI_280_DATA 0x00160F27 |
| 760 | #define DDRSS0_PI_281_DATA 0x00330084 |
| 761 | #define DDRSS0_PI_282_DATA 0x00160000 |
| 762 | #define DDRSS0_PI_283_DATA 0x35333FF4 |
| 763 | #define DDRSS0_PI_284_DATA 0x00160F27 |
| 764 | #define DDRSS0_PI_285_DATA 0x35333FF4 |
| 765 | #define DDRSS0_PI_286_DATA 0x00160F27 |
| 766 | #define DDRSS0_PI_287_DATA 0x00330084 |
| 767 | #define DDRSS0_PI_288_DATA 0x00160000 |
| 768 | #define DDRSS0_PI_289_DATA 0x35333FF4 |
| 769 | #define DDRSS0_PI_290_DATA 0x00160F27 |
| 770 | #define DDRSS0_PI_291_DATA 0x35333FF4 |
| 771 | #define DDRSS0_PI_292_DATA 0x00160F27 |
| 772 | #define DDRSS0_PI_293_DATA 0x00330084 |
| 773 | #define DDRSS0_PI_294_DATA 0x00160000 |
| 774 | #define DDRSS0_PI_295_DATA 0x35333FF4 |
| 775 | #define DDRSS0_PI_296_DATA 0x00160F27 |
| 776 | #define DDRSS0_PI_297_DATA 0x35333FF4 |
| 777 | #define DDRSS0_PI_298_DATA 0x00160F27 |
| 778 | #define DDRSS0_PI_299_DATA 0x00000000 |
| 779 | |
| 780 | #define DDRSS0_PHY_00_DATA 0x000004F0 |
| 781 | #define DDRSS0_PHY_01_DATA 0x00000000 |
| 782 | #define DDRSS0_PHY_02_DATA 0x00030200 |
| 783 | #define DDRSS0_PHY_03_DATA 0x00000000 |
| 784 | #define DDRSS0_PHY_04_DATA 0x00000000 |
| 785 | #define DDRSS0_PHY_05_DATA 0x01030000 |
| 786 | #define DDRSS0_PHY_06_DATA 0x00010000 |
| 787 | #define DDRSS0_PHY_07_DATA 0x01030004 |
| 788 | #define DDRSS0_PHY_08_DATA 0x01000000 |
| 789 | #define DDRSS0_PHY_09_DATA 0x00000000 |
| 790 | #define DDRSS0_PHY_10_DATA 0x00000000 |
| 791 | #define DDRSS0_PHY_11_DATA 0x01000001 |
| 792 | #define DDRSS0_PHY_12_DATA 0x00000100 |
| 793 | #define DDRSS0_PHY_13_DATA 0x000800C0 |
| 794 | #define DDRSS0_PHY_14_DATA 0x060100CC |
| 795 | #define DDRSS0_PHY_15_DATA 0x00030066 |
| 796 | #define DDRSS0_PHY_16_DATA 0x00000000 |
| 797 | #define DDRSS0_PHY_17_DATA 0x00000301 |
| 798 | #define DDRSS0_PHY_18_DATA 0x0000AAAA |
| 799 | #define DDRSS0_PHY_19_DATA 0x00005555 |
| 800 | #define DDRSS0_PHY_20_DATA 0x0000B5B5 |
| 801 | #define DDRSS0_PHY_21_DATA 0x00004A4A |
| 802 | #define DDRSS0_PHY_22_DATA 0x00005656 |
| 803 | #define DDRSS0_PHY_23_DATA 0x0000A9A9 |
| 804 | #define DDRSS0_PHY_24_DATA 0x0000A9A9 |
| 805 | #define DDRSS0_PHY_25_DATA 0x0000B5B5 |
| 806 | #define DDRSS0_PHY_26_DATA 0x00000000 |
| 807 | #define DDRSS0_PHY_27_DATA 0x00000000 |
| 808 | #define DDRSS0_PHY_28_DATA 0x2A000000 |
| 809 | #define DDRSS0_PHY_29_DATA 0x00000808 |
| 810 | #define DDRSS0_PHY_30_DATA 0x0F000000 |
| 811 | #define DDRSS0_PHY_31_DATA 0x00000F0F |
| 812 | #define DDRSS0_PHY_32_DATA 0x10400000 |
| 813 | #define DDRSS0_PHY_33_DATA 0x0C002006 |
| 814 | #define DDRSS0_PHY_34_DATA 0x00000000 |
| 815 | #define DDRSS0_PHY_35_DATA 0x00000000 |
| 816 | #define DDRSS0_PHY_36_DATA 0x55555555 |
| 817 | #define DDRSS0_PHY_37_DATA 0xAAAAAAAA |
| 818 | #define DDRSS0_PHY_38_DATA 0x55555555 |
| 819 | #define DDRSS0_PHY_39_DATA 0xAAAAAAAA |
| 820 | #define DDRSS0_PHY_40_DATA 0x00005555 |
| 821 | #define DDRSS0_PHY_41_DATA 0x01000100 |
| 822 | #define DDRSS0_PHY_42_DATA 0x00800180 |
| 823 | #define DDRSS0_PHY_43_DATA 0x00000001 |
| 824 | #define DDRSS0_PHY_44_DATA 0x00000000 |
| 825 | #define DDRSS0_PHY_45_DATA 0x00000000 |
| 826 | #define DDRSS0_PHY_46_DATA 0x00000000 |
| 827 | #define DDRSS0_PHY_47_DATA 0x00000000 |
| 828 | #define DDRSS0_PHY_48_DATA 0x00000000 |
| 829 | #define DDRSS0_PHY_49_DATA 0x00000000 |
| 830 | #define DDRSS0_PHY_50_DATA 0x00000000 |
| 831 | #define DDRSS0_PHY_51_DATA 0x00000000 |
| 832 | #define DDRSS0_PHY_52_DATA 0x00000000 |
| 833 | #define DDRSS0_PHY_53_DATA 0x00000000 |
| 834 | #define DDRSS0_PHY_54_DATA 0x00000000 |
| 835 | #define DDRSS0_PHY_55_DATA 0x00000000 |
| 836 | #define DDRSS0_PHY_56_DATA 0x00000000 |
| 837 | #define DDRSS0_PHY_57_DATA 0x00000000 |
| 838 | #define DDRSS0_PHY_58_DATA 0x00000000 |
| 839 | #define DDRSS0_PHY_59_DATA 0x00000000 |
| 840 | #define DDRSS0_PHY_60_DATA 0x00000000 |
| 841 | #define DDRSS0_PHY_61_DATA 0x00000000 |
| 842 | #define DDRSS0_PHY_62_DATA 0x00000000 |
| 843 | #define DDRSS0_PHY_63_DATA 0x00000000 |
| 844 | #define DDRSS0_PHY_64_DATA 0x00000000 |
| 845 | #define DDRSS0_PHY_65_DATA 0x00000000 |
| 846 | #define DDRSS0_PHY_66_DATA 0x00000104 |
| 847 | #define DDRSS0_PHY_67_DATA 0x00000120 |
| 848 | #define DDRSS0_PHY_68_DATA 0x00000000 |
| 849 | #define DDRSS0_PHY_69_DATA 0x00000000 |
| 850 | #define DDRSS0_PHY_70_DATA 0x00000000 |
| 851 | #define DDRSS0_PHY_71_DATA 0x00000000 |
| 852 | #define DDRSS0_PHY_72_DATA 0x00000000 |
| 853 | #define DDRSS0_PHY_73_DATA 0x00000000 |
| 854 | #define DDRSS0_PHY_74_DATA 0x00000000 |
| 855 | #define DDRSS0_PHY_75_DATA 0x00000001 |
| 856 | #define DDRSS0_PHY_76_DATA 0x07FF0000 |
| 857 | #define DDRSS0_PHY_77_DATA 0x0080081F |
| 858 | #define DDRSS0_PHY_78_DATA 0x00081020 |
| 859 | #define DDRSS0_PHY_79_DATA 0x04010000 |
| 860 | #define DDRSS0_PHY_80_DATA 0x00000000 |
| 861 | #define DDRSS0_PHY_81_DATA 0x00000000 |
| 862 | #define DDRSS0_PHY_82_DATA 0x00000000 |
| 863 | #define DDRSS0_PHY_83_DATA 0x00000100 |
| 864 | #define DDRSS0_PHY_84_DATA 0x01CC0C01 |
| 865 | #define DDRSS0_PHY_85_DATA 0x1003CC0C |
| 866 | #define DDRSS0_PHY_86_DATA 0x20000140 |
| 867 | #define DDRSS0_PHY_87_DATA 0x07FF0200 |
| 868 | #define DDRSS0_PHY_88_DATA 0x0000DD01 |
| 869 | #define DDRSS0_PHY_89_DATA 0x10100303 |
| 870 | #define DDRSS0_PHY_90_DATA 0x10101010 |
| 871 | #define DDRSS0_PHY_91_DATA 0x10101010 |
| 872 | #define DDRSS0_PHY_92_DATA 0x00021010 |
| 873 | #define DDRSS0_PHY_93_DATA 0x00100010 |
| 874 | #define DDRSS0_PHY_94_DATA 0x00100010 |
| 875 | #define DDRSS0_PHY_95_DATA 0x00100010 |
| 876 | #define DDRSS0_PHY_96_DATA 0x00100010 |
| 877 | #define DDRSS0_PHY_97_DATA 0x00050010 |
| 878 | #define DDRSS0_PHY_98_DATA 0x51517041 |
| 879 | #define DDRSS0_PHY_99_DATA 0x31C06001 |
| 880 | #define DDRSS0_PHY_100_DATA 0x07AB0340 |
| 881 | #define DDRSS0_PHY_101_DATA 0x00C0C001 |
| 882 | #define DDRSS0_PHY_102_DATA 0x0E0D0001 |
| 883 | #define DDRSS0_PHY_103_DATA 0x10001000 |
| 884 | #define DDRSS0_PHY_104_DATA 0x0C083E42 |
| 885 | #define DDRSS0_PHY_105_DATA 0x0F0C3701 |
| 886 | #define DDRSS0_PHY_106_DATA 0x01000140 |
| 887 | #define DDRSS0_PHY_107_DATA 0x0C000420 |
| 888 | #define DDRSS0_PHY_108_DATA 0x00000198 |
| 889 | #define DDRSS0_PHY_109_DATA 0x0A0000D0 |
| 890 | #define DDRSS0_PHY_110_DATA 0x00030200 |
| 891 | #define DDRSS0_PHY_111_DATA 0x02800000 |
| 892 | #define DDRSS0_PHY_112_DATA 0x80800000 |
| 893 | #define DDRSS0_PHY_113_DATA 0x000E2010 |
| 894 | #define DDRSS0_PHY_114_DATA 0x76543210 |
| 895 | #define DDRSS0_PHY_115_DATA 0x00000008 |
| 896 | #define DDRSS0_PHY_116_DATA 0x02800280 |
| 897 | #define DDRSS0_PHY_117_DATA 0x02800280 |
| 898 | #define DDRSS0_PHY_118_DATA 0x02800280 |
| 899 | #define DDRSS0_PHY_119_DATA 0x02800280 |
| 900 | #define DDRSS0_PHY_120_DATA 0x00000280 |
| 901 | #define DDRSS0_PHY_121_DATA 0x0000A000 |
| 902 | #define DDRSS0_PHY_122_DATA 0x00A000A0 |
| 903 | #define DDRSS0_PHY_123_DATA 0x00A000A0 |
| 904 | #define DDRSS0_PHY_124_DATA 0x00A000A0 |
| 905 | #define DDRSS0_PHY_125_DATA 0x00A000A0 |
| 906 | #define DDRSS0_PHY_126_DATA 0x00A000A0 |
| 907 | #define DDRSS0_PHY_127_DATA 0x00A000A0 |
| 908 | #define DDRSS0_PHY_128_DATA 0x00A000A0 |
| 909 | #define DDRSS0_PHY_129_DATA 0x00A000A0 |
| 910 | #define DDRSS0_PHY_130_DATA 0x01C200A0 |
| 911 | #define DDRSS0_PHY_131_DATA 0x01A00005 |
| 912 | #define DDRSS0_PHY_132_DATA 0x00000000 |
| 913 | #define DDRSS0_PHY_133_DATA 0x00000000 |
| 914 | #define DDRSS0_PHY_134_DATA 0x00080200 |
| 915 | #define DDRSS0_PHY_135_DATA 0x00000000 |
| 916 | #define DDRSS0_PHY_136_DATA 0x20202000 |
| 917 | #define DDRSS0_PHY_137_DATA 0x20202020 |
| 918 | #define DDRSS0_PHY_138_DATA 0xF0F02020 |
| 919 | #define DDRSS0_PHY_139_DATA 0x00000000 |
| 920 | #define DDRSS0_PHY_140_DATA 0x00000000 |
| 921 | #define DDRSS0_PHY_141_DATA 0x00000000 |
| 922 | #define DDRSS0_PHY_142_DATA 0x00000000 |
| 923 | #define DDRSS0_PHY_143_DATA 0x00000000 |
| 924 | #define DDRSS0_PHY_144_DATA 0x00000000 |
| 925 | #define DDRSS0_PHY_145_DATA 0x00000000 |
| 926 | #define DDRSS0_PHY_146_DATA 0x00000000 |
| 927 | #define DDRSS0_PHY_147_DATA 0x00000000 |
| 928 | #define DDRSS0_PHY_148_DATA 0x00000000 |
| 929 | #define DDRSS0_PHY_149_DATA 0x00000000 |
| 930 | #define DDRSS0_PHY_150_DATA 0x00000000 |
| 931 | #define DDRSS0_PHY_151_DATA 0x00000000 |
| 932 | #define DDRSS0_PHY_152_DATA 0x00000000 |
| 933 | #define DDRSS0_PHY_153_DATA 0x00000000 |
| 934 | #define DDRSS0_PHY_154_DATA 0x00000000 |
| 935 | #define DDRSS0_PHY_155_DATA 0x00000000 |
| 936 | #define DDRSS0_PHY_156_DATA 0x00000000 |
| 937 | #define DDRSS0_PHY_157_DATA 0x00000000 |
| 938 | #define DDRSS0_PHY_158_DATA 0x00000000 |
| 939 | #define DDRSS0_PHY_159_DATA 0x00000000 |
| 940 | #define DDRSS0_PHY_160_DATA 0x00000000 |
| 941 | #define DDRSS0_PHY_161_DATA 0x00000000 |
| 942 | #define DDRSS0_PHY_162_DATA 0x00000000 |
| 943 | #define DDRSS0_PHY_163_DATA 0x00000000 |
| 944 | #define DDRSS0_PHY_164_DATA 0x00000000 |
| 945 | #define DDRSS0_PHY_165_DATA 0x00000000 |
| 946 | #define DDRSS0_PHY_166_DATA 0x00000000 |
| 947 | #define DDRSS0_PHY_167_DATA 0x00000000 |
| 948 | #define DDRSS0_PHY_168_DATA 0x00000000 |
| 949 | #define DDRSS0_PHY_169_DATA 0x00000000 |
| 950 | #define DDRSS0_PHY_170_DATA 0x00000000 |
| 951 | #define DDRSS0_PHY_171_DATA 0x00000000 |
| 952 | #define DDRSS0_PHY_172_DATA 0x00000000 |
| 953 | #define DDRSS0_PHY_173_DATA 0x00000000 |
| 954 | #define DDRSS0_PHY_174_DATA 0x00000000 |
| 955 | #define DDRSS0_PHY_175_DATA 0x00000000 |
| 956 | #define DDRSS0_PHY_176_DATA 0x00000000 |
| 957 | #define DDRSS0_PHY_177_DATA 0x00000000 |
| 958 | #define DDRSS0_PHY_178_DATA 0x00000000 |
| 959 | #define DDRSS0_PHY_179_DATA 0x00000000 |
| 960 | #define DDRSS0_PHY_180_DATA 0x00000000 |
| 961 | #define DDRSS0_PHY_181_DATA 0x00000000 |
| 962 | #define DDRSS0_PHY_182_DATA 0x00000000 |
| 963 | #define DDRSS0_PHY_183_DATA 0x00000000 |
| 964 | #define DDRSS0_PHY_184_DATA 0x00000000 |
| 965 | #define DDRSS0_PHY_185_DATA 0x00000000 |
| 966 | #define DDRSS0_PHY_186_DATA 0x00000000 |
| 967 | #define DDRSS0_PHY_187_DATA 0x00000000 |
| 968 | #define DDRSS0_PHY_188_DATA 0x00000000 |
| 969 | #define DDRSS0_PHY_189_DATA 0x00000000 |
| 970 | #define DDRSS0_PHY_190_DATA 0x00000000 |
| 971 | #define DDRSS0_PHY_191_DATA 0x00000000 |
| 972 | #define DDRSS0_PHY_192_DATA 0x00000000 |
| 973 | #define DDRSS0_PHY_193_DATA 0x00000000 |
| 974 | #define DDRSS0_PHY_194_DATA 0x00000000 |
| 975 | #define DDRSS0_PHY_195_DATA 0x00000000 |
| 976 | #define DDRSS0_PHY_196_DATA 0x00000000 |
| 977 | #define DDRSS0_PHY_197_DATA 0x00000000 |
| 978 | #define DDRSS0_PHY_198_DATA 0x00000000 |
| 979 | #define DDRSS0_PHY_199_DATA 0x00000000 |
| 980 | #define DDRSS0_PHY_200_DATA 0x00000000 |
| 981 | #define DDRSS0_PHY_201_DATA 0x00000000 |
| 982 | #define DDRSS0_PHY_202_DATA 0x00000000 |
| 983 | #define DDRSS0_PHY_203_DATA 0x00000000 |
| 984 | #define DDRSS0_PHY_204_DATA 0x00000000 |
| 985 | #define DDRSS0_PHY_205_DATA 0x00000000 |
| 986 | #define DDRSS0_PHY_206_DATA 0x00000000 |
| 987 | #define DDRSS0_PHY_207_DATA 0x00000000 |
| 988 | #define DDRSS0_PHY_208_DATA 0x00000000 |
| 989 | #define DDRSS0_PHY_209_DATA 0x00000000 |
| 990 | #define DDRSS0_PHY_210_DATA 0x00000000 |
| 991 | #define DDRSS0_PHY_211_DATA 0x00000000 |
| 992 | #define DDRSS0_PHY_212_DATA 0x00000000 |
| 993 | #define DDRSS0_PHY_213_DATA 0x00000000 |
| 994 | #define DDRSS0_PHY_214_DATA 0x00000000 |
| 995 | #define DDRSS0_PHY_215_DATA 0x00000000 |
| 996 | #define DDRSS0_PHY_216_DATA 0x00000000 |
| 997 | #define DDRSS0_PHY_217_DATA 0x00000000 |
| 998 | #define DDRSS0_PHY_218_DATA 0x00000000 |
| 999 | #define DDRSS0_PHY_219_DATA 0x00000000 |
| 1000 | #define DDRSS0_PHY_220_DATA 0x00000000 |
| 1001 | #define DDRSS0_PHY_221_DATA 0x00000000 |
| 1002 | #define DDRSS0_PHY_222_DATA 0x00000000 |
| 1003 | #define DDRSS0_PHY_223_DATA 0x00000000 |
| 1004 | #define DDRSS0_PHY_224_DATA 0x00000000 |
| 1005 | #define DDRSS0_PHY_225_DATA 0x00000000 |
| 1006 | #define DDRSS0_PHY_226_DATA 0x00000000 |
| 1007 | #define DDRSS0_PHY_227_DATA 0x00000000 |
| 1008 | #define DDRSS0_PHY_228_DATA 0x00000000 |
| 1009 | #define DDRSS0_PHY_229_DATA 0x00000000 |
| 1010 | #define DDRSS0_PHY_230_DATA 0x00000000 |
| 1011 | #define DDRSS0_PHY_231_DATA 0x00000000 |
| 1012 | #define DDRSS0_PHY_232_DATA 0x00000000 |
| 1013 | #define DDRSS0_PHY_233_DATA 0x00000000 |
| 1014 | #define DDRSS0_PHY_234_DATA 0x00000000 |
| 1015 | #define DDRSS0_PHY_235_DATA 0x00000000 |
| 1016 | #define DDRSS0_PHY_236_DATA 0x00000000 |
| 1017 | #define DDRSS0_PHY_237_DATA 0x00000000 |
| 1018 | #define DDRSS0_PHY_238_DATA 0x00000000 |
| 1019 | #define DDRSS0_PHY_239_DATA 0x00000000 |
| 1020 | #define DDRSS0_PHY_240_DATA 0x00000000 |
| 1021 | #define DDRSS0_PHY_241_DATA 0x00000000 |
| 1022 | #define DDRSS0_PHY_242_DATA 0x00000000 |
| 1023 | #define DDRSS0_PHY_243_DATA 0x00000000 |
| 1024 | #define DDRSS0_PHY_244_DATA 0x00000000 |
| 1025 | #define DDRSS0_PHY_245_DATA 0x00000000 |
| 1026 | #define DDRSS0_PHY_246_DATA 0x00000000 |
| 1027 | #define DDRSS0_PHY_247_DATA 0x00000000 |
| 1028 | #define DDRSS0_PHY_248_DATA 0x00000000 |
| 1029 | #define DDRSS0_PHY_249_DATA 0x00000000 |
| 1030 | #define DDRSS0_PHY_250_DATA 0x00000000 |
| 1031 | #define DDRSS0_PHY_251_DATA 0x00000000 |
| 1032 | #define DDRSS0_PHY_252_DATA 0x00000000 |
| 1033 | #define DDRSS0_PHY_253_DATA 0x00000000 |
| 1034 | #define DDRSS0_PHY_254_DATA 0x00000000 |
| 1035 | #define DDRSS0_PHY_255_DATA 0x00000000 |
| 1036 | #define DDRSS0_PHY_256_DATA 0x000004F0 |
| 1037 | #define DDRSS0_PHY_257_DATA 0x00000000 |
| 1038 | #define DDRSS0_PHY_258_DATA 0x00030200 |
| 1039 | #define DDRSS0_PHY_259_DATA 0x00000000 |
| 1040 | #define DDRSS0_PHY_260_DATA 0x00000000 |
| 1041 | #define DDRSS0_PHY_261_DATA 0x01030000 |
| 1042 | #define DDRSS0_PHY_262_DATA 0x00010000 |
| 1043 | #define DDRSS0_PHY_263_DATA 0x01030004 |
| 1044 | #define DDRSS0_PHY_264_DATA 0x01000000 |
| 1045 | #define DDRSS0_PHY_265_DATA 0x00000000 |
| 1046 | #define DDRSS0_PHY_266_DATA 0x00000000 |
| 1047 | #define DDRSS0_PHY_267_DATA 0x01000001 |
| 1048 | #define DDRSS0_PHY_268_DATA 0x00000100 |
| 1049 | #define DDRSS0_PHY_269_DATA 0x000800C0 |
| 1050 | #define DDRSS0_PHY_270_DATA 0x060100CC |
| 1051 | #define DDRSS0_PHY_271_DATA 0x00030066 |
| 1052 | #define DDRSS0_PHY_272_DATA 0x00000000 |
| 1053 | #define DDRSS0_PHY_273_DATA 0x00000301 |
| 1054 | #define DDRSS0_PHY_274_DATA 0x0000AAAA |
| 1055 | #define DDRSS0_PHY_275_DATA 0x00005555 |
| 1056 | #define DDRSS0_PHY_276_DATA 0x0000B5B5 |
| 1057 | #define DDRSS0_PHY_277_DATA 0x00004A4A |
| 1058 | #define DDRSS0_PHY_278_DATA 0x00005656 |
| 1059 | #define DDRSS0_PHY_279_DATA 0x0000A9A9 |
| 1060 | #define DDRSS0_PHY_280_DATA 0x0000A9A9 |
| 1061 | #define DDRSS0_PHY_281_DATA 0x0000B5B5 |
| 1062 | #define DDRSS0_PHY_282_DATA 0x00000000 |
| 1063 | #define DDRSS0_PHY_283_DATA 0x00000000 |
| 1064 | #define DDRSS0_PHY_284_DATA 0x2A000000 |
| 1065 | #define DDRSS0_PHY_285_DATA 0x00000808 |
| 1066 | #define DDRSS0_PHY_286_DATA 0x0F000000 |
| 1067 | #define DDRSS0_PHY_287_DATA 0x00000F0F |
| 1068 | #define DDRSS0_PHY_288_DATA 0x10400000 |
| 1069 | #define DDRSS0_PHY_289_DATA 0x0C002006 |
| 1070 | #define DDRSS0_PHY_290_DATA 0x00000000 |
| 1071 | #define DDRSS0_PHY_291_DATA 0x00000000 |
| 1072 | #define DDRSS0_PHY_292_DATA 0x55555555 |
| 1073 | #define DDRSS0_PHY_293_DATA 0xAAAAAAAA |
| 1074 | #define DDRSS0_PHY_294_DATA 0x55555555 |
| 1075 | #define DDRSS0_PHY_295_DATA 0xAAAAAAAA |
| 1076 | #define DDRSS0_PHY_296_DATA 0x00005555 |
| 1077 | #define DDRSS0_PHY_297_DATA 0x01000100 |
| 1078 | #define DDRSS0_PHY_298_DATA 0x00800180 |
| 1079 | #define DDRSS0_PHY_299_DATA 0x00000000 |
| 1080 | #define DDRSS0_PHY_300_DATA 0x00000000 |
| 1081 | #define DDRSS0_PHY_301_DATA 0x00000000 |
| 1082 | #define DDRSS0_PHY_302_DATA 0x00000000 |
| 1083 | #define DDRSS0_PHY_303_DATA 0x00000000 |
| 1084 | #define DDRSS0_PHY_304_DATA 0x00000000 |
| 1085 | #define DDRSS0_PHY_305_DATA 0x00000000 |
| 1086 | #define DDRSS0_PHY_306_DATA 0x00000000 |
| 1087 | #define DDRSS0_PHY_307_DATA 0x00000000 |
| 1088 | #define DDRSS0_PHY_308_DATA 0x00000000 |
| 1089 | #define DDRSS0_PHY_309_DATA 0x00000000 |
| 1090 | #define DDRSS0_PHY_310_DATA 0x00000000 |
| 1091 | #define DDRSS0_PHY_311_DATA 0x00000000 |
| 1092 | #define DDRSS0_PHY_312_DATA 0x00000000 |
| 1093 | #define DDRSS0_PHY_313_DATA 0x00000000 |
| 1094 | #define DDRSS0_PHY_314_DATA 0x00000000 |
| 1095 | #define DDRSS0_PHY_315_DATA 0x00000000 |
| 1096 | #define DDRSS0_PHY_316_DATA 0x00000000 |
| 1097 | #define DDRSS0_PHY_317_DATA 0x00000000 |
| 1098 | #define DDRSS0_PHY_318_DATA 0x00000000 |
| 1099 | #define DDRSS0_PHY_319_DATA 0x00000000 |
| 1100 | #define DDRSS0_PHY_320_DATA 0x00000000 |
| 1101 | #define DDRSS0_PHY_321_DATA 0x00000000 |
| 1102 | #define DDRSS0_PHY_322_DATA 0x00000104 |
| 1103 | #define DDRSS0_PHY_323_DATA 0x00000120 |
| 1104 | #define DDRSS0_PHY_324_DATA 0x00000000 |
| 1105 | #define DDRSS0_PHY_325_DATA 0x00000000 |
| 1106 | #define DDRSS0_PHY_326_DATA 0x00000000 |
| 1107 | #define DDRSS0_PHY_327_DATA 0x00000000 |
| 1108 | #define DDRSS0_PHY_328_DATA 0x00000000 |
| 1109 | #define DDRSS0_PHY_329_DATA 0x00000000 |
| 1110 | #define DDRSS0_PHY_330_DATA 0x00000000 |
| 1111 | #define DDRSS0_PHY_331_DATA 0x00000001 |
| 1112 | #define DDRSS0_PHY_332_DATA 0x07FF0000 |
| 1113 | #define DDRSS0_PHY_333_DATA 0x0080081F |
| 1114 | #define DDRSS0_PHY_334_DATA 0x00081020 |
| 1115 | #define DDRSS0_PHY_335_DATA 0x04010000 |
| 1116 | #define DDRSS0_PHY_336_DATA 0x00000000 |
| 1117 | #define DDRSS0_PHY_337_DATA 0x00000000 |
| 1118 | #define DDRSS0_PHY_338_DATA 0x00000000 |
| 1119 | #define DDRSS0_PHY_339_DATA 0x00000100 |
| 1120 | #define DDRSS0_PHY_340_DATA 0x01CC0C01 |
| 1121 | #define DDRSS0_PHY_341_DATA 0x1003CC0C |
| 1122 | #define DDRSS0_PHY_342_DATA 0x20000140 |
| 1123 | #define DDRSS0_PHY_343_DATA 0x07FF0200 |
| 1124 | #define DDRSS0_PHY_344_DATA 0x0000DD01 |
| 1125 | #define DDRSS0_PHY_345_DATA 0x10100303 |
| 1126 | #define DDRSS0_PHY_346_DATA 0x10101010 |
| 1127 | #define DDRSS0_PHY_347_DATA 0x10101010 |
| 1128 | #define DDRSS0_PHY_348_DATA 0x00021010 |
| 1129 | #define DDRSS0_PHY_349_DATA 0x00100010 |
| 1130 | #define DDRSS0_PHY_350_DATA 0x00100010 |
| 1131 | #define DDRSS0_PHY_351_DATA 0x00100010 |
| 1132 | #define DDRSS0_PHY_352_DATA 0x00100010 |
| 1133 | #define DDRSS0_PHY_353_DATA 0x00050010 |
| 1134 | #define DDRSS0_PHY_354_DATA 0x51517041 |
| 1135 | #define DDRSS0_PHY_355_DATA 0x31C06001 |
| 1136 | #define DDRSS0_PHY_356_DATA 0x07AB0340 |
| 1137 | #define DDRSS0_PHY_357_DATA 0x00C0C001 |
| 1138 | #define DDRSS0_PHY_358_DATA 0x0E0D0001 |
| 1139 | #define DDRSS0_PHY_359_DATA 0x10001000 |
| 1140 | #define DDRSS0_PHY_360_DATA 0x0C083E42 |
| 1141 | #define DDRSS0_PHY_361_DATA 0x0F0C3701 |
| 1142 | #define DDRSS0_PHY_362_DATA 0x01000140 |
| 1143 | #define DDRSS0_PHY_363_DATA 0x0C000420 |
| 1144 | #define DDRSS0_PHY_364_DATA 0x00000198 |
| 1145 | #define DDRSS0_PHY_365_DATA 0x0A0000D0 |
| 1146 | #define DDRSS0_PHY_366_DATA 0x00030200 |
| 1147 | #define DDRSS0_PHY_367_DATA 0x02800000 |
| 1148 | #define DDRSS0_PHY_368_DATA 0x80800000 |
| 1149 | #define DDRSS0_PHY_369_DATA 0x000E2010 |
| 1150 | #define DDRSS0_PHY_370_DATA 0x76543210 |
| 1151 | #define DDRSS0_PHY_371_DATA 0x00000008 |
| 1152 | #define DDRSS0_PHY_372_DATA 0x02800280 |
| 1153 | #define DDRSS0_PHY_373_DATA 0x02800280 |
| 1154 | #define DDRSS0_PHY_374_DATA 0x02800280 |
| 1155 | #define DDRSS0_PHY_375_DATA 0x02800280 |
| 1156 | #define DDRSS0_PHY_376_DATA 0x00000280 |
| 1157 | #define DDRSS0_PHY_377_DATA 0x0000A000 |
| 1158 | #define DDRSS0_PHY_378_DATA 0x00A000A0 |
| 1159 | #define DDRSS0_PHY_379_DATA 0x00A000A0 |
| 1160 | #define DDRSS0_PHY_380_DATA 0x00A000A0 |
| 1161 | #define DDRSS0_PHY_381_DATA 0x00A000A0 |
| 1162 | #define DDRSS0_PHY_382_DATA 0x00A000A0 |
| 1163 | #define DDRSS0_PHY_383_DATA 0x00A000A0 |
| 1164 | #define DDRSS0_PHY_384_DATA 0x00A000A0 |
| 1165 | #define DDRSS0_PHY_385_DATA 0x00A000A0 |
| 1166 | #define DDRSS0_PHY_386_DATA 0x01C200A0 |
| 1167 | #define DDRSS0_PHY_387_DATA 0x01A00005 |
| 1168 | #define DDRSS0_PHY_388_DATA 0x00000000 |
| 1169 | #define DDRSS0_PHY_389_DATA 0x00000000 |
| 1170 | #define DDRSS0_PHY_390_DATA 0x00080200 |
| 1171 | #define DDRSS0_PHY_391_DATA 0x00000000 |
| 1172 | #define DDRSS0_PHY_392_DATA 0x20202000 |
| 1173 | #define DDRSS0_PHY_393_DATA 0x20202020 |
| 1174 | #define DDRSS0_PHY_394_DATA 0xF0F02020 |
| 1175 | #define DDRSS0_PHY_395_DATA 0x00000000 |
| 1176 | #define DDRSS0_PHY_396_DATA 0x00000000 |
| 1177 | #define DDRSS0_PHY_397_DATA 0x00000000 |
| 1178 | #define DDRSS0_PHY_398_DATA 0x00000000 |
| 1179 | #define DDRSS0_PHY_399_DATA 0x00000000 |
| 1180 | #define DDRSS0_PHY_400_DATA 0x00000000 |
| 1181 | #define DDRSS0_PHY_401_DATA 0x00000000 |
| 1182 | #define DDRSS0_PHY_402_DATA 0x00000000 |
| 1183 | #define DDRSS0_PHY_403_DATA 0x00000000 |
| 1184 | #define DDRSS0_PHY_404_DATA 0x00000000 |
| 1185 | #define DDRSS0_PHY_405_DATA 0x00000000 |
| 1186 | #define DDRSS0_PHY_406_DATA 0x00000000 |
| 1187 | #define DDRSS0_PHY_407_DATA 0x00000000 |
| 1188 | #define DDRSS0_PHY_408_DATA 0x00000000 |
| 1189 | #define DDRSS0_PHY_409_DATA 0x00000000 |
| 1190 | #define DDRSS0_PHY_410_DATA 0x00000000 |
| 1191 | #define DDRSS0_PHY_411_DATA 0x00000000 |
| 1192 | #define DDRSS0_PHY_412_DATA 0x00000000 |
| 1193 | #define DDRSS0_PHY_413_DATA 0x00000000 |
| 1194 | #define DDRSS0_PHY_414_DATA 0x00000000 |
| 1195 | #define DDRSS0_PHY_415_DATA 0x00000000 |
| 1196 | #define DDRSS0_PHY_416_DATA 0x00000000 |
| 1197 | #define DDRSS0_PHY_417_DATA 0x00000000 |
| 1198 | #define DDRSS0_PHY_418_DATA 0x00000000 |
| 1199 | #define DDRSS0_PHY_419_DATA 0x00000000 |
| 1200 | #define DDRSS0_PHY_420_DATA 0x00000000 |
| 1201 | #define DDRSS0_PHY_421_DATA 0x00000000 |
| 1202 | #define DDRSS0_PHY_422_DATA 0x00000000 |
| 1203 | #define DDRSS0_PHY_423_DATA 0x00000000 |
| 1204 | #define DDRSS0_PHY_424_DATA 0x00000000 |
| 1205 | #define DDRSS0_PHY_425_DATA 0x00000000 |
| 1206 | #define DDRSS0_PHY_426_DATA 0x00000000 |
| 1207 | #define DDRSS0_PHY_427_DATA 0x00000000 |
| 1208 | #define DDRSS0_PHY_428_DATA 0x00000000 |
| 1209 | #define DDRSS0_PHY_429_DATA 0x00000000 |
| 1210 | #define DDRSS0_PHY_430_DATA 0x00000000 |
| 1211 | #define DDRSS0_PHY_431_DATA 0x00000000 |
| 1212 | #define DDRSS0_PHY_432_DATA 0x00000000 |
| 1213 | #define DDRSS0_PHY_433_DATA 0x00000000 |
| 1214 | #define DDRSS0_PHY_434_DATA 0x00000000 |
| 1215 | #define DDRSS0_PHY_435_DATA 0x00000000 |
| 1216 | #define DDRSS0_PHY_436_DATA 0x00000000 |
| 1217 | #define DDRSS0_PHY_437_DATA 0x00000000 |
| 1218 | #define DDRSS0_PHY_438_DATA 0x00000000 |
| 1219 | #define DDRSS0_PHY_439_DATA 0x00000000 |
| 1220 | #define DDRSS0_PHY_440_DATA 0x00000000 |
| 1221 | #define DDRSS0_PHY_441_DATA 0x00000000 |
| 1222 | #define DDRSS0_PHY_442_DATA 0x00000000 |
| 1223 | #define DDRSS0_PHY_443_DATA 0x00000000 |
| 1224 | #define DDRSS0_PHY_444_DATA 0x00000000 |
| 1225 | #define DDRSS0_PHY_445_DATA 0x00000000 |
| 1226 | #define DDRSS0_PHY_446_DATA 0x00000000 |
| 1227 | #define DDRSS0_PHY_447_DATA 0x00000000 |
| 1228 | #define DDRSS0_PHY_448_DATA 0x00000000 |
| 1229 | #define DDRSS0_PHY_449_DATA 0x00000000 |
| 1230 | #define DDRSS0_PHY_450_DATA 0x00000000 |
| 1231 | #define DDRSS0_PHY_451_DATA 0x00000000 |
| 1232 | #define DDRSS0_PHY_452_DATA 0x00000000 |
| 1233 | #define DDRSS0_PHY_453_DATA 0x00000000 |
| 1234 | #define DDRSS0_PHY_454_DATA 0x00000000 |
| 1235 | #define DDRSS0_PHY_455_DATA 0x00000000 |
| 1236 | #define DDRSS0_PHY_456_DATA 0x00000000 |
| 1237 | #define DDRSS0_PHY_457_DATA 0x00000000 |
| 1238 | #define DDRSS0_PHY_458_DATA 0x00000000 |
| 1239 | #define DDRSS0_PHY_459_DATA 0x00000000 |
| 1240 | #define DDRSS0_PHY_460_DATA 0x00000000 |
| 1241 | #define DDRSS0_PHY_461_DATA 0x00000000 |
| 1242 | #define DDRSS0_PHY_462_DATA 0x00000000 |
| 1243 | #define DDRSS0_PHY_463_DATA 0x00000000 |
| 1244 | #define DDRSS0_PHY_464_DATA 0x00000000 |
| 1245 | #define DDRSS0_PHY_465_DATA 0x00000000 |
| 1246 | #define DDRSS0_PHY_466_DATA 0x00000000 |
| 1247 | #define DDRSS0_PHY_467_DATA 0x00000000 |
| 1248 | #define DDRSS0_PHY_468_DATA 0x00000000 |
| 1249 | #define DDRSS0_PHY_469_DATA 0x00000000 |
| 1250 | #define DDRSS0_PHY_470_DATA 0x00000000 |
| 1251 | #define DDRSS0_PHY_471_DATA 0x00000000 |
| 1252 | #define DDRSS0_PHY_472_DATA 0x00000000 |
| 1253 | #define DDRSS0_PHY_473_DATA 0x00000000 |
| 1254 | #define DDRSS0_PHY_474_DATA 0x00000000 |
| 1255 | #define DDRSS0_PHY_475_DATA 0x00000000 |
| 1256 | #define DDRSS0_PHY_476_DATA 0x00000000 |
| 1257 | #define DDRSS0_PHY_477_DATA 0x00000000 |
| 1258 | #define DDRSS0_PHY_478_DATA 0x00000000 |
| 1259 | #define DDRSS0_PHY_479_DATA 0x00000000 |
| 1260 | #define DDRSS0_PHY_480_DATA 0x00000000 |
| 1261 | #define DDRSS0_PHY_481_DATA 0x00000000 |
| 1262 | #define DDRSS0_PHY_482_DATA 0x00000000 |
| 1263 | #define DDRSS0_PHY_483_DATA 0x00000000 |
| 1264 | #define DDRSS0_PHY_484_DATA 0x00000000 |
| 1265 | #define DDRSS0_PHY_485_DATA 0x00000000 |
| 1266 | #define DDRSS0_PHY_486_DATA 0x00000000 |
| 1267 | #define DDRSS0_PHY_487_DATA 0x00000000 |
| 1268 | #define DDRSS0_PHY_488_DATA 0x00000000 |
| 1269 | #define DDRSS0_PHY_489_DATA 0x00000000 |
| 1270 | #define DDRSS0_PHY_490_DATA 0x00000000 |
| 1271 | #define DDRSS0_PHY_491_DATA 0x00000000 |
| 1272 | #define DDRSS0_PHY_492_DATA 0x00000000 |
| 1273 | #define DDRSS0_PHY_493_DATA 0x00000000 |
| 1274 | #define DDRSS0_PHY_494_DATA 0x00000000 |
| 1275 | #define DDRSS0_PHY_495_DATA 0x00000000 |
| 1276 | #define DDRSS0_PHY_496_DATA 0x00000000 |
| 1277 | #define DDRSS0_PHY_497_DATA 0x00000000 |
| 1278 | #define DDRSS0_PHY_498_DATA 0x00000000 |
| 1279 | #define DDRSS0_PHY_499_DATA 0x00000000 |
| 1280 | #define DDRSS0_PHY_500_DATA 0x00000000 |
| 1281 | #define DDRSS0_PHY_501_DATA 0x00000000 |
| 1282 | #define DDRSS0_PHY_502_DATA 0x00000000 |
| 1283 | #define DDRSS0_PHY_503_DATA 0x00000000 |
| 1284 | #define DDRSS0_PHY_504_DATA 0x00000000 |
| 1285 | #define DDRSS0_PHY_505_DATA 0x00000000 |
| 1286 | #define DDRSS0_PHY_506_DATA 0x00000000 |
| 1287 | #define DDRSS0_PHY_507_DATA 0x00000000 |
| 1288 | #define DDRSS0_PHY_508_DATA 0x00000000 |
| 1289 | #define DDRSS0_PHY_509_DATA 0x00000000 |
| 1290 | #define DDRSS0_PHY_510_DATA 0x00000000 |
| 1291 | #define DDRSS0_PHY_511_DATA 0x00000000 |
| 1292 | #define DDRSS0_PHY_512_DATA 0x000004F0 |
| 1293 | #define DDRSS0_PHY_513_DATA 0x00000000 |
| 1294 | #define DDRSS0_PHY_514_DATA 0x00030200 |
| 1295 | #define DDRSS0_PHY_515_DATA 0x00000000 |
| 1296 | #define DDRSS0_PHY_516_DATA 0x00000000 |
| 1297 | #define DDRSS0_PHY_517_DATA 0x01030000 |
| 1298 | #define DDRSS0_PHY_518_DATA 0x00010000 |
| 1299 | #define DDRSS0_PHY_519_DATA 0x01030004 |
| 1300 | #define DDRSS0_PHY_520_DATA 0x01000000 |
| 1301 | #define DDRSS0_PHY_521_DATA 0x00000000 |
| 1302 | #define DDRSS0_PHY_522_DATA 0x00000000 |
| 1303 | #define DDRSS0_PHY_523_DATA 0x01000001 |
| 1304 | #define DDRSS0_PHY_524_DATA 0x00000100 |
| 1305 | #define DDRSS0_PHY_525_DATA 0x000800C0 |
| 1306 | #define DDRSS0_PHY_526_DATA 0x060100CC |
| 1307 | #define DDRSS0_PHY_527_DATA 0x00030066 |
| 1308 | #define DDRSS0_PHY_528_DATA 0x00000000 |
| 1309 | #define DDRSS0_PHY_529_DATA 0x00000301 |
| 1310 | #define DDRSS0_PHY_530_DATA 0x0000AAAA |
| 1311 | #define DDRSS0_PHY_531_DATA 0x00005555 |
| 1312 | #define DDRSS0_PHY_532_DATA 0x0000B5B5 |
| 1313 | #define DDRSS0_PHY_533_DATA 0x00004A4A |
| 1314 | #define DDRSS0_PHY_534_DATA 0x00005656 |
| 1315 | #define DDRSS0_PHY_535_DATA 0x0000A9A9 |
| 1316 | #define DDRSS0_PHY_536_DATA 0x0000A9A9 |
| 1317 | #define DDRSS0_PHY_537_DATA 0x0000B5B5 |
| 1318 | #define DDRSS0_PHY_538_DATA 0x00000000 |
| 1319 | #define DDRSS0_PHY_539_DATA 0x00000000 |
| 1320 | #define DDRSS0_PHY_540_DATA 0x2A000000 |
| 1321 | #define DDRSS0_PHY_541_DATA 0x00000808 |
| 1322 | #define DDRSS0_PHY_542_DATA 0x0F000000 |
| 1323 | #define DDRSS0_PHY_543_DATA 0x00000F0F |
| 1324 | #define DDRSS0_PHY_544_DATA 0x10400000 |
| 1325 | #define DDRSS0_PHY_545_DATA 0x0C002006 |
| 1326 | #define DDRSS0_PHY_546_DATA 0x00000000 |
| 1327 | #define DDRSS0_PHY_547_DATA 0x00000000 |
| 1328 | #define DDRSS0_PHY_548_DATA 0x55555555 |
| 1329 | #define DDRSS0_PHY_549_DATA 0xAAAAAAAA |
| 1330 | #define DDRSS0_PHY_550_DATA 0x55555555 |
| 1331 | #define DDRSS0_PHY_551_DATA 0xAAAAAAAA |
| 1332 | #define DDRSS0_PHY_552_DATA 0x00005555 |
| 1333 | #define DDRSS0_PHY_553_DATA 0x01000100 |
| 1334 | #define DDRSS0_PHY_554_DATA 0x00800180 |
| 1335 | #define DDRSS0_PHY_555_DATA 0x00000001 |
| 1336 | #define DDRSS0_PHY_556_DATA 0x00000000 |
| 1337 | #define DDRSS0_PHY_557_DATA 0x00000000 |
| 1338 | #define DDRSS0_PHY_558_DATA 0x00000000 |
| 1339 | #define DDRSS0_PHY_559_DATA 0x00000000 |
| 1340 | #define DDRSS0_PHY_560_DATA 0x00000000 |
| 1341 | #define DDRSS0_PHY_561_DATA 0x00000000 |
| 1342 | #define DDRSS0_PHY_562_DATA 0x00000000 |
| 1343 | #define DDRSS0_PHY_563_DATA 0x00000000 |
| 1344 | #define DDRSS0_PHY_564_DATA 0x00000000 |
| 1345 | #define DDRSS0_PHY_565_DATA 0x00000000 |
| 1346 | #define DDRSS0_PHY_566_DATA 0x00000000 |
| 1347 | #define DDRSS0_PHY_567_DATA 0x00000000 |
| 1348 | #define DDRSS0_PHY_568_DATA 0x00000000 |
| 1349 | #define DDRSS0_PHY_569_DATA 0x00000000 |
| 1350 | #define DDRSS0_PHY_570_DATA 0x00000000 |
| 1351 | #define DDRSS0_PHY_571_DATA 0x00000000 |
| 1352 | #define DDRSS0_PHY_572_DATA 0x00000000 |
| 1353 | #define DDRSS0_PHY_573_DATA 0x00000000 |
| 1354 | #define DDRSS0_PHY_574_DATA 0x00000000 |
| 1355 | #define DDRSS0_PHY_575_DATA 0x00000000 |
| 1356 | #define DDRSS0_PHY_576_DATA 0x00000000 |
| 1357 | #define DDRSS0_PHY_577_DATA 0x00000000 |
| 1358 | #define DDRSS0_PHY_578_DATA 0x00000104 |
| 1359 | #define DDRSS0_PHY_579_DATA 0x00000120 |
| 1360 | #define DDRSS0_PHY_580_DATA 0x00000000 |
| 1361 | #define DDRSS0_PHY_581_DATA 0x00000000 |
| 1362 | #define DDRSS0_PHY_582_DATA 0x00000000 |
| 1363 | #define DDRSS0_PHY_583_DATA 0x00000000 |
| 1364 | #define DDRSS0_PHY_584_DATA 0x00000000 |
| 1365 | #define DDRSS0_PHY_585_DATA 0x00000000 |
| 1366 | #define DDRSS0_PHY_586_DATA 0x00000000 |
| 1367 | #define DDRSS0_PHY_587_DATA 0x00000001 |
| 1368 | #define DDRSS0_PHY_588_DATA 0x07FF0000 |
| 1369 | #define DDRSS0_PHY_589_DATA 0x0080081F |
| 1370 | #define DDRSS0_PHY_590_DATA 0x00081020 |
| 1371 | #define DDRSS0_PHY_591_DATA 0x04010000 |
| 1372 | #define DDRSS0_PHY_592_DATA 0x00000000 |
| 1373 | #define DDRSS0_PHY_593_DATA 0x00000000 |
| 1374 | #define DDRSS0_PHY_594_DATA 0x00000000 |
| 1375 | #define DDRSS0_PHY_595_DATA 0x00000100 |
| 1376 | #define DDRSS0_PHY_596_DATA 0x01CC0C01 |
| 1377 | #define DDRSS0_PHY_597_DATA 0x1003CC0C |
| 1378 | #define DDRSS0_PHY_598_DATA 0x20000140 |
| 1379 | #define DDRSS0_PHY_599_DATA 0x07FF0200 |
| 1380 | #define DDRSS0_PHY_600_DATA 0x0000DD01 |
| 1381 | #define DDRSS0_PHY_601_DATA 0x10100303 |
| 1382 | #define DDRSS0_PHY_602_DATA 0x10101010 |
| 1383 | #define DDRSS0_PHY_603_DATA 0x10101010 |
| 1384 | #define DDRSS0_PHY_604_DATA 0x00021010 |
| 1385 | #define DDRSS0_PHY_605_DATA 0x00100010 |
| 1386 | #define DDRSS0_PHY_606_DATA 0x00100010 |
| 1387 | #define DDRSS0_PHY_607_DATA 0x00100010 |
| 1388 | #define DDRSS0_PHY_608_DATA 0x00100010 |
| 1389 | #define DDRSS0_PHY_609_DATA 0x00050010 |
| 1390 | #define DDRSS0_PHY_610_DATA 0x51517041 |
| 1391 | #define DDRSS0_PHY_611_DATA 0x31C06001 |
| 1392 | #define DDRSS0_PHY_612_DATA 0x07AB0340 |
| 1393 | #define DDRSS0_PHY_613_DATA 0x00C0C001 |
| 1394 | #define DDRSS0_PHY_614_DATA 0x0E0D0001 |
| 1395 | #define DDRSS0_PHY_615_DATA 0x10001000 |
| 1396 | #define DDRSS0_PHY_616_DATA 0x0C083E42 |
| 1397 | #define DDRSS0_PHY_617_DATA 0x0F0C3701 |
| 1398 | #define DDRSS0_PHY_618_DATA 0x01000140 |
| 1399 | #define DDRSS0_PHY_619_DATA 0x0C000420 |
| 1400 | #define DDRSS0_PHY_620_DATA 0x00000198 |
| 1401 | #define DDRSS0_PHY_621_DATA 0x0A0000D0 |
| 1402 | #define DDRSS0_PHY_622_DATA 0x00030200 |
| 1403 | #define DDRSS0_PHY_623_DATA 0x02800000 |
| 1404 | #define DDRSS0_PHY_624_DATA 0x80800000 |
| 1405 | #define DDRSS0_PHY_625_DATA 0x000E2010 |
| 1406 | #define DDRSS0_PHY_626_DATA 0x76543210 |
| 1407 | #define DDRSS0_PHY_627_DATA 0x00000008 |
| 1408 | #define DDRSS0_PHY_628_DATA 0x02800280 |
| 1409 | #define DDRSS0_PHY_629_DATA 0x02800280 |
| 1410 | #define DDRSS0_PHY_630_DATA 0x02800280 |
| 1411 | #define DDRSS0_PHY_631_DATA 0x02800280 |
| 1412 | #define DDRSS0_PHY_632_DATA 0x00000280 |
| 1413 | #define DDRSS0_PHY_633_DATA 0x0000A000 |
| 1414 | #define DDRSS0_PHY_634_DATA 0x00A000A0 |
| 1415 | #define DDRSS0_PHY_635_DATA 0x00A000A0 |
| 1416 | #define DDRSS0_PHY_636_DATA 0x00A000A0 |
| 1417 | #define DDRSS0_PHY_637_DATA 0x00A000A0 |
| 1418 | #define DDRSS0_PHY_638_DATA 0x00A000A0 |
| 1419 | #define DDRSS0_PHY_639_DATA 0x00A000A0 |
| 1420 | #define DDRSS0_PHY_640_DATA 0x00A000A0 |
| 1421 | #define DDRSS0_PHY_641_DATA 0x00A000A0 |
| 1422 | #define DDRSS0_PHY_642_DATA 0x01C200A0 |
| 1423 | #define DDRSS0_PHY_643_DATA 0x01A00005 |
| 1424 | #define DDRSS0_PHY_644_DATA 0x00000000 |
| 1425 | #define DDRSS0_PHY_645_DATA 0x00000000 |
| 1426 | #define DDRSS0_PHY_646_DATA 0x00080200 |
| 1427 | #define DDRSS0_PHY_647_DATA 0x00000000 |
| 1428 | #define DDRSS0_PHY_648_DATA 0x20202000 |
| 1429 | #define DDRSS0_PHY_649_DATA 0x20202020 |
| 1430 | #define DDRSS0_PHY_650_DATA 0xF0F02020 |
| 1431 | #define DDRSS0_PHY_651_DATA 0x00000000 |
| 1432 | #define DDRSS0_PHY_652_DATA 0x00000000 |
| 1433 | #define DDRSS0_PHY_653_DATA 0x00000000 |
| 1434 | #define DDRSS0_PHY_654_DATA 0x00000000 |
| 1435 | #define DDRSS0_PHY_655_DATA 0x00000000 |
| 1436 | #define DDRSS0_PHY_656_DATA 0x00000000 |
| 1437 | #define DDRSS0_PHY_657_DATA 0x00000000 |
| 1438 | #define DDRSS0_PHY_658_DATA 0x00000000 |
| 1439 | #define DDRSS0_PHY_659_DATA 0x00000000 |
| 1440 | #define DDRSS0_PHY_660_DATA 0x00000000 |
| 1441 | #define DDRSS0_PHY_661_DATA 0x00000000 |
| 1442 | #define DDRSS0_PHY_662_DATA 0x00000000 |
| 1443 | #define DDRSS0_PHY_663_DATA 0x00000000 |
| 1444 | #define DDRSS0_PHY_664_DATA 0x00000000 |
| 1445 | #define DDRSS0_PHY_665_DATA 0x00000000 |
| 1446 | #define DDRSS0_PHY_666_DATA 0x00000000 |
| 1447 | #define DDRSS0_PHY_667_DATA 0x00000000 |
| 1448 | #define DDRSS0_PHY_668_DATA 0x00000000 |
| 1449 | #define DDRSS0_PHY_669_DATA 0x00000000 |
| 1450 | #define DDRSS0_PHY_670_DATA 0x00000000 |
| 1451 | #define DDRSS0_PHY_671_DATA 0x00000000 |
| 1452 | #define DDRSS0_PHY_672_DATA 0x00000000 |
| 1453 | #define DDRSS0_PHY_673_DATA 0x00000000 |
| 1454 | #define DDRSS0_PHY_674_DATA 0x00000000 |
| 1455 | #define DDRSS0_PHY_675_DATA 0x00000000 |
| 1456 | #define DDRSS0_PHY_676_DATA 0x00000000 |
| 1457 | #define DDRSS0_PHY_677_DATA 0x00000000 |
| 1458 | #define DDRSS0_PHY_678_DATA 0x00000000 |
| 1459 | #define DDRSS0_PHY_679_DATA 0x00000000 |
| 1460 | #define DDRSS0_PHY_680_DATA 0x00000000 |
| 1461 | #define DDRSS0_PHY_681_DATA 0x00000000 |
| 1462 | #define DDRSS0_PHY_682_DATA 0x00000000 |
| 1463 | #define DDRSS0_PHY_683_DATA 0x00000000 |
| 1464 | #define DDRSS0_PHY_684_DATA 0x00000000 |
| 1465 | #define DDRSS0_PHY_685_DATA 0x00000000 |
| 1466 | #define DDRSS0_PHY_686_DATA 0x00000000 |
| 1467 | #define DDRSS0_PHY_687_DATA 0x00000000 |
| 1468 | #define DDRSS0_PHY_688_DATA 0x00000000 |
| 1469 | #define DDRSS0_PHY_689_DATA 0x00000000 |
| 1470 | #define DDRSS0_PHY_690_DATA 0x00000000 |
| 1471 | #define DDRSS0_PHY_691_DATA 0x00000000 |
| 1472 | #define DDRSS0_PHY_692_DATA 0x00000000 |
| 1473 | #define DDRSS0_PHY_693_DATA 0x00000000 |
| 1474 | #define DDRSS0_PHY_694_DATA 0x00000000 |
| 1475 | #define DDRSS0_PHY_695_DATA 0x00000000 |
| 1476 | #define DDRSS0_PHY_696_DATA 0x00000000 |
| 1477 | #define DDRSS0_PHY_697_DATA 0x00000000 |
| 1478 | #define DDRSS0_PHY_698_DATA 0x00000000 |
| 1479 | #define DDRSS0_PHY_699_DATA 0x00000000 |
| 1480 | #define DDRSS0_PHY_700_DATA 0x00000000 |
| 1481 | #define DDRSS0_PHY_701_DATA 0x00000000 |
| 1482 | #define DDRSS0_PHY_702_DATA 0x00000000 |
| 1483 | #define DDRSS0_PHY_703_DATA 0x00000000 |
| 1484 | #define DDRSS0_PHY_704_DATA 0x00000000 |
| 1485 | #define DDRSS0_PHY_705_DATA 0x00000000 |
| 1486 | #define DDRSS0_PHY_706_DATA 0x00000000 |
| 1487 | #define DDRSS0_PHY_707_DATA 0x00000000 |
| 1488 | #define DDRSS0_PHY_708_DATA 0x00000000 |
| 1489 | #define DDRSS0_PHY_709_DATA 0x00000000 |
| 1490 | #define DDRSS0_PHY_710_DATA 0x00000000 |
| 1491 | #define DDRSS0_PHY_711_DATA 0x00000000 |
| 1492 | #define DDRSS0_PHY_712_DATA 0x00000000 |
| 1493 | #define DDRSS0_PHY_713_DATA 0x00000000 |
| 1494 | #define DDRSS0_PHY_714_DATA 0x00000000 |
| 1495 | #define DDRSS0_PHY_715_DATA 0x00000000 |
| 1496 | #define DDRSS0_PHY_716_DATA 0x00000000 |
| 1497 | #define DDRSS0_PHY_717_DATA 0x00000000 |
| 1498 | #define DDRSS0_PHY_718_DATA 0x00000000 |
| 1499 | #define DDRSS0_PHY_719_DATA 0x00000000 |
| 1500 | #define DDRSS0_PHY_720_DATA 0x00000000 |
| 1501 | #define DDRSS0_PHY_721_DATA 0x00000000 |
| 1502 | #define DDRSS0_PHY_722_DATA 0x00000000 |
| 1503 | #define DDRSS0_PHY_723_DATA 0x00000000 |
| 1504 | #define DDRSS0_PHY_724_DATA 0x00000000 |
| 1505 | #define DDRSS0_PHY_725_DATA 0x00000000 |
| 1506 | #define DDRSS0_PHY_726_DATA 0x00000000 |
| 1507 | #define DDRSS0_PHY_727_DATA 0x00000000 |
| 1508 | #define DDRSS0_PHY_728_DATA 0x00000000 |
| 1509 | #define DDRSS0_PHY_729_DATA 0x00000000 |
| 1510 | #define DDRSS0_PHY_730_DATA 0x00000000 |
| 1511 | #define DDRSS0_PHY_731_DATA 0x00000000 |
| 1512 | #define DDRSS0_PHY_732_DATA 0x00000000 |
| 1513 | #define DDRSS0_PHY_733_DATA 0x00000000 |
| 1514 | #define DDRSS0_PHY_734_DATA 0x00000000 |
| 1515 | #define DDRSS0_PHY_735_DATA 0x00000000 |
| 1516 | #define DDRSS0_PHY_736_DATA 0x00000000 |
| 1517 | #define DDRSS0_PHY_737_DATA 0x00000000 |
| 1518 | #define DDRSS0_PHY_738_DATA 0x00000000 |
| 1519 | #define DDRSS0_PHY_739_DATA 0x00000000 |
| 1520 | #define DDRSS0_PHY_740_DATA 0x00000000 |
| 1521 | #define DDRSS0_PHY_741_DATA 0x00000000 |
| 1522 | #define DDRSS0_PHY_742_DATA 0x00000000 |
| 1523 | #define DDRSS0_PHY_743_DATA 0x00000000 |
| 1524 | #define DDRSS0_PHY_744_DATA 0x00000000 |
| 1525 | #define DDRSS0_PHY_745_DATA 0x00000000 |
| 1526 | #define DDRSS0_PHY_746_DATA 0x00000000 |
| 1527 | #define DDRSS0_PHY_747_DATA 0x00000000 |
| 1528 | #define DDRSS0_PHY_748_DATA 0x00000000 |
| 1529 | #define DDRSS0_PHY_749_DATA 0x00000000 |
| 1530 | #define DDRSS0_PHY_750_DATA 0x00000000 |
| 1531 | #define DDRSS0_PHY_751_DATA 0x00000000 |
| 1532 | #define DDRSS0_PHY_752_DATA 0x00000000 |
| 1533 | #define DDRSS0_PHY_753_DATA 0x00000000 |
| 1534 | #define DDRSS0_PHY_754_DATA 0x00000000 |
| 1535 | #define DDRSS0_PHY_755_DATA 0x00000000 |
| 1536 | #define DDRSS0_PHY_756_DATA 0x00000000 |
| 1537 | #define DDRSS0_PHY_757_DATA 0x00000000 |
| 1538 | #define DDRSS0_PHY_758_DATA 0x00000000 |
| 1539 | #define DDRSS0_PHY_759_DATA 0x00000000 |
| 1540 | #define DDRSS0_PHY_760_DATA 0x00000000 |
| 1541 | #define DDRSS0_PHY_761_DATA 0x00000000 |
| 1542 | #define DDRSS0_PHY_762_DATA 0x00000000 |
| 1543 | #define DDRSS0_PHY_763_DATA 0x00000000 |
| 1544 | #define DDRSS0_PHY_764_DATA 0x00000000 |
| 1545 | #define DDRSS0_PHY_765_DATA 0x00000000 |
| 1546 | #define DDRSS0_PHY_766_DATA 0x00000000 |
| 1547 | #define DDRSS0_PHY_767_DATA 0x00000000 |
| 1548 | #define DDRSS0_PHY_768_DATA 0x000004F0 |
| 1549 | #define DDRSS0_PHY_769_DATA 0x00000000 |
| 1550 | #define DDRSS0_PHY_770_DATA 0x00030200 |
| 1551 | #define DDRSS0_PHY_771_DATA 0x00000000 |
| 1552 | #define DDRSS0_PHY_772_DATA 0x00000000 |
| 1553 | #define DDRSS0_PHY_773_DATA 0x01030000 |
| 1554 | #define DDRSS0_PHY_774_DATA 0x00010000 |
| 1555 | #define DDRSS0_PHY_775_DATA 0x01030004 |
| 1556 | #define DDRSS0_PHY_776_DATA 0x01000000 |
| 1557 | #define DDRSS0_PHY_777_DATA 0x00000000 |
| 1558 | #define DDRSS0_PHY_778_DATA 0x00000000 |
| 1559 | #define DDRSS0_PHY_779_DATA 0x01000001 |
| 1560 | #define DDRSS0_PHY_780_DATA 0x00000100 |
| 1561 | #define DDRSS0_PHY_781_DATA 0x000800C0 |
| 1562 | #define DDRSS0_PHY_782_DATA 0x060100CC |
| 1563 | #define DDRSS0_PHY_783_DATA 0x00030066 |
| 1564 | #define DDRSS0_PHY_784_DATA 0x00000000 |
| 1565 | #define DDRSS0_PHY_785_DATA 0x00000301 |
| 1566 | #define DDRSS0_PHY_786_DATA 0x0000AAAA |
| 1567 | #define DDRSS0_PHY_787_DATA 0x00005555 |
| 1568 | #define DDRSS0_PHY_788_DATA 0x0000B5B5 |
| 1569 | #define DDRSS0_PHY_789_DATA 0x00004A4A |
| 1570 | #define DDRSS0_PHY_790_DATA 0x00005656 |
| 1571 | #define DDRSS0_PHY_791_DATA 0x0000A9A9 |
| 1572 | #define DDRSS0_PHY_792_DATA 0x0000A9A9 |
| 1573 | #define DDRSS0_PHY_793_DATA 0x0000B5B5 |
| 1574 | #define DDRSS0_PHY_794_DATA 0x00000000 |
| 1575 | #define DDRSS0_PHY_795_DATA 0x00000000 |
| 1576 | #define DDRSS0_PHY_796_DATA 0x2A000000 |
| 1577 | #define DDRSS0_PHY_797_DATA 0x00000808 |
| 1578 | #define DDRSS0_PHY_798_DATA 0x0F000000 |
| 1579 | #define DDRSS0_PHY_799_DATA 0x00000F0F |
| 1580 | #define DDRSS0_PHY_800_DATA 0x10400000 |
| 1581 | #define DDRSS0_PHY_801_DATA 0x0C002006 |
| 1582 | #define DDRSS0_PHY_802_DATA 0x00000000 |
| 1583 | #define DDRSS0_PHY_803_DATA 0x00000000 |
| 1584 | #define DDRSS0_PHY_804_DATA 0x55555555 |
| 1585 | #define DDRSS0_PHY_805_DATA 0xAAAAAAAA |
| 1586 | #define DDRSS0_PHY_806_DATA 0x55555555 |
| 1587 | #define DDRSS0_PHY_807_DATA 0xAAAAAAAA |
| 1588 | #define DDRSS0_PHY_808_DATA 0x00005555 |
| 1589 | #define DDRSS0_PHY_809_DATA 0x01000100 |
| 1590 | #define DDRSS0_PHY_810_DATA 0x00800180 |
| 1591 | #define DDRSS0_PHY_811_DATA 0x00000000 |
| 1592 | #define DDRSS0_PHY_812_DATA 0x00000000 |
| 1593 | #define DDRSS0_PHY_813_DATA 0x00000000 |
| 1594 | #define DDRSS0_PHY_814_DATA 0x00000000 |
| 1595 | #define DDRSS0_PHY_815_DATA 0x00000000 |
| 1596 | #define DDRSS0_PHY_816_DATA 0x00000000 |
| 1597 | #define DDRSS0_PHY_817_DATA 0x00000000 |
| 1598 | #define DDRSS0_PHY_818_DATA 0x00000000 |
| 1599 | #define DDRSS0_PHY_819_DATA 0x00000000 |
| 1600 | #define DDRSS0_PHY_820_DATA 0x00000000 |
| 1601 | #define DDRSS0_PHY_821_DATA 0x00000000 |
| 1602 | #define DDRSS0_PHY_822_DATA 0x00000000 |
| 1603 | #define DDRSS0_PHY_823_DATA 0x00000000 |
| 1604 | #define DDRSS0_PHY_824_DATA 0x00000000 |
| 1605 | #define DDRSS0_PHY_825_DATA 0x00000000 |
| 1606 | #define DDRSS0_PHY_826_DATA 0x00000000 |
| 1607 | #define DDRSS0_PHY_827_DATA 0x00000000 |
| 1608 | #define DDRSS0_PHY_828_DATA 0x00000000 |
| 1609 | #define DDRSS0_PHY_829_DATA 0x00000000 |
| 1610 | #define DDRSS0_PHY_830_DATA 0x00000000 |
| 1611 | #define DDRSS0_PHY_831_DATA 0x00000000 |
| 1612 | #define DDRSS0_PHY_832_DATA 0x00000000 |
| 1613 | #define DDRSS0_PHY_833_DATA 0x00000000 |
| 1614 | #define DDRSS0_PHY_834_DATA 0x00000104 |
| 1615 | #define DDRSS0_PHY_835_DATA 0x00000120 |
| 1616 | #define DDRSS0_PHY_836_DATA 0x00000000 |
| 1617 | #define DDRSS0_PHY_837_DATA 0x00000000 |
| 1618 | #define DDRSS0_PHY_838_DATA 0x00000000 |
| 1619 | #define DDRSS0_PHY_839_DATA 0x00000000 |
| 1620 | #define DDRSS0_PHY_840_DATA 0x00000000 |
| 1621 | #define DDRSS0_PHY_841_DATA 0x00000000 |
| 1622 | #define DDRSS0_PHY_842_DATA 0x00000000 |
| 1623 | #define DDRSS0_PHY_843_DATA 0x00000001 |
| 1624 | #define DDRSS0_PHY_844_DATA 0x07FF0000 |
| 1625 | #define DDRSS0_PHY_845_DATA 0x0080081F |
| 1626 | #define DDRSS0_PHY_846_DATA 0x00081020 |
| 1627 | #define DDRSS0_PHY_847_DATA 0x04010000 |
| 1628 | #define DDRSS0_PHY_848_DATA 0x00000000 |
| 1629 | #define DDRSS0_PHY_849_DATA 0x00000000 |
| 1630 | #define DDRSS0_PHY_850_DATA 0x00000000 |
| 1631 | #define DDRSS0_PHY_851_DATA 0x00000100 |
| 1632 | #define DDRSS0_PHY_852_DATA 0x01CC0C01 |
| 1633 | #define DDRSS0_PHY_853_DATA 0x1003CC0C |
| 1634 | #define DDRSS0_PHY_854_DATA 0x20000140 |
| 1635 | #define DDRSS0_PHY_855_DATA 0x07FF0200 |
| 1636 | #define DDRSS0_PHY_856_DATA 0x0000DD01 |
| 1637 | #define DDRSS0_PHY_857_DATA 0x10100303 |
| 1638 | #define DDRSS0_PHY_858_DATA 0x10101010 |
| 1639 | #define DDRSS0_PHY_859_DATA 0x10101010 |
| 1640 | #define DDRSS0_PHY_860_DATA 0x00021010 |
| 1641 | #define DDRSS0_PHY_861_DATA 0x00100010 |
| 1642 | #define DDRSS0_PHY_862_DATA 0x00100010 |
| 1643 | #define DDRSS0_PHY_863_DATA 0x00100010 |
| 1644 | #define DDRSS0_PHY_864_DATA 0x00100010 |
| 1645 | #define DDRSS0_PHY_865_DATA 0x00050010 |
| 1646 | #define DDRSS0_PHY_866_DATA 0x51517041 |
| 1647 | #define DDRSS0_PHY_867_DATA 0x31C06001 |
| 1648 | #define DDRSS0_PHY_868_DATA 0x07AB0340 |
| 1649 | #define DDRSS0_PHY_869_DATA 0x00C0C001 |
| 1650 | #define DDRSS0_PHY_870_DATA 0x0E0D0001 |
| 1651 | #define DDRSS0_PHY_871_DATA 0x10001000 |
| 1652 | #define DDRSS0_PHY_872_DATA 0x0C083E42 |
| 1653 | #define DDRSS0_PHY_873_DATA 0x0F0C3701 |
| 1654 | #define DDRSS0_PHY_874_DATA 0x01000140 |
| 1655 | #define DDRSS0_PHY_875_DATA 0x0C000420 |
| 1656 | #define DDRSS0_PHY_876_DATA 0x00000198 |
| 1657 | #define DDRSS0_PHY_877_DATA 0x0A0000D0 |
| 1658 | #define DDRSS0_PHY_878_DATA 0x00030200 |
| 1659 | #define DDRSS0_PHY_879_DATA 0x02800000 |
| 1660 | #define DDRSS0_PHY_880_DATA 0x80800000 |
| 1661 | #define DDRSS0_PHY_881_DATA 0x000E2010 |
| 1662 | #define DDRSS0_PHY_882_DATA 0x76543210 |
| 1663 | #define DDRSS0_PHY_883_DATA 0x00000008 |
| 1664 | #define DDRSS0_PHY_884_DATA 0x02800280 |
| 1665 | #define DDRSS0_PHY_885_DATA 0x02800280 |
| 1666 | #define DDRSS0_PHY_886_DATA 0x02800280 |
| 1667 | #define DDRSS0_PHY_887_DATA 0x02800280 |
| 1668 | #define DDRSS0_PHY_888_DATA 0x00000280 |
| 1669 | #define DDRSS0_PHY_889_DATA 0x0000A000 |
| 1670 | #define DDRSS0_PHY_890_DATA 0x00A000A0 |
| 1671 | #define DDRSS0_PHY_891_DATA 0x00A000A0 |
| 1672 | #define DDRSS0_PHY_892_DATA 0x00A000A0 |
| 1673 | #define DDRSS0_PHY_893_DATA 0x00A000A0 |
| 1674 | #define DDRSS0_PHY_894_DATA 0x00A000A0 |
| 1675 | #define DDRSS0_PHY_895_DATA 0x00A000A0 |
| 1676 | #define DDRSS0_PHY_896_DATA 0x00A000A0 |
| 1677 | #define DDRSS0_PHY_897_DATA 0x00A000A0 |
| 1678 | #define DDRSS0_PHY_898_DATA 0x01C200A0 |
| 1679 | #define DDRSS0_PHY_899_DATA 0x01A00005 |
| 1680 | #define DDRSS0_PHY_900_DATA 0x00000000 |
| 1681 | #define DDRSS0_PHY_901_DATA 0x00000000 |
| 1682 | #define DDRSS0_PHY_902_DATA 0x00080200 |
| 1683 | #define DDRSS0_PHY_903_DATA 0x00000000 |
| 1684 | #define DDRSS0_PHY_904_DATA 0x20202000 |
| 1685 | #define DDRSS0_PHY_905_DATA 0x20202020 |
| 1686 | #define DDRSS0_PHY_906_DATA 0xF0F02020 |
| 1687 | #define DDRSS0_PHY_907_DATA 0x00000000 |
| 1688 | #define DDRSS0_PHY_908_DATA 0x00000000 |
| 1689 | #define DDRSS0_PHY_909_DATA 0x00000000 |
| 1690 | #define DDRSS0_PHY_910_DATA 0x00000000 |
| 1691 | #define DDRSS0_PHY_911_DATA 0x00000000 |
| 1692 | #define DDRSS0_PHY_912_DATA 0x00000000 |
| 1693 | #define DDRSS0_PHY_913_DATA 0x00000000 |
| 1694 | #define DDRSS0_PHY_914_DATA 0x00000000 |
| 1695 | #define DDRSS0_PHY_915_DATA 0x00000000 |
| 1696 | #define DDRSS0_PHY_916_DATA 0x00000000 |
| 1697 | #define DDRSS0_PHY_917_DATA 0x00000000 |
| 1698 | #define DDRSS0_PHY_918_DATA 0x00000000 |
| 1699 | #define DDRSS0_PHY_919_DATA 0x00000000 |
| 1700 | #define DDRSS0_PHY_920_DATA 0x00000000 |
| 1701 | #define DDRSS0_PHY_921_DATA 0x00000000 |
| 1702 | #define DDRSS0_PHY_922_DATA 0x00000000 |
| 1703 | #define DDRSS0_PHY_923_DATA 0x00000000 |
| 1704 | #define DDRSS0_PHY_924_DATA 0x00000000 |
| 1705 | #define DDRSS0_PHY_925_DATA 0x00000000 |
| 1706 | #define DDRSS0_PHY_926_DATA 0x00000000 |
| 1707 | #define DDRSS0_PHY_927_DATA 0x00000000 |
| 1708 | #define DDRSS0_PHY_928_DATA 0x00000000 |
| 1709 | #define DDRSS0_PHY_929_DATA 0x00000000 |
| 1710 | #define DDRSS0_PHY_930_DATA 0x00000000 |
| 1711 | #define DDRSS0_PHY_931_DATA 0x00000000 |
| 1712 | #define DDRSS0_PHY_932_DATA 0x00000000 |
| 1713 | #define DDRSS0_PHY_933_DATA 0x00000000 |
| 1714 | #define DDRSS0_PHY_934_DATA 0x00000000 |
| 1715 | #define DDRSS0_PHY_935_DATA 0x00000000 |
| 1716 | #define DDRSS0_PHY_936_DATA 0x00000000 |
| 1717 | #define DDRSS0_PHY_937_DATA 0x00000000 |
| 1718 | #define DDRSS0_PHY_938_DATA 0x00000000 |
| 1719 | #define DDRSS0_PHY_939_DATA 0x00000000 |
| 1720 | #define DDRSS0_PHY_940_DATA 0x00000000 |
| 1721 | #define DDRSS0_PHY_941_DATA 0x00000000 |
| 1722 | #define DDRSS0_PHY_942_DATA 0x00000000 |
| 1723 | #define DDRSS0_PHY_943_DATA 0x00000000 |
| 1724 | #define DDRSS0_PHY_944_DATA 0x00000000 |
| 1725 | #define DDRSS0_PHY_945_DATA 0x00000000 |
| 1726 | #define DDRSS0_PHY_946_DATA 0x00000000 |
| 1727 | #define DDRSS0_PHY_947_DATA 0x00000000 |
| 1728 | #define DDRSS0_PHY_948_DATA 0x00000000 |
| 1729 | #define DDRSS0_PHY_949_DATA 0x00000000 |
| 1730 | #define DDRSS0_PHY_950_DATA 0x00000000 |
| 1731 | #define DDRSS0_PHY_951_DATA 0x00000000 |
| 1732 | #define DDRSS0_PHY_952_DATA 0x00000000 |
| 1733 | #define DDRSS0_PHY_953_DATA 0x00000000 |
| 1734 | #define DDRSS0_PHY_954_DATA 0x00000000 |
| 1735 | #define DDRSS0_PHY_955_DATA 0x00000000 |
| 1736 | #define DDRSS0_PHY_956_DATA 0x00000000 |
| 1737 | #define DDRSS0_PHY_957_DATA 0x00000000 |
| 1738 | #define DDRSS0_PHY_958_DATA 0x00000000 |
| 1739 | #define DDRSS0_PHY_959_DATA 0x00000000 |
| 1740 | #define DDRSS0_PHY_960_DATA 0x00000000 |
| 1741 | #define DDRSS0_PHY_961_DATA 0x00000000 |
| 1742 | #define DDRSS0_PHY_962_DATA 0x00000000 |
| 1743 | #define DDRSS0_PHY_963_DATA 0x00000000 |
| 1744 | #define DDRSS0_PHY_964_DATA 0x00000000 |
| 1745 | #define DDRSS0_PHY_965_DATA 0x00000000 |
| 1746 | #define DDRSS0_PHY_966_DATA 0x00000000 |
| 1747 | #define DDRSS0_PHY_967_DATA 0x00000000 |
| 1748 | #define DDRSS0_PHY_968_DATA 0x00000000 |
| 1749 | #define DDRSS0_PHY_969_DATA 0x00000000 |
| 1750 | #define DDRSS0_PHY_970_DATA 0x00000000 |
| 1751 | #define DDRSS0_PHY_971_DATA 0x00000000 |
| 1752 | #define DDRSS0_PHY_972_DATA 0x00000000 |
| 1753 | #define DDRSS0_PHY_973_DATA 0x00000000 |
| 1754 | #define DDRSS0_PHY_974_DATA 0x00000000 |
| 1755 | #define DDRSS0_PHY_975_DATA 0x00000000 |
| 1756 | #define DDRSS0_PHY_976_DATA 0x00000000 |
| 1757 | #define DDRSS0_PHY_977_DATA 0x00000000 |
| 1758 | #define DDRSS0_PHY_978_DATA 0x00000000 |
| 1759 | #define DDRSS0_PHY_979_DATA 0x00000000 |
| 1760 | #define DDRSS0_PHY_980_DATA 0x00000000 |
| 1761 | #define DDRSS0_PHY_981_DATA 0x00000000 |
| 1762 | #define DDRSS0_PHY_982_DATA 0x00000000 |
| 1763 | #define DDRSS0_PHY_983_DATA 0x00000000 |
| 1764 | #define DDRSS0_PHY_984_DATA 0x00000000 |
| 1765 | #define DDRSS0_PHY_985_DATA 0x00000000 |
| 1766 | #define DDRSS0_PHY_986_DATA 0x00000000 |
| 1767 | #define DDRSS0_PHY_987_DATA 0x00000000 |
| 1768 | #define DDRSS0_PHY_988_DATA 0x00000000 |
| 1769 | #define DDRSS0_PHY_989_DATA 0x00000000 |
| 1770 | #define DDRSS0_PHY_990_DATA 0x00000000 |
| 1771 | #define DDRSS0_PHY_991_DATA 0x00000000 |
| 1772 | #define DDRSS0_PHY_992_DATA 0x00000000 |
| 1773 | #define DDRSS0_PHY_993_DATA 0x00000000 |
| 1774 | #define DDRSS0_PHY_994_DATA 0x00000000 |
| 1775 | #define DDRSS0_PHY_995_DATA 0x00000000 |
| 1776 | #define DDRSS0_PHY_996_DATA 0x00000000 |
| 1777 | #define DDRSS0_PHY_997_DATA 0x00000000 |
| 1778 | #define DDRSS0_PHY_998_DATA 0x00000000 |
| 1779 | #define DDRSS0_PHY_999_DATA 0x00000000 |
| 1780 | #define DDRSS0_PHY_1000_DATA 0x00000000 |
| 1781 | #define DDRSS0_PHY_1001_DATA 0x00000000 |
| 1782 | #define DDRSS0_PHY_1002_DATA 0x00000000 |
| 1783 | #define DDRSS0_PHY_1003_DATA 0x00000000 |
| 1784 | #define DDRSS0_PHY_1004_DATA 0x00000000 |
| 1785 | #define DDRSS0_PHY_1005_DATA 0x00000000 |
| 1786 | #define DDRSS0_PHY_1006_DATA 0x00000000 |
| 1787 | #define DDRSS0_PHY_1007_DATA 0x00000000 |
| 1788 | #define DDRSS0_PHY_1008_DATA 0x00000000 |
| 1789 | #define DDRSS0_PHY_1009_DATA 0x00000000 |
| 1790 | #define DDRSS0_PHY_1010_DATA 0x00000000 |
| 1791 | #define DDRSS0_PHY_1011_DATA 0x00000000 |
| 1792 | #define DDRSS0_PHY_1012_DATA 0x00000000 |
| 1793 | #define DDRSS0_PHY_1013_DATA 0x00000000 |
| 1794 | #define DDRSS0_PHY_1014_DATA 0x00000000 |
| 1795 | #define DDRSS0_PHY_1015_DATA 0x00000000 |
| 1796 | #define DDRSS0_PHY_1016_DATA 0x00000000 |
| 1797 | #define DDRSS0_PHY_1017_DATA 0x00000000 |
| 1798 | #define DDRSS0_PHY_1018_DATA 0x00000000 |
| 1799 | #define DDRSS0_PHY_1019_DATA 0x00000000 |
| 1800 | #define DDRSS0_PHY_1020_DATA 0x00000000 |
| 1801 | #define DDRSS0_PHY_1021_DATA 0x00000000 |
| 1802 | #define DDRSS0_PHY_1022_DATA 0x00000000 |
| 1803 | #define DDRSS0_PHY_1023_DATA 0x00000000 |
| 1804 | #define DDRSS0_PHY_1024_DATA 0x00000000 |
| 1805 | #define DDRSS0_PHY_1025_DATA 0x00000000 |
| 1806 | #define DDRSS0_PHY_1026_DATA 0x00000000 |
| 1807 | #define DDRSS0_PHY_1027_DATA 0x00000000 |
| 1808 | #define DDRSS0_PHY_1028_DATA 0x00000000 |
| 1809 | #define DDRSS0_PHY_1029_DATA 0x00000100 |
| 1810 | #define DDRSS0_PHY_1030_DATA 0x00000200 |
| 1811 | #define DDRSS0_PHY_1031_DATA 0x00000000 |
| 1812 | #define DDRSS0_PHY_1032_DATA 0x00000000 |
| 1813 | #define DDRSS0_PHY_1033_DATA 0x00000000 |
| 1814 | #define DDRSS0_PHY_1034_DATA 0x00000000 |
| 1815 | #define DDRSS0_PHY_1035_DATA 0x00400000 |
| 1816 | #define DDRSS0_PHY_1036_DATA 0x00000080 |
| 1817 | #define DDRSS0_PHY_1037_DATA 0x00DCBA98 |
| 1818 | #define DDRSS0_PHY_1038_DATA 0x03000000 |
| 1819 | #define DDRSS0_PHY_1039_DATA 0x00200000 |
| 1820 | #define DDRSS0_PHY_1040_DATA 0x00000000 |
| 1821 | #define DDRSS0_PHY_1041_DATA 0x00000000 |
| 1822 | #define DDRSS0_PHY_1042_DATA 0x00000000 |
| 1823 | #define DDRSS0_PHY_1043_DATA 0x00000000 |
| 1824 | #define DDRSS0_PHY_1044_DATA 0x00000000 |
| 1825 | #define DDRSS0_PHY_1045_DATA 0x0000002A |
| 1826 | #define DDRSS0_PHY_1046_DATA 0x00000015 |
| 1827 | #define DDRSS0_PHY_1047_DATA 0x00000015 |
| 1828 | #define DDRSS0_PHY_1048_DATA 0x0000002A |
| 1829 | #define DDRSS0_PHY_1049_DATA 0x00000033 |
| 1830 | #define DDRSS0_PHY_1050_DATA 0x0000000C |
| 1831 | #define DDRSS0_PHY_1051_DATA 0x0000000C |
| 1832 | #define DDRSS0_PHY_1052_DATA 0x00000033 |
| 1833 | #define DDRSS0_PHY_1053_DATA 0x00543210 |
| 1834 | #define DDRSS0_PHY_1054_DATA 0x003F0000 |
| 1835 | #define DDRSS0_PHY_1055_DATA 0x000F013F |
| 1836 | #define DDRSS0_PHY_1056_DATA 0x20202003 |
| 1837 | #define DDRSS0_PHY_1057_DATA 0x00202020 |
| 1838 | #define DDRSS0_PHY_1058_DATA 0x20008008 |
| 1839 | #define DDRSS0_PHY_1059_DATA 0x00000810 |
| 1840 | #define DDRSS0_PHY_1060_DATA 0x00000F00 |
| 1841 | #define DDRSS0_PHY_1061_DATA 0x00000000 |
| 1842 | #define DDRSS0_PHY_1062_DATA 0x00000000 |
| 1843 | #define DDRSS0_PHY_1063_DATA 0x00000000 |
| 1844 | #define DDRSS0_PHY_1064_DATA 0x000305CC |
| 1845 | #define DDRSS0_PHY_1065_DATA 0x00030000 |
| 1846 | #define DDRSS0_PHY_1066_DATA 0x00000300 |
| 1847 | #define DDRSS0_PHY_1067_DATA 0x00000300 |
| 1848 | #define DDRSS0_PHY_1068_DATA 0x00000300 |
| 1849 | #define DDRSS0_PHY_1069_DATA 0x00000300 |
| 1850 | #define DDRSS0_PHY_1070_DATA 0x00000300 |
| 1851 | #define DDRSS0_PHY_1071_DATA 0x42080010 |
| 1852 | #define DDRSS0_PHY_1072_DATA 0x0000803E |
| 1853 | #define DDRSS0_PHY_1073_DATA 0x00000001 |
| 1854 | #define DDRSS0_PHY_1074_DATA 0x01000102 |
| 1855 | #define DDRSS0_PHY_1075_DATA 0x00008000 |
| 1856 | #define DDRSS0_PHY_1076_DATA 0x00000000 |
| 1857 | #define DDRSS0_PHY_1077_DATA 0x00000000 |
| 1858 | #define DDRSS0_PHY_1078_DATA 0x00000000 |
| 1859 | #define DDRSS0_PHY_1079_DATA 0x00000000 |
| 1860 | #define DDRSS0_PHY_1080_DATA 0x00000000 |
| 1861 | #define DDRSS0_PHY_1081_DATA 0x00000000 |
| 1862 | #define DDRSS0_PHY_1082_DATA 0x00000000 |
| 1863 | #define DDRSS0_PHY_1083_DATA 0x00000000 |
| 1864 | #define DDRSS0_PHY_1084_DATA 0x00000000 |
| 1865 | #define DDRSS0_PHY_1085_DATA 0x00000000 |
| 1866 | #define DDRSS0_PHY_1086_DATA 0x00000000 |
| 1867 | #define DDRSS0_PHY_1087_DATA 0x00000000 |
| 1868 | #define DDRSS0_PHY_1088_DATA 0x00000000 |
| 1869 | #define DDRSS0_PHY_1089_DATA 0x00000000 |
| 1870 | #define DDRSS0_PHY_1090_DATA 0x00000000 |
| 1871 | #define DDRSS0_PHY_1091_DATA 0x00000000 |
| 1872 | #define DDRSS0_PHY_1092_DATA 0x00000000 |
| 1873 | #define DDRSS0_PHY_1093_DATA 0x00000000 |
| 1874 | #define DDRSS0_PHY_1094_DATA 0x00000000 |
| 1875 | #define DDRSS0_PHY_1095_DATA 0x00000000 |
| 1876 | #define DDRSS0_PHY_1096_DATA 0x00000000 |
| 1877 | #define DDRSS0_PHY_1097_DATA 0x00000000 |
| 1878 | #define DDRSS0_PHY_1098_DATA 0x00000000 |
| 1879 | #define DDRSS0_PHY_1099_DATA 0x00000000 |
| 1880 | #define DDRSS0_PHY_1100_DATA 0x00000000 |
| 1881 | #define DDRSS0_PHY_1101_DATA 0x00000000 |
| 1882 | #define DDRSS0_PHY_1102_DATA 0x00000000 |
| 1883 | #define DDRSS0_PHY_1103_DATA 0x00000000 |
| 1884 | #define DDRSS0_PHY_1104_DATA 0x00000000 |
| 1885 | #define DDRSS0_PHY_1105_DATA 0x00000000 |
| 1886 | #define DDRSS0_PHY_1106_DATA 0x00000000 |
| 1887 | #define DDRSS0_PHY_1107_DATA 0x00000000 |
| 1888 | #define DDRSS0_PHY_1108_DATA 0x00000000 |
| 1889 | #define DDRSS0_PHY_1109_DATA 0x00000000 |
| 1890 | #define DDRSS0_PHY_1110_DATA 0x00000000 |
| 1891 | #define DDRSS0_PHY_1111_DATA 0x00000000 |
| 1892 | #define DDRSS0_PHY_1112_DATA 0x00000000 |
| 1893 | #define DDRSS0_PHY_1113_DATA 0x00000000 |
| 1894 | #define DDRSS0_PHY_1114_DATA 0x00000000 |
| 1895 | #define DDRSS0_PHY_1115_DATA 0x00000000 |
| 1896 | #define DDRSS0_PHY_1116_DATA 0x00000000 |
| 1897 | #define DDRSS0_PHY_1117_DATA 0x00000000 |
| 1898 | #define DDRSS0_PHY_1118_DATA 0x00000000 |
| 1899 | #define DDRSS0_PHY_1119_DATA 0x00000000 |
| 1900 | #define DDRSS0_PHY_1120_DATA 0x00000000 |
| 1901 | #define DDRSS0_PHY_1121_DATA 0x00000000 |
| 1902 | #define DDRSS0_PHY_1122_DATA 0x00000000 |
| 1903 | #define DDRSS0_PHY_1123_DATA 0x00000000 |
| 1904 | #define DDRSS0_PHY_1124_DATA 0x00000000 |
| 1905 | #define DDRSS0_PHY_1125_DATA 0x00000000 |
| 1906 | #define DDRSS0_PHY_1126_DATA 0x00000000 |
| 1907 | #define DDRSS0_PHY_1127_DATA 0x00000000 |
| 1908 | #define DDRSS0_PHY_1128_DATA 0x00000000 |
| 1909 | #define DDRSS0_PHY_1129_DATA 0x00000000 |
| 1910 | #define DDRSS0_PHY_1130_DATA 0x00000000 |
| 1911 | #define DDRSS0_PHY_1131_DATA 0x00000000 |
| 1912 | #define DDRSS0_PHY_1132_DATA 0x00000000 |
| 1913 | #define DDRSS0_PHY_1133_DATA 0x00000000 |
| 1914 | #define DDRSS0_PHY_1134_DATA 0x00000000 |
| 1915 | #define DDRSS0_PHY_1135_DATA 0x00000000 |
| 1916 | #define DDRSS0_PHY_1136_DATA 0x00000000 |
| 1917 | #define DDRSS0_PHY_1137_DATA 0x00000000 |
| 1918 | #define DDRSS0_PHY_1138_DATA 0x00000000 |
| 1919 | #define DDRSS0_PHY_1139_DATA 0x00000000 |
| 1920 | #define DDRSS0_PHY_1140_DATA 0x00000000 |
| 1921 | #define DDRSS0_PHY_1141_DATA 0x00000000 |
| 1922 | #define DDRSS0_PHY_1142_DATA 0x00000000 |
| 1923 | #define DDRSS0_PHY_1143_DATA 0x00000000 |
| 1924 | #define DDRSS0_PHY_1144_DATA 0x00000000 |
| 1925 | #define DDRSS0_PHY_1145_DATA 0x00000000 |
| 1926 | #define DDRSS0_PHY_1146_DATA 0x00000000 |
| 1927 | #define DDRSS0_PHY_1147_DATA 0x00000000 |
| 1928 | #define DDRSS0_PHY_1148_DATA 0x00000000 |
| 1929 | #define DDRSS0_PHY_1149_DATA 0x00000000 |
| 1930 | #define DDRSS0_PHY_1150_DATA 0x00000000 |
| 1931 | #define DDRSS0_PHY_1151_DATA 0x00000000 |
| 1932 | #define DDRSS0_PHY_1152_DATA 0x00000000 |
| 1933 | #define DDRSS0_PHY_1153_DATA 0x00000000 |
| 1934 | #define DDRSS0_PHY_1154_DATA 0x00000000 |
| 1935 | #define DDRSS0_PHY_1155_DATA 0x00000000 |
| 1936 | #define DDRSS0_PHY_1156_DATA 0x00000000 |
| 1937 | #define DDRSS0_PHY_1157_DATA 0x00000000 |
| 1938 | #define DDRSS0_PHY_1158_DATA 0x00000000 |
| 1939 | #define DDRSS0_PHY_1159_DATA 0x00000000 |
| 1940 | #define DDRSS0_PHY_1160_DATA 0x00000000 |
| 1941 | #define DDRSS0_PHY_1161_DATA 0x00000000 |
| 1942 | #define DDRSS0_PHY_1162_DATA 0x00000000 |
| 1943 | #define DDRSS0_PHY_1163_DATA 0x00000000 |
| 1944 | #define DDRSS0_PHY_1164_DATA 0x00000000 |
| 1945 | #define DDRSS0_PHY_1165_DATA 0x00000000 |
| 1946 | #define DDRSS0_PHY_1166_DATA 0x00000000 |
| 1947 | #define DDRSS0_PHY_1167_DATA 0x00000000 |
| 1948 | #define DDRSS0_PHY_1168_DATA 0x00000000 |
| 1949 | #define DDRSS0_PHY_1169_DATA 0x00000000 |
| 1950 | #define DDRSS0_PHY_1170_DATA 0x00000000 |
| 1951 | #define DDRSS0_PHY_1171_DATA 0x00000000 |
| 1952 | #define DDRSS0_PHY_1172_DATA 0x00000000 |
| 1953 | #define DDRSS0_PHY_1173_DATA 0x00000000 |
| 1954 | #define DDRSS0_PHY_1174_DATA 0x00000000 |
| 1955 | #define DDRSS0_PHY_1175_DATA 0x00000000 |
| 1956 | #define DDRSS0_PHY_1176_DATA 0x00000000 |
| 1957 | #define DDRSS0_PHY_1177_DATA 0x00000000 |
| 1958 | #define DDRSS0_PHY_1178_DATA 0x00000000 |
| 1959 | #define DDRSS0_PHY_1179_DATA 0x00000000 |
| 1960 | #define DDRSS0_PHY_1180_DATA 0x00000000 |
| 1961 | #define DDRSS0_PHY_1181_DATA 0x00000000 |
| 1962 | #define DDRSS0_PHY_1182_DATA 0x00000000 |
| 1963 | #define DDRSS0_PHY_1183_DATA 0x00000000 |
| 1964 | #define DDRSS0_PHY_1184_DATA 0x00000000 |
| 1965 | #define DDRSS0_PHY_1185_DATA 0x00000000 |
| 1966 | #define DDRSS0_PHY_1186_DATA 0x00000000 |
| 1967 | #define DDRSS0_PHY_1187_DATA 0x00000000 |
| 1968 | #define DDRSS0_PHY_1188_DATA 0x00000000 |
| 1969 | #define DDRSS0_PHY_1189_DATA 0x00000000 |
| 1970 | #define DDRSS0_PHY_1190_DATA 0x00000000 |
| 1971 | #define DDRSS0_PHY_1191_DATA 0x00000000 |
| 1972 | #define DDRSS0_PHY_1192_DATA 0x00000000 |
| 1973 | #define DDRSS0_PHY_1193_DATA 0x00000000 |
| 1974 | #define DDRSS0_PHY_1194_DATA 0x00000000 |
| 1975 | #define DDRSS0_PHY_1195_DATA 0x00000000 |
| 1976 | #define DDRSS0_PHY_1196_DATA 0x00000000 |
| 1977 | #define DDRSS0_PHY_1197_DATA 0x00000000 |
| 1978 | #define DDRSS0_PHY_1198_DATA 0x00000000 |
| 1979 | #define DDRSS0_PHY_1199_DATA 0x00000000 |
| 1980 | #define DDRSS0_PHY_1200_DATA 0x00000000 |
| 1981 | #define DDRSS0_PHY_1201_DATA 0x00000000 |
| 1982 | #define DDRSS0_PHY_1202_DATA 0x00000000 |
| 1983 | #define DDRSS0_PHY_1203_DATA 0x00000000 |
| 1984 | #define DDRSS0_PHY_1204_DATA 0x00000000 |
| 1985 | #define DDRSS0_PHY_1205_DATA 0x00000000 |
| 1986 | #define DDRSS0_PHY_1206_DATA 0x00000000 |
| 1987 | #define DDRSS0_PHY_1207_DATA 0x00000000 |
| 1988 | #define DDRSS0_PHY_1208_DATA 0x00000000 |
| 1989 | #define DDRSS0_PHY_1209_DATA 0x00000000 |
| 1990 | #define DDRSS0_PHY_1210_DATA 0x00000000 |
| 1991 | #define DDRSS0_PHY_1211_DATA 0x00000000 |
| 1992 | #define DDRSS0_PHY_1212_DATA 0x00000000 |
| 1993 | #define DDRSS0_PHY_1213_DATA 0x00000000 |
| 1994 | #define DDRSS0_PHY_1214_DATA 0x00000000 |
| 1995 | #define DDRSS0_PHY_1215_DATA 0x00000000 |
| 1996 | #define DDRSS0_PHY_1216_DATA 0x00000000 |
| 1997 | #define DDRSS0_PHY_1217_DATA 0x00000000 |
| 1998 | #define DDRSS0_PHY_1218_DATA 0x00000000 |
| 1999 | #define DDRSS0_PHY_1219_DATA 0x00000000 |
| 2000 | #define DDRSS0_PHY_1220_DATA 0x00000000 |
| 2001 | #define DDRSS0_PHY_1221_DATA 0x00000000 |
| 2002 | #define DDRSS0_PHY_1222_DATA 0x00000000 |
| 2003 | #define DDRSS0_PHY_1223_DATA 0x00000000 |
| 2004 | #define DDRSS0_PHY_1224_DATA 0x00000000 |
| 2005 | #define DDRSS0_PHY_1225_DATA 0x00000000 |
| 2006 | #define DDRSS0_PHY_1226_DATA 0x00000000 |
| 2007 | #define DDRSS0_PHY_1227_DATA 0x00000000 |
| 2008 | #define DDRSS0_PHY_1228_DATA 0x00000000 |
| 2009 | #define DDRSS0_PHY_1229_DATA 0x00000000 |
| 2010 | #define DDRSS0_PHY_1230_DATA 0x00000000 |
| 2011 | #define DDRSS0_PHY_1231_DATA 0x00000000 |
| 2012 | #define DDRSS0_PHY_1232_DATA 0x00000000 |
| 2013 | #define DDRSS0_PHY_1233_DATA 0x00000000 |
| 2014 | #define DDRSS0_PHY_1234_DATA 0x00000000 |
| 2015 | #define DDRSS0_PHY_1235_DATA 0x00000000 |
| 2016 | #define DDRSS0_PHY_1236_DATA 0x00000000 |
| 2017 | #define DDRSS0_PHY_1237_DATA 0x00000000 |
| 2018 | #define DDRSS0_PHY_1238_DATA 0x00000000 |
| 2019 | #define DDRSS0_PHY_1239_DATA 0x00000000 |
| 2020 | #define DDRSS0_PHY_1240_DATA 0x00000000 |
| 2021 | #define DDRSS0_PHY_1241_DATA 0x00000000 |
| 2022 | #define DDRSS0_PHY_1242_DATA 0x00000000 |
| 2023 | #define DDRSS0_PHY_1243_DATA 0x00000000 |
| 2024 | #define DDRSS0_PHY_1244_DATA 0x00000000 |
| 2025 | #define DDRSS0_PHY_1245_DATA 0x00000000 |
| 2026 | #define DDRSS0_PHY_1246_DATA 0x00000000 |
| 2027 | #define DDRSS0_PHY_1247_DATA 0x00000000 |
| 2028 | #define DDRSS0_PHY_1248_DATA 0x00000000 |
| 2029 | #define DDRSS0_PHY_1249_DATA 0x00000000 |
| 2030 | #define DDRSS0_PHY_1250_DATA 0x00000000 |
| 2031 | #define DDRSS0_PHY_1251_DATA 0x00000000 |
| 2032 | #define DDRSS0_PHY_1252_DATA 0x00000000 |
| 2033 | #define DDRSS0_PHY_1253_DATA 0x00000000 |
| 2034 | #define DDRSS0_PHY_1254_DATA 0x00000000 |
| 2035 | #define DDRSS0_PHY_1255_DATA 0x00000000 |
| 2036 | #define DDRSS0_PHY_1256_DATA 0x00000000 |
| 2037 | #define DDRSS0_PHY_1257_DATA 0x00000000 |
| 2038 | #define DDRSS0_PHY_1258_DATA 0x00000000 |
| 2039 | #define DDRSS0_PHY_1259_DATA 0x00000000 |
| 2040 | #define DDRSS0_PHY_1260_DATA 0x00000000 |
| 2041 | #define DDRSS0_PHY_1261_DATA 0x00000000 |
| 2042 | #define DDRSS0_PHY_1262_DATA 0x00000000 |
| 2043 | #define DDRSS0_PHY_1263_DATA 0x00000000 |
| 2044 | #define DDRSS0_PHY_1264_DATA 0x00000000 |
| 2045 | #define DDRSS0_PHY_1265_DATA 0x00000000 |
| 2046 | #define DDRSS0_PHY_1266_DATA 0x00000000 |
| 2047 | #define DDRSS0_PHY_1267_DATA 0x00000000 |
| 2048 | #define DDRSS0_PHY_1268_DATA 0x00000000 |
| 2049 | #define DDRSS0_PHY_1269_DATA 0x00000000 |
| 2050 | #define DDRSS0_PHY_1270_DATA 0x00000000 |
| 2051 | #define DDRSS0_PHY_1271_DATA 0x00000000 |
| 2052 | #define DDRSS0_PHY_1272_DATA 0x00000000 |
| 2053 | #define DDRSS0_PHY_1273_DATA 0x00000000 |
| 2054 | #define DDRSS0_PHY_1274_DATA 0x00000000 |
| 2055 | #define DDRSS0_PHY_1275_DATA 0x00000000 |
| 2056 | #define DDRSS0_PHY_1276_DATA 0x00000000 |
| 2057 | #define DDRSS0_PHY_1277_DATA 0x00000000 |
| 2058 | #define DDRSS0_PHY_1278_DATA 0x00000000 |
| 2059 | #define DDRSS0_PHY_1279_DATA 0x00000000 |
| 2060 | #define DDRSS0_PHY_1280_DATA 0x00000000 |
| 2061 | #define DDRSS0_PHY_1281_DATA 0x00010100 |
| 2062 | #define DDRSS0_PHY_1282_DATA 0x00000000 |
| 2063 | #define DDRSS0_PHY_1283_DATA 0x00000000 |
| 2064 | #define DDRSS0_PHY_1284_DATA 0x00050000 |
| 2065 | #define DDRSS0_PHY_1285_DATA 0x04000000 |
| 2066 | #define DDRSS0_PHY_1286_DATA 0x00000055 |
| 2067 | #define DDRSS0_PHY_1287_DATA 0x00000000 |
| 2068 | #define DDRSS0_PHY_1288_DATA 0x00000000 |
| 2069 | #define DDRSS0_PHY_1289_DATA 0x00000000 |
| 2070 | #define DDRSS0_PHY_1290_DATA 0x00000000 |
| 2071 | #define DDRSS0_PHY_1291_DATA 0x00002001 |
| 2072 | #define DDRSS0_PHY_1292_DATA 0x0000400F |
| 2073 | #define DDRSS0_PHY_1293_DATA 0x50020028 |
| 2074 | #define DDRSS0_PHY_1294_DATA 0x01010000 |
| 2075 | #define DDRSS0_PHY_1295_DATA 0x80080001 |
| 2076 | #define DDRSS0_PHY_1296_DATA 0x10200000 |
| 2077 | #define DDRSS0_PHY_1297_DATA 0x00000008 |
| 2078 | #define DDRSS0_PHY_1298_DATA 0x00000000 |
| 2079 | #define DDRSS0_PHY_1299_DATA 0x01090E00 |
| 2080 | #define DDRSS0_PHY_1300_DATA 0x00040101 |
| 2081 | #define DDRSS0_PHY_1301_DATA 0x0000010F |
| 2082 | #define DDRSS0_PHY_1302_DATA 0x00000000 |
| 2083 | #define DDRSS0_PHY_1303_DATA 0x0000FFFF |
| 2084 | #define DDRSS0_PHY_1304_DATA 0x00000000 |
| 2085 | #define DDRSS0_PHY_1305_DATA 0x01010000 |
| 2086 | #define DDRSS0_PHY_1306_DATA 0x01080402 |
| 2087 | #define DDRSS0_PHY_1307_DATA 0x01200F02 |
| 2088 | #define DDRSS0_PHY_1308_DATA 0x00194280 |
| 2089 | #define DDRSS0_PHY_1309_DATA 0x00000004 |
| 2090 | #define DDRSS0_PHY_1310_DATA 0x00042000 |
| 2091 | #define DDRSS0_PHY_1311_DATA 0x00000000 |
| 2092 | #define DDRSS0_PHY_1312_DATA 0x00000000 |
| 2093 | #define DDRSS0_PHY_1313_DATA 0x00000000 |
| 2094 | #define DDRSS0_PHY_1314_DATA 0x00000000 |
| 2095 | #define DDRSS0_PHY_1315_DATA 0x00000000 |
| 2096 | #define DDRSS0_PHY_1316_DATA 0x00000000 |
| 2097 | #define DDRSS0_PHY_1317_DATA 0x01000000 |
| 2098 | #define DDRSS0_PHY_1318_DATA 0x00000705 |
| 2099 | #define DDRSS0_PHY_1319_DATA 0x00000054 |
| 2100 | #define DDRSS0_PHY_1320_DATA 0x00030820 |
| 2101 | #define DDRSS0_PHY_1321_DATA 0x00010820 |
| 2102 | #define DDRSS0_PHY_1322_DATA 0x00010820 |
| 2103 | #define DDRSS0_PHY_1323_DATA 0x00010820 |
| 2104 | #define DDRSS0_PHY_1324_DATA 0x00010820 |
| 2105 | #define DDRSS0_PHY_1325_DATA 0x00010820 |
| 2106 | #define DDRSS0_PHY_1326_DATA 0x00010820 |
| 2107 | #define DDRSS0_PHY_1327_DATA 0x00010820 |
| 2108 | #define DDRSS0_PHY_1328_DATA 0x00010820 |
| 2109 | #define DDRSS0_PHY_1329_DATA 0x00000000 |
| 2110 | #define DDRSS0_PHY_1330_DATA 0x00000074 |
| 2111 | #define DDRSS0_PHY_1331_DATA 0x00000400 |
| 2112 | #define DDRSS0_PHY_1332_DATA 0x00000108 |
| 2113 | #define DDRSS0_PHY_1333_DATA 0x00000000 |
| 2114 | #define DDRSS0_PHY_1334_DATA 0x00000000 |
| 2115 | #define DDRSS0_PHY_1335_DATA 0x00000000 |
| 2116 | #define DDRSS0_PHY_1336_DATA 0x00000000 |
| 2117 | #define DDRSS0_PHY_1337_DATA 0x00000000 |
| 2118 | #define DDRSS0_PHY_1338_DATA 0x03000000 |
| 2119 | #define DDRSS0_PHY_1339_DATA 0x00000000 |
| 2120 | #define DDRSS0_PHY_1340_DATA 0x00000000 |
| 2121 | #define DDRSS0_PHY_1341_DATA 0x00000000 |
| 2122 | #define DDRSS0_PHY_1342_DATA 0x04102006 |
| 2123 | #define DDRSS0_PHY_1343_DATA 0x00041020 |
| 2124 | #define DDRSS0_PHY_1344_DATA 0x01C98C98 |
| 2125 | #define DDRSS0_PHY_1345_DATA 0x3F400000 |
| 2126 | #define DDRSS0_PHY_1346_DATA 0x3F3F1F3F |
| 2127 | #define DDRSS0_PHY_1347_DATA 0x0000001F |
| 2128 | #define DDRSS0_PHY_1348_DATA 0x00000000 |
| 2129 | #define DDRSS0_PHY_1349_DATA 0x00000000 |
| 2130 | #define DDRSS0_PHY_1350_DATA 0x00000000 |
| 2131 | #define DDRSS0_PHY_1351_DATA 0x00010000 |
| 2132 | #define DDRSS0_PHY_1352_DATA 0x00000000 |
| 2133 | #define DDRSS0_PHY_1353_DATA 0x00000000 |
| 2134 | #define DDRSS0_PHY_1354_DATA 0x00000000 |
| 2135 | #define DDRSS0_PHY_1355_DATA 0x00000000 |
| 2136 | #define DDRSS0_PHY_1356_DATA 0x76543210 |
| 2137 | #define DDRSS0_PHY_1357_DATA 0x00010198 |
| 2138 | #define DDRSS0_PHY_1358_DATA 0x00000000 |
| 2139 | #define DDRSS0_PHY_1359_DATA 0x00000000 |
| 2140 | #define DDRSS0_PHY_1360_DATA 0x00000000 |
| 2141 | #define DDRSS0_PHY_1361_DATA 0x00040700 |
| 2142 | #define DDRSS0_PHY_1362_DATA 0x00000000 |
| 2143 | #define DDRSS0_PHY_1363_DATA 0x00000000 |
| 2144 | #define DDRSS0_PHY_1364_DATA 0x00000000 |
| 2145 | #define DDRSS0_PHY_1365_DATA 0x00000000 |
| 2146 | #define DDRSS0_PHY_1366_DATA 0x00000000 |
| 2147 | #define DDRSS0_PHY_1367_DATA 0x00000002 |
| 2148 | #define DDRSS0_PHY_1368_DATA 0x00000000 |
| 2149 | #define DDRSS0_PHY_1369_DATA 0x00000000 |
| 2150 | #define DDRSS0_PHY_1370_DATA 0x00000000 |
| 2151 | #define DDRSS0_PHY_1371_DATA 0x00000000 |
| 2152 | #define DDRSS0_PHY_1372_DATA 0x00000000 |
| 2153 | #define DDRSS0_PHY_1373_DATA 0x00000000 |
| 2154 | #define DDRSS0_PHY_1374_DATA 0x00080000 |
| 2155 | #define DDRSS0_PHY_1375_DATA 0x000007FF |
| 2156 | #define DDRSS0_PHY_1376_DATA 0x00000000 |
| 2157 | #define DDRSS0_PHY_1377_DATA 0x00000000 |
| 2158 | #define DDRSS0_PHY_1378_DATA 0x00000000 |
| 2159 | #define DDRSS0_PHY_1379_DATA 0x00000000 |
| 2160 | #define DDRSS0_PHY_1380_DATA 0x00000000 |
| 2161 | #define DDRSS0_PHY_1381_DATA 0x00000000 |
| 2162 | #define DDRSS0_PHY_1382_DATA 0x000FFFFF |
| 2163 | #define DDRSS0_PHY_1383_DATA 0x000FFFFF |
| 2164 | #define DDRSS0_PHY_1384_DATA 0x0000FFFF |
| 2165 | #define DDRSS0_PHY_1385_DATA 0xFFFFFFF0 |
| 2166 | #define DDRSS0_PHY_1386_DATA 0x030FFFFF |
| 2167 | #define DDRSS0_PHY_1387_DATA 0x01FFFFFF |
| 2168 | #define DDRSS0_PHY_1388_DATA 0x0000FFFF |
| 2169 | #define DDRSS0_PHY_1389_DATA 0x00000000 |
| 2170 | #define DDRSS0_PHY_1390_DATA 0x00000000 |
| 2171 | #define DDRSS0_PHY_1391_DATA 0x00000000 |
| 2172 | #define DDRSS0_PHY_1392_DATA 0x00000000 |
| 2173 | #define DDRSS0_PHY_1393_DATA 0x0001F7C0 |
| 2174 | #define DDRSS0_PHY_1394_DATA 0x00000003 |
| 2175 | #define DDRSS0_PHY_1395_DATA 0x00000000 |
| 2176 | #define DDRSS0_PHY_1396_DATA 0x00001142 |
| 2177 | #define DDRSS0_PHY_1397_DATA 0x010207AB |
| 2178 | #define DDRSS0_PHY_1398_DATA 0x01000080 |
| 2179 | #define DDRSS0_PHY_1399_DATA 0x03900390 |
| 2180 | #define DDRSS0_PHY_1400_DATA 0x03900390 |
| 2181 | #define DDRSS0_PHY_1401_DATA 0x00000390 |
| 2182 | #define DDRSS0_PHY_1402_DATA 0x00000390 |
| 2183 | #define DDRSS0_PHY_1403_DATA 0x00000390 |
| 2184 | #define DDRSS0_PHY_1404_DATA 0x00000390 |
| 2185 | #define DDRSS0_PHY_1405_DATA 0x00000005 |
| 2186 | #define DDRSS0_PHY_1406_DATA 0x01813FCC |
| 2187 | #define DDRSS0_PHY_1407_DATA 0x000000CC |
| 2188 | #define DDRSS0_PHY_1408_DATA 0x0C000DFF |
| 2189 | #define DDRSS0_PHY_1409_DATA 0x30000DFF |
| 2190 | #define DDRSS0_PHY_1410_DATA 0x3F0DFF11 |
| 2191 | #define DDRSS0_PHY_1411_DATA 0x000100F0 |
| 2192 | #define DDRSS0_PHY_1412_DATA 0x780DFFCC |
| 2193 | #define DDRSS0_PHY_1413_DATA 0x00007E31 |
| 2194 | #define DDRSS0_PHY_1414_DATA 0x000CBF11 |
| 2195 | #define DDRSS0_PHY_1415_DATA 0x01990010 |
| 2196 | #define DDRSS0_PHY_1416_DATA 0x000CBF11 |
| 2197 | #define DDRSS0_PHY_1417_DATA 0x01990010 |
| 2198 | #define DDRSS0_PHY_1418_DATA 0x3F0DFF11 |
| 2199 | #define DDRSS0_PHY_1419_DATA 0x00EF00F0 |
| 2200 | #define DDRSS0_PHY_1420_DATA 0x3F0DFF11 |
| 2201 | #define DDRSS0_PHY_1421_DATA 0x01FF00F0 |
| 2202 | #define DDRSS0_PHY_1422_DATA 0x20040006 |
| 2203 | |
| 2204 | #define DDRSS1_CTL_00_DATA 0x00000B00 |
| 2205 | #define DDRSS1_CTL_01_DATA 0x00000000 |
| 2206 | #define DDRSS1_CTL_02_DATA 0x00000000 |
| 2207 | #define DDRSS1_CTL_03_DATA 0x00000000 |
| 2208 | #define DDRSS1_CTL_04_DATA 0x00000000 |
| 2209 | #define DDRSS1_CTL_05_DATA 0x00000000 |
| 2210 | #define DDRSS1_CTL_06_DATA 0x00000000 |
| 2211 | #define DDRSS1_CTL_07_DATA 0x00002AF8 |
| 2212 | #define DDRSS1_CTL_08_DATA 0x0001ADAF |
| 2213 | #define DDRSS1_CTL_09_DATA 0x00000005 |
| 2214 | #define DDRSS1_CTL_10_DATA 0x0000006E |
| 2215 | #define DDRSS1_CTL_11_DATA 0x000681C8 |
| 2216 | #define DDRSS1_CTL_12_DATA 0x004111C9 |
| 2217 | #define DDRSS1_CTL_13_DATA 0x00000005 |
| 2218 | #define DDRSS1_CTL_14_DATA 0x000010A9 |
| 2219 | #define DDRSS1_CTL_15_DATA 0x000681C8 |
| 2220 | #define DDRSS1_CTL_16_DATA 0x004111C9 |
| 2221 | #define DDRSS1_CTL_17_DATA 0x00000005 |
| 2222 | #define DDRSS1_CTL_18_DATA 0x000010A9 |
| 2223 | #define DDRSS1_CTL_19_DATA 0x01010000 |
| 2224 | #define DDRSS1_CTL_20_DATA 0x02011001 |
| 2225 | #define DDRSS1_CTL_21_DATA 0x02010000 |
| 2226 | #define DDRSS1_CTL_22_DATA 0x00020100 |
| 2227 | #define DDRSS1_CTL_23_DATA 0x0000000B |
| 2228 | #define DDRSS1_CTL_24_DATA 0x0000001C |
| 2229 | #define DDRSS1_CTL_25_DATA 0x00000000 |
| 2230 | #define DDRSS1_CTL_26_DATA 0x00000000 |
| 2231 | #define DDRSS1_CTL_27_DATA 0x03020200 |
| 2232 | #define DDRSS1_CTL_28_DATA 0x00005656 |
| 2233 | #define DDRSS1_CTL_29_DATA 0x00100000 |
| 2234 | #define DDRSS1_CTL_30_DATA 0x00000000 |
| 2235 | #define DDRSS1_CTL_31_DATA 0x00000000 |
| 2236 | #define DDRSS1_CTL_32_DATA 0x00000000 |
| 2237 | #define DDRSS1_CTL_33_DATA 0x00000000 |
| 2238 | #define DDRSS1_CTL_34_DATA 0x040C0000 |
| 2239 | #define DDRSS1_CTL_35_DATA 0x12481248 |
| 2240 | #define DDRSS1_CTL_36_DATA 0x00050804 |
| 2241 | #define DDRSS1_CTL_37_DATA 0x09040008 |
| 2242 | #define DDRSS1_CTL_38_DATA 0x15000204 |
| 2243 | #define DDRSS1_CTL_39_DATA 0x1760008B |
| 2244 | #define DDRSS1_CTL_40_DATA 0x1500422B |
| 2245 | #define DDRSS1_CTL_41_DATA 0x1760008B |
| 2246 | #define DDRSS1_CTL_42_DATA 0x2000422B |
| 2247 | #define DDRSS1_CTL_43_DATA 0x000A0A09 |
| 2248 | #define DDRSS1_CTL_44_DATA 0x040003C5 |
| 2249 | #define DDRSS1_CTL_45_DATA 0x1E161104 |
| 2250 | #define DDRSS1_CTL_46_DATA 0x1000922C |
| 2251 | #define DDRSS1_CTL_47_DATA 0x1E161110 |
| 2252 | #define DDRSS1_CTL_48_DATA 0x1000922C |
| 2253 | #define DDRSS1_CTL_49_DATA 0x02030410 |
| 2254 | #define DDRSS1_CTL_50_DATA 0x2C040500 |
| 2255 | #define DDRSS1_CTL_51_DATA 0x08292C29 |
| 2256 | #define DDRSS1_CTL_52_DATA 0x14000E0A |
| 2257 | #define DDRSS1_CTL_53_DATA 0x04010A0A |
| 2258 | #define DDRSS1_CTL_54_DATA 0x01010004 |
| 2259 | #define DDRSS1_CTL_55_DATA 0x04545408 |
| 2260 | #define DDRSS1_CTL_56_DATA 0x04313104 |
| 2261 | #define DDRSS1_CTL_57_DATA 0x00003131 |
| 2262 | #define DDRSS1_CTL_58_DATA 0x00010100 |
| 2263 | #define DDRSS1_CTL_59_DATA 0x03010000 |
| 2264 | #define DDRSS1_CTL_60_DATA 0x00001508 |
| 2265 | #define DDRSS1_CTL_61_DATA 0x00000063 |
| 2266 | #define DDRSS1_CTL_62_DATA 0x0000032B |
| 2267 | #define DDRSS1_CTL_63_DATA 0x00001035 |
| 2268 | #define DDRSS1_CTL_64_DATA 0x0000032B |
| 2269 | #define DDRSS1_CTL_65_DATA 0x00001035 |
| 2270 | #define DDRSS1_CTL_66_DATA 0x00000005 |
| 2271 | #define DDRSS1_CTL_67_DATA 0x00050000 |
| 2272 | #define DDRSS1_CTL_68_DATA 0x00CB0012 |
| 2273 | #define DDRSS1_CTL_69_DATA 0x00CB0408 |
| 2274 | #define DDRSS1_CTL_70_DATA 0x00400408 |
| 2275 | #define DDRSS1_CTL_71_DATA 0x00120103 |
| 2276 | #define DDRSS1_CTL_72_DATA 0x00100005 |
| 2277 | #define DDRSS1_CTL_73_DATA 0x2F080010 |
| 2278 | #define DDRSS1_CTL_74_DATA 0x0505012F |
| 2279 | #define DDRSS1_CTL_75_DATA 0x0401030A |
| 2280 | #define DDRSS1_CTL_76_DATA 0x041E100B |
| 2281 | #define DDRSS1_CTL_77_DATA 0x100B0401 |
| 2282 | #define DDRSS1_CTL_78_DATA 0x0001041E |
| 2283 | #define DDRSS1_CTL_79_DATA 0x00160016 |
| 2284 | #define DDRSS1_CTL_80_DATA 0x033B033B |
| 2285 | #define DDRSS1_CTL_81_DATA 0x033B033B |
| 2286 | #define DDRSS1_CTL_82_DATA 0x03050505 |
| 2287 | #define DDRSS1_CTL_83_DATA 0x03010303 |
| 2288 | #define DDRSS1_CTL_84_DATA 0x200B100B |
| 2289 | #define DDRSS1_CTL_85_DATA 0x04041004 |
| 2290 | #define DDRSS1_CTL_86_DATA 0x200B100B |
| 2291 | #define DDRSS1_CTL_87_DATA 0x04041004 |
| 2292 | #define DDRSS1_CTL_88_DATA 0x03010000 |
| 2293 | #define DDRSS1_CTL_89_DATA 0x00010000 |
| 2294 | #define DDRSS1_CTL_90_DATA 0x00000000 |
| 2295 | #define DDRSS1_CTL_91_DATA 0x00000000 |
| 2296 | #define DDRSS1_CTL_92_DATA 0x01000000 |
| 2297 | #define DDRSS1_CTL_93_DATA 0x80104002 |
| 2298 | #define DDRSS1_CTL_94_DATA 0x00000000 |
| 2299 | #define DDRSS1_CTL_95_DATA 0x00040005 |
| 2300 | #define DDRSS1_CTL_96_DATA 0x00000000 |
| 2301 | #define DDRSS1_CTL_97_DATA 0x00050000 |
| 2302 | #define DDRSS1_CTL_98_DATA 0x00000004 |
| 2303 | #define DDRSS1_CTL_99_DATA 0x00000000 |
| 2304 | #define DDRSS1_CTL_100_DATA 0x00040005 |
| 2305 | #define DDRSS1_CTL_101_DATA 0x00000000 |
| 2306 | #define DDRSS1_CTL_102_DATA 0x000018C0 |
| 2307 | #define DDRSS1_CTL_103_DATA 0x000018C0 |
| 2308 | #define DDRSS1_CTL_104_DATA 0x000018C0 |
| 2309 | #define DDRSS1_CTL_105_DATA 0x000018C0 |
| 2310 | #define DDRSS1_CTL_106_DATA 0x000018C0 |
| 2311 | #define DDRSS1_CTL_107_DATA 0x00000000 |
| 2312 | #define DDRSS1_CTL_108_DATA 0x000002B5 |
| 2313 | #define DDRSS1_CTL_109_DATA 0x00040D40 |
| 2314 | #define DDRSS1_CTL_110_DATA 0x00040D40 |
| 2315 | #define DDRSS1_CTL_111_DATA 0x00040D40 |
| 2316 | #define DDRSS1_CTL_112_DATA 0x00040D40 |
| 2317 | #define DDRSS1_CTL_113_DATA 0x00040D40 |
| 2318 | #define DDRSS1_CTL_114_DATA 0x00000000 |
| 2319 | #define DDRSS1_CTL_115_DATA 0x00007173 |
| 2320 | #define DDRSS1_CTL_116_DATA 0x00040D40 |
| 2321 | #define DDRSS1_CTL_117_DATA 0x00040D40 |
| 2322 | #define DDRSS1_CTL_118_DATA 0x00040D40 |
| 2323 | #define DDRSS1_CTL_119_DATA 0x00040D40 |
| 2324 | #define DDRSS1_CTL_120_DATA 0x00040D40 |
| 2325 | #define DDRSS1_CTL_121_DATA 0x00000000 |
| 2326 | #define DDRSS1_CTL_122_DATA 0x00007173 |
| 2327 | #define DDRSS1_CTL_123_DATA 0x00000000 |
| 2328 | #define DDRSS1_CTL_124_DATA 0x00000000 |
| 2329 | #define DDRSS1_CTL_125_DATA 0x00000000 |
| 2330 | #define DDRSS1_CTL_126_DATA 0x00000000 |
| 2331 | #define DDRSS1_CTL_127_DATA 0x00000000 |
| 2332 | #define DDRSS1_CTL_128_DATA 0x00000000 |
| 2333 | #define DDRSS1_CTL_129_DATA 0x00000000 |
| 2334 | #define DDRSS1_CTL_130_DATA 0x00000000 |
| 2335 | #define DDRSS1_CTL_131_DATA 0x0B030500 |
| 2336 | #define DDRSS1_CTL_132_DATA 0x00040B04 |
| 2337 | #define DDRSS1_CTL_133_DATA 0x0A090000 |
| 2338 | #define DDRSS1_CTL_134_DATA 0x0A090701 |
| 2339 | #define DDRSS1_CTL_135_DATA 0x0900000E |
| 2340 | #define DDRSS1_CTL_136_DATA 0x0907010A |
| 2341 | #define DDRSS1_CTL_137_DATA 0x00000E0A |
| 2342 | #define DDRSS1_CTL_138_DATA 0x07010A09 |
| 2343 | #define DDRSS1_CTL_139_DATA 0x000E0A09 |
| 2344 | #define DDRSS1_CTL_140_DATA 0x07000401 |
| 2345 | #define DDRSS1_CTL_141_DATA 0x00000000 |
| 2346 | #define DDRSS1_CTL_142_DATA 0x00000000 |
| 2347 | #define DDRSS1_CTL_143_DATA 0x00000000 |
| 2348 | #define DDRSS1_CTL_144_DATA 0x00000000 |
| 2349 | #define DDRSS1_CTL_145_DATA 0x00000000 |
| 2350 | #define DDRSS1_CTL_146_DATA 0x00000000 |
| 2351 | #define DDRSS1_CTL_147_DATA 0x00000000 |
| 2352 | #define DDRSS1_CTL_148_DATA 0x08080000 |
| 2353 | #define DDRSS1_CTL_149_DATA 0x01000000 |
| 2354 | #define DDRSS1_CTL_150_DATA 0x800000C0 |
| 2355 | #define DDRSS1_CTL_151_DATA 0x800000C0 |
| 2356 | #define DDRSS1_CTL_152_DATA 0x800000C0 |
| 2357 | #define DDRSS1_CTL_153_DATA 0x00000000 |
| 2358 | #define DDRSS1_CTL_154_DATA 0x00001500 |
| 2359 | #define DDRSS1_CTL_155_DATA 0x00000000 |
| 2360 | #define DDRSS1_CTL_156_DATA 0x00000001 |
| 2361 | #define DDRSS1_CTL_157_DATA 0x00000002 |
| 2362 | #define DDRSS1_CTL_158_DATA 0x0000100E |
| 2363 | #define DDRSS1_CTL_159_DATA 0x00000000 |
| 2364 | #define DDRSS1_CTL_160_DATA 0x00000000 |
| 2365 | #define DDRSS1_CTL_161_DATA 0x00000000 |
| 2366 | #define DDRSS1_CTL_162_DATA 0x00000000 |
| 2367 | #define DDRSS1_CTL_163_DATA 0x00000000 |
| 2368 | #define DDRSS1_CTL_164_DATA 0x000B0000 |
| 2369 | #define DDRSS1_CTL_165_DATA 0x000E0006 |
| 2370 | #define DDRSS1_CTL_166_DATA 0x000E0404 |
| 2371 | #define DDRSS1_CTL_167_DATA 0x00D601AB |
| 2372 | #define DDRSS1_CTL_168_DATA 0x10100216 |
| 2373 | #define DDRSS1_CTL_169_DATA 0x01AB0216 |
| 2374 | #define DDRSS1_CTL_170_DATA 0x021600D6 |
| 2375 | #define DDRSS1_CTL_171_DATA 0x02161010 |
| 2376 | #define DDRSS1_CTL_172_DATA 0x00000000 |
| 2377 | #define DDRSS1_CTL_173_DATA 0x00000000 |
| 2378 | #define DDRSS1_CTL_174_DATA 0x00000000 |
| 2379 | #define DDRSS1_CTL_175_DATA 0x3FF40084 |
| 2380 | #define DDRSS1_CTL_176_DATA 0x33003FF4 |
| 2381 | #define DDRSS1_CTL_177_DATA 0x00003333 |
| 2382 | #define DDRSS1_CTL_178_DATA 0x35000000 |
| 2383 | #define DDRSS1_CTL_179_DATA 0x27270035 |
| 2384 | #define DDRSS1_CTL_180_DATA 0x0F0F0000 |
| 2385 | #define DDRSS1_CTL_181_DATA 0x16000000 |
| 2386 | #define DDRSS1_CTL_182_DATA 0x00841616 |
| 2387 | #define DDRSS1_CTL_183_DATA 0x3FF43FF4 |
| 2388 | #define DDRSS1_CTL_184_DATA 0x33333300 |
| 2389 | #define DDRSS1_CTL_185_DATA 0x00000000 |
| 2390 | #define DDRSS1_CTL_186_DATA 0x00353500 |
| 2391 | #define DDRSS1_CTL_187_DATA 0x00002727 |
| 2392 | #define DDRSS1_CTL_188_DATA 0x00000F0F |
| 2393 | #define DDRSS1_CTL_189_DATA 0x16161600 |
| 2394 | #define DDRSS1_CTL_190_DATA 0x00000020 |
| 2395 | #define DDRSS1_CTL_191_DATA 0x00000000 |
| 2396 | #define DDRSS1_CTL_192_DATA 0x00000001 |
| 2397 | #define DDRSS1_CTL_193_DATA 0x00000000 |
| 2398 | #define DDRSS1_CTL_194_DATA 0x01000000 |
| 2399 | #define DDRSS1_CTL_195_DATA 0x00000001 |
| 2400 | #define DDRSS1_CTL_196_DATA 0x00000000 |
| 2401 | #define DDRSS1_CTL_197_DATA 0x00000000 |
| 2402 | #define DDRSS1_CTL_198_DATA 0x00000000 |
| 2403 | #define DDRSS1_CTL_199_DATA 0x00000000 |
| 2404 | #define DDRSS1_CTL_200_DATA 0x00000000 |
| 2405 | #define DDRSS1_CTL_201_DATA 0x00000000 |
| 2406 | #define DDRSS1_CTL_202_DATA 0x00000000 |
| 2407 | #define DDRSS1_CTL_203_DATA 0x00000000 |
| 2408 | #define DDRSS1_CTL_204_DATA 0x00000000 |
| 2409 | #define DDRSS1_CTL_205_DATA 0x00000000 |
| 2410 | #define DDRSS1_CTL_206_DATA 0x02000000 |
| 2411 | #define DDRSS1_CTL_207_DATA 0x01080101 |
| 2412 | #define DDRSS1_CTL_208_DATA 0x00000000 |
| 2413 | #define DDRSS1_CTL_209_DATA 0x00000000 |
| 2414 | #define DDRSS1_CTL_210_DATA 0x00000000 |
| 2415 | #define DDRSS1_CTL_211_DATA 0x00000000 |
| 2416 | #define DDRSS1_CTL_212_DATA 0x00000000 |
| 2417 | #define DDRSS1_CTL_213_DATA 0x00000000 |
| 2418 | #define DDRSS1_CTL_214_DATA 0x00000000 |
| 2419 | #define DDRSS1_CTL_215_DATA 0x00000000 |
| 2420 | #define DDRSS1_CTL_216_DATA 0x00000000 |
| 2421 | #define DDRSS1_CTL_217_DATA 0x00000000 |
| 2422 | #define DDRSS1_CTL_218_DATA 0x00000000 |
| 2423 | #define DDRSS1_CTL_219_DATA 0x00000000 |
| 2424 | #define DDRSS1_CTL_220_DATA 0x00000000 |
| 2425 | #define DDRSS1_CTL_221_DATA 0x00000000 |
| 2426 | #define DDRSS1_CTL_222_DATA 0x00001000 |
| 2427 | #define DDRSS1_CTL_223_DATA 0x006403E8 |
| 2428 | #define DDRSS1_CTL_224_DATA 0x00000000 |
| 2429 | #define DDRSS1_CTL_225_DATA 0x00000000 |
| 2430 | #define DDRSS1_CTL_226_DATA 0x00000000 |
| 2431 | #define DDRSS1_CTL_227_DATA 0x15110000 |
| 2432 | #define DDRSS1_CTL_228_DATA 0x00040C18 |
| 2433 | #define DDRSS1_CTL_229_DATA 0xF000C000 |
| 2434 | #define DDRSS1_CTL_230_DATA 0x0000F000 |
| 2435 | #define DDRSS1_CTL_231_DATA 0x00000000 |
| 2436 | #define DDRSS1_CTL_232_DATA 0x00000000 |
| 2437 | #define DDRSS1_CTL_233_DATA 0xC0000000 |
| 2438 | #define DDRSS1_CTL_234_DATA 0xF000F000 |
| 2439 | #define DDRSS1_CTL_235_DATA 0x00000000 |
| 2440 | #define DDRSS1_CTL_236_DATA 0x00000000 |
| 2441 | #define DDRSS1_CTL_237_DATA 0x00000000 |
| 2442 | #define DDRSS1_CTL_238_DATA 0xF000C000 |
| 2443 | #define DDRSS1_CTL_239_DATA 0x0000F000 |
| 2444 | #define DDRSS1_CTL_240_DATA 0x00000000 |
| 2445 | #define DDRSS1_CTL_241_DATA 0x00000000 |
| 2446 | #define DDRSS1_CTL_242_DATA 0x00030000 |
| 2447 | #define DDRSS1_CTL_243_DATA 0x00000000 |
| 2448 | #define DDRSS1_CTL_244_DATA 0x00000000 |
| 2449 | #define DDRSS1_CTL_245_DATA 0x00000000 |
| 2450 | #define DDRSS1_CTL_246_DATA 0x00000000 |
| 2451 | #define DDRSS1_CTL_247_DATA 0x00000000 |
| 2452 | #define DDRSS1_CTL_248_DATA 0x00000000 |
| 2453 | #define DDRSS1_CTL_249_DATA 0x00000000 |
| 2454 | #define DDRSS1_CTL_250_DATA 0x00000000 |
| 2455 | #define DDRSS1_CTL_251_DATA 0x00000000 |
| 2456 | #define DDRSS1_CTL_252_DATA 0x00000000 |
| 2457 | #define DDRSS1_CTL_253_DATA 0x00000000 |
| 2458 | #define DDRSS1_CTL_254_DATA 0x00000000 |
| 2459 | #define DDRSS1_CTL_255_DATA 0x00000000 |
| 2460 | #define DDRSS1_CTL_256_DATA 0x00000000 |
| 2461 | #define DDRSS1_CTL_257_DATA 0x01000200 |
| 2462 | #define DDRSS1_CTL_258_DATA 0x00370040 |
| 2463 | #define DDRSS1_CTL_259_DATA 0x00020008 |
| 2464 | #define DDRSS1_CTL_260_DATA 0x00400100 |
| 2465 | #define DDRSS1_CTL_261_DATA 0x00400855 |
| 2466 | #define DDRSS1_CTL_262_DATA 0x01000200 |
| 2467 | #define DDRSS1_CTL_263_DATA 0x08550040 |
| 2468 | #define DDRSS1_CTL_264_DATA 0x00000040 |
| 2469 | #define DDRSS1_CTL_265_DATA 0x006B0003 |
| 2470 | #define DDRSS1_CTL_266_DATA 0x0100006B |
| 2471 | #define DDRSS1_CTL_267_DATA 0x03030303 |
| 2472 | #define DDRSS1_CTL_268_DATA 0x00000000 |
| 2473 | #define DDRSS1_CTL_269_DATA 0x00000202 |
| 2474 | #define DDRSS1_CTL_270_DATA 0x00001FFF |
| 2475 | #define DDRSS1_CTL_271_DATA 0x3FFF2000 |
| 2476 | #define DDRSS1_CTL_272_DATA 0x03FF0000 |
| 2477 | #define DDRSS1_CTL_273_DATA 0x000103FF |
| 2478 | #define DDRSS1_CTL_274_DATA 0x0FFF0B00 |
| 2479 | #define DDRSS1_CTL_275_DATA 0x01010001 |
| 2480 | #define DDRSS1_CTL_276_DATA 0x01010101 |
| 2481 | #define DDRSS1_CTL_277_DATA 0x01180101 |
| 2482 | #define DDRSS1_CTL_278_DATA 0x00030000 |
| 2483 | #define DDRSS1_CTL_279_DATA 0x00000000 |
| 2484 | #define DDRSS1_CTL_280_DATA 0x00000000 |
| 2485 | #define DDRSS1_CTL_281_DATA 0x00000000 |
| 2486 | #define DDRSS1_CTL_282_DATA 0x00000000 |
| 2487 | #define DDRSS1_CTL_283_DATA 0x00000000 |
| 2488 | #define DDRSS1_CTL_284_DATA 0x00000000 |
| 2489 | #define DDRSS1_CTL_285_DATA 0x00000000 |
| 2490 | #define DDRSS1_CTL_286_DATA 0x00040101 |
| 2491 | #define DDRSS1_CTL_287_DATA 0x04010100 |
| 2492 | #define DDRSS1_CTL_288_DATA 0x00000000 |
| 2493 | #define DDRSS1_CTL_289_DATA 0x00000000 |
| 2494 | #define DDRSS1_CTL_290_DATA 0x03030300 |
| 2495 | #define DDRSS1_CTL_291_DATA 0x00000001 |
| 2496 | #define DDRSS1_CTL_292_DATA 0x00000000 |
| 2497 | #define DDRSS1_CTL_293_DATA 0x00000000 |
| 2498 | #define DDRSS1_CTL_294_DATA 0x00000000 |
| 2499 | #define DDRSS1_CTL_295_DATA 0x00000000 |
| 2500 | #define DDRSS1_CTL_296_DATA 0x00000000 |
| 2501 | #define DDRSS1_CTL_297_DATA 0x00000000 |
| 2502 | #define DDRSS1_CTL_298_DATA 0x00000000 |
| 2503 | #define DDRSS1_CTL_299_DATA 0x00000000 |
| 2504 | #define DDRSS1_CTL_300_DATA 0x00000000 |
| 2505 | #define DDRSS1_CTL_301_DATA 0x00000000 |
| 2506 | #define DDRSS1_CTL_302_DATA 0x00000000 |
| 2507 | #define DDRSS1_CTL_303_DATA 0x00000000 |
| 2508 | #define DDRSS1_CTL_304_DATA 0x00000000 |
| 2509 | #define DDRSS1_CTL_305_DATA 0x00000000 |
| 2510 | #define DDRSS1_CTL_306_DATA 0x00000000 |
| 2511 | #define DDRSS1_CTL_307_DATA 0x00000000 |
| 2512 | #define DDRSS1_CTL_308_DATA 0x00000000 |
| 2513 | #define DDRSS1_CTL_309_DATA 0x00000000 |
| 2514 | #define DDRSS1_CTL_310_DATA 0x00000000 |
| 2515 | #define DDRSS1_CTL_311_DATA 0x00000000 |
| 2516 | #define DDRSS1_CTL_312_DATA 0x00000000 |
| 2517 | #define DDRSS1_CTL_313_DATA 0x01000000 |
| 2518 | #define DDRSS1_CTL_314_DATA 0x00020201 |
| 2519 | #define DDRSS1_CTL_315_DATA 0x01000101 |
| 2520 | #define DDRSS1_CTL_316_DATA 0x01010001 |
| 2521 | #define DDRSS1_CTL_317_DATA 0x00010101 |
| 2522 | #define DDRSS1_CTL_318_DATA 0x050A0A03 |
| 2523 | #define DDRSS1_CTL_319_DATA 0x10081F1F |
| 2524 | #define DDRSS1_CTL_320_DATA 0x00090310 |
| 2525 | #define DDRSS1_CTL_321_DATA 0x0B0C030F |
| 2526 | #define DDRSS1_CTL_322_DATA 0x0B0C0306 |
| 2527 | #define DDRSS1_CTL_323_DATA 0x0C090006 |
| 2528 | #define DDRSS1_CTL_324_DATA 0x0100000C |
| 2529 | #define DDRSS1_CTL_325_DATA 0x08040801 |
| 2530 | #define DDRSS1_CTL_326_DATA 0x00000004 |
| 2531 | #define DDRSS1_CTL_327_DATA 0x00000000 |
| 2532 | #define DDRSS1_CTL_328_DATA 0x00010000 |
| 2533 | #define DDRSS1_CTL_329_DATA 0x00280D00 |
| 2534 | #define DDRSS1_CTL_330_DATA 0x00000001 |
| 2535 | #define DDRSS1_CTL_331_DATA 0x00030001 |
| 2536 | #define DDRSS1_CTL_332_DATA 0x00000000 |
| 2537 | #define DDRSS1_CTL_333_DATA 0x00000000 |
| 2538 | #define DDRSS1_CTL_334_DATA 0x00000000 |
| 2539 | #define DDRSS1_CTL_335_DATA 0x00000000 |
| 2540 | #define DDRSS1_CTL_336_DATA 0x00000000 |
| 2541 | #define DDRSS1_CTL_337_DATA 0x00000000 |
| 2542 | #define DDRSS1_CTL_338_DATA 0x00000000 |
| 2543 | #define DDRSS1_CTL_339_DATA 0x00000000 |
| 2544 | #define DDRSS1_CTL_340_DATA 0x01000000 |
| 2545 | #define DDRSS1_CTL_341_DATA 0x00000001 |
| 2546 | #define DDRSS1_CTL_342_DATA 0x00010100 |
| 2547 | #define DDRSS1_CTL_343_DATA 0x03030000 |
| 2548 | #define DDRSS1_CTL_344_DATA 0x00000000 |
| 2549 | #define DDRSS1_CTL_345_DATA 0x00000000 |
| 2550 | #define DDRSS1_CTL_346_DATA 0x00000000 |
| 2551 | #define DDRSS1_CTL_347_DATA 0x00000000 |
| 2552 | #define DDRSS1_CTL_348_DATA 0x00000000 |
| 2553 | #define DDRSS1_CTL_349_DATA 0x00000000 |
| 2554 | #define DDRSS1_CTL_350_DATA 0x00000000 |
| 2555 | #define DDRSS1_CTL_351_DATA 0x00000000 |
| 2556 | #define DDRSS1_CTL_352_DATA 0x00000000 |
| 2557 | #define DDRSS1_CTL_353_DATA 0x00000000 |
| 2558 | #define DDRSS1_CTL_354_DATA 0x00000000 |
| 2559 | #define DDRSS1_CTL_355_DATA 0x00000000 |
| 2560 | #define DDRSS1_CTL_356_DATA 0x00000000 |
| 2561 | #define DDRSS1_CTL_357_DATA 0x00000000 |
| 2562 | #define DDRSS1_CTL_358_DATA 0x00000000 |
| 2563 | #define DDRSS1_CTL_359_DATA 0x00000000 |
| 2564 | #define DDRSS1_CTL_360_DATA 0x000556AA |
| 2565 | #define DDRSS1_CTL_361_DATA 0x000AAAAA |
| 2566 | #define DDRSS1_CTL_362_DATA 0x000AA955 |
| 2567 | #define DDRSS1_CTL_363_DATA 0x00055555 |
| 2568 | #define DDRSS1_CTL_364_DATA 0x000B3133 |
| 2569 | #define DDRSS1_CTL_365_DATA 0x0004CD33 |
| 2570 | #define DDRSS1_CTL_366_DATA 0x0004CECC |
| 2571 | #define DDRSS1_CTL_367_DATA 0x000B32CC |
| 2572 | #define DDRSS1_CTL_368_DATA 0x00010300 |
| 2573 | #define DDRSS1_CTL_369_DATA 0x03000100 |
| 2574 | #define DDRSS1_CTL_370_DATA 0x00000000 |
| 2575 | #define DDRSS1_CTL_371_DATA 0x00000000 |
| 2576 | #define DDRSS1_CTL_372_DATA 0x00000000 |
| 2577 | #define DDRSS1_CTL_373_DATA 0x00000000 |
| 2578 | #define DDRSS1_CTL_374_DATA 0x00000000 |
| 2579 | #define DDRSS1_CTL_375_DATA 0x00000000 |
| 2580 | #define DDRSS1_CTL_376_DATA 0x00000000 |
| 2581 | #define DDRSS1_CTL_377_DATA 0x00010000 |
| 2582 | #define DDRSS1_CTL_378_DATA 0x00000404 |
| 2583 | #define DDRSS1_CTL_379_DATA 0x00000000 |
| 2584 | #define DDRSS1_CTL_380_DATA 0x00000000 |
| 2585 | #define DDRSS1_CTL_381_DATA 0x00000000 |
| 2586 | #define DDRSS1_CTL_382_DATA 0x00000000 |
| 2587 | #define DDRSS1_CTL_383_DATA 0x00000000 |
| 2588 | #define DDRSS1_CTL_384_DATA 0x00000000 |
| 2589 | #define DDRSS1_CTL_385_DATA 0x00000000 |
| 2590 | #define DDRSS1_CTL_386_DATA 0x00000000 |
| 2591 | #define DDRSS1_CTL_387_DATA 0x3A3A1B00 |
| 2592 | #define DDRSS1_CTL_388_DATA 0x000A0000 |
| 2593 | #define DDRSS1_CTL_389_DATA 0x000000C6 |
| 2594 | #define DDRSS1_CTL_390_DATA 0x00000200 |
| 2595 | #define DDRSS1_CTL_391_DATA 0x00000200 |
| 2596 | #define DDRSS1_CTL_392_DATA 0x00000200 |
| 2597 | #define DDRSS1_CTL_393_DATA 0x00000200 |
| 2598 | #define DDRSS1_CTL_394_DATA 0x00000252 |
| 2599 | #define DDRSS1_CTL_395_DATA 0x000007BC |
| 2600 | #define DDRSS1_CTL_396_DATA 0x00000204 |
| 2601 | #define DDRSS1_CTL_397_DATA 0x0000206A |
| 2602 | #define DDRSS1_CTL_398_DATA 0x00000200 |
| 2603 | #define DDRSS1_CTL_399_DATA 0x00000200 |
| 2604 | #define DDRSS1_CTL_400_DATA 0x00000200 |
| 2605 | #define DDRSS1_CTL_401_DATA 0x00000200 |
| 2606 | #define DDRSS1_CTL_402_DATA 0x0000613E |
| 2607 | #define DDRSS1_CTL_403_DATA 0x00014424 |
| 2608 | #define DDRSS1_CTL_404_DATA 0x00000E15 |
| 2609 | #define DDRSS1_CTL_405_DATA 0x0000206A |
| 2610 | #define DDRSS1_CTL_406_DATA 0x00000200 |
| 2611 | #define DDRSS1_CTL_407_DATA 0x00000200 |
| 2612 | #define DDRSS1_CTL_408_DATA 0x00000200 |
| 2613 | #define DDRSS1_CTL_409_DATA 0x00000200 |
| 2614 | #define DDRSS1_CTL_410_DATA 0x0000613E |
| 2615 | #define DDRSS1_CTL_411_DATA 0x00014424 |
| 2616 | #define DDRSS1_CTL_412_DATA 0x02020E15 |
| 2617 | #define DDRSS1_CTL_413_DATA 0x03030202 |
| 2618 | #define DDRSS1_CTL_414_DATA 0x00000022 |
| 2619 | #define DDRSS1_CTL_415_DATA 0x00000000 |
| 2620 | #define DDRSS1_CTL_416_DATA 0x00000000 |
| 2621 | #define DDRSS1_CTL_417_DATA 0x00001403 |
| 2622 | #define DDRSS1_CTL_418_DATA 0x000007D0 |
| 2623 | #define DDRSS1_CTL_419_DATA 0x00000000 |
| 2624 | #define DDRSS1_CTL_420_DATA 0x00000000 |
| 2625 | #define DDRSS1_CTL_421_DATA 0x00030000 |
| 2626 | #define DDRSS1_CTL_422_DATA 0x0007001F |
| 2627 | #define DDRSS1_CTL_423_DATA 0x001B0033 |
| 2628 | #define DDRSS1_CTL_424_DATA 0x001B0033 |
| 2629 | #define DDRSS1_CTL_425_DATA 0x00000000 |
| 2630 | #define DDRSS1_CTL_426_DATA 0x00000000 |
| 2631 | #define DDRSS1_CTL_427_DATA 0x02000000 |
| 2632 | #define DDRSS1_CTL_428_DATA 0x01000404 |
| 2633 | #define DDRSS1_CTL_429_DATA 0x0B1E0B1E |
| 2634 | #define DDRSS1_CTL_430_DATA 0x00000105 |
| 2635 | #define DDRSS1_CTL_431_DATA 0x00010101 |
| 2636 | #define DDRSS1_CTL_432_DATA 0x00010101 |
| 2637 | #define DDRSS1_CTL_433_DATA 0x00010001 |
| 2638 | #define DDRSS1_CTL_434_DATA 0x00000101 |
| 2639 | #define DDRSS1_CTL_435_DATA 0x02000201 |
| 2640 | #define DDRSS1_CTL_436_DATA 0x02010000 |
| 2641 | #define DDRSS1_CTL_437_DATA 0x00000200 |
| 2642 | #define DDRSS1_CTL_438_DATA 0x28060000 |
| 2643 | #define DDRSS1_CTL_439_DATA 0x00000128 |
| 2644 | #define DDRSS1_CTL_440_DATA 0xFFFFFFFF |
| 2645 | #define DDRSS1_CTL_441_DATA 0xFFFFFFFF |
| 2646 | #define DDRSS1_CTL_442_DATA 0x00000000 |
| 2647 | #define DDRSS1_CTL_443_DATA 0x00000000 |
| 2648 | #define DDRSS1_CTL_444_DATA 0x00000000 |
| 2649 | #define DDRSS1_CTL_445_DATA 0x00000000 |
| 2650 | #define DDRSS1_CTL_446_DATA 0x00000000 |
| 2651 | #define DDRSS1_CTL_447_DATA 0x00000000 |
| 2652 | #define DDRSS1_CTL_448_DATA 0x00000000 |
| 2653 | #define DDRSS1_CTL_449_DATA 0x00000000 |
| 2654 | #define DDRSS1_CTL_450_DATA 0x00000000 |
| 2655 | #define DDRSS1_CTL_451_DATA 0x00000000 |
| 2656 | #define DDRSS1_CTL_452_DATA 0x00000000 |
| 2657 | #define DDRSS1_CTL_453_DATA 0x00000000 |
| 2658 | #define DDRSS1_CTL_454_DATA 0x00000000 |
| 2659 | #define DDRSS1_CTL_455_DATA 0x00000000 |
| 2660 | #define DDRSS1_CTL_456_DATA 0x00000000 |
| 2661 | #define DDRSS1_CTL_457_DATA 0x00000000 |
| 2662 | #define DDRSS1_CTL_458_DATA 0x00000000 |
| 2663 | |
| 2664 | #define DDRSS1_PI_00_DATA 0x00000B00 |
| 2665 | #define DDRSS1_PI_01_DATA 0x00000000 |
| 2666 | #define DDRSS1_PI_02_DATA 0x00000000 |
| 2667 | #define DDRSS1_PI_03_DATA 0x00000000 |
| 2668 | #define DDRSS1_PI_04_DATA 0x00000000 |
| 2669 | #define DDRSS1_PI_05_DATA 0x00000101 |
| 2670 | #define DDRSS1_PI_06_DATA 0x00640000 |
| 2671 | #define DDRSS1_PI_07_DATA 0x00000001 |
| 2672 | #define DDRSS1_PI_08_DATA 0x00000000 |
| 2673 | #define DDRSS1_PI_09_DATA 0x00000000 |
| 2674 | #define DDRSS1_PI_10_DATA 0x00000000 |
| 2675 | #define DDRSS1_PI_11_DATA 0x00000000 |
| 2676 | #define DDRSS1_PI_12_DATA 0x00000007 |
| 2677 | #define DDRSS1_PI_13_DATA 0x00010002 |
| 2678 | #define DDRSS1_PI_14_DATA 0x0800000F |
| 2679 | #define DDRSS1_PI_15_DATA 0x00000103 |
| 2680 | #define DDRSS1_PI_16_DATA 0x00000005 |
| 2681 | #define DDRSS1_PI_17_DATA 0x00000000 |
| 2682 | #define DDRSS1_PI_18_DATA 0x00000000 |
| 2683 | #define DDRSS1_PI_19_DATA 0x00000000 |
| 2684 | #define DDRSS1_PI_20_DATA 0x00000000 |
| 2685 | #define DDRSS1_PI_21_DATA 0x00000000 |
| 2686 | #define DDRSS1_PI_22_DATA 0x00000000 |
| 2687 | #define DDRSS1_PI_23_DATA 0x00000000 |
| 2688 | #define DDRSS1_PI_24_DATA 0x00000000 |
| 2689 | #define DDRSS1_PI_25_DATA 0x00000000 |
| 2690 | #define DDRSS1_PI_26_DATA 0x00010100 |
| 2691 | #define DDRSS1_PI_27_DATA 0x00280A00 |
| 2692 | #define DDRSS1_PI_28_DATA 0x00000000 |
| 2693 | #define DDRSS1_PI_29_DATA 0x0F000000 |
| 2694 | #define DDRSS1_PI_30_DATA 0x00003200 |
| 2695 | #define DDRSS1_PI_31_DATA 0x00000000 |
| 2696 | #define DDRSS1_PI_32_DATA 0x00000000 |
| 2697 | #define DDRSS1_PI_33_DATA 0x01010102 |
| 2698 | #define DDRSS1_PI_34_DATA 0x00000000 |
| 2699 | #define DDRSS1_PI_35_DATA 0x000000AA |
| 2700 | #define DDRSS1_PI_36_DATA 0x00000055 |
| 2701 | #define DDRSS1_PI_37_DATA 0x000000B5 |
| 2702 | #define DDRSS1_PI_38_DATA 0x0000004A |
| 2703 | #define DDRSS1_PI_39_DATA 0x00000056 |
| 2704 | #define DDRSS1_PI_40_DATA 0x000000A9 |
| 2705 | #define DDRSS1_PI_41_DATA 0x000000A9 |
| 2706 | #define DDRSS1_PI_42_DATA 0x000000B5 |
| 2707 | #define DDRSS1_PI_43_DATA 0x00000000 |
| 2708 | #define DDRSS1_PI_44_DATA 0x00000000 |
| 2709 | #define DDRSS1_PI_45_DATA 0x000F0F00 |
| 2710 | #define DDRSS1_PI_46_DATA 0x0000001B |
| 2711 | #define DDRSS1_PI_47_DATA 0x000007D0 |
| 2712 | #define DDRSS1_PI_48_DATA 0x00000300 |
| 2713 | #define DDRSS1_PI_49_DATA 0x00000000 |
| 2714 | #define DDRSS1_PI_50_DATA 0x00000000 |
| 2715 | #define DDRSS1_PI_51_DATA 0x01000000 |
| 2716 | #define DDRSS1_PI_52_DATA 0x00010101 |
| 2717 | #define DDRSS1_PI_53_DATA 0x00000000 |
| 2718 | #define DDRSS1_PI_54_DATA 0x00030000 |
| 2719 | #define DDRSS1_PI_55_DATA 0x0F000000 |
| 2720 | #define DDRSS1_PI_56_DATA 0x00000017 |
| 2721 | #define DDRSS1_PI_57_DATA 0x00000000 |
| 2722 | #define DDRSS1_PI_58_DATA 0x00000000 |
| 2723 | #define DDRSS1_PI_59_DATA 0x00000000 |
| 2724 | #define DDRSS1_PI_60_DATA 0x0A0A140A |
| 2725 | #define DDRSS1_PI_61_DATA 0x10020101 |
| 2726 | #define DDRSS1_PI_62_DATA 0x00020805 |
| 2727 | #define DDRSS1_PI_63_DATA 0x01000404 |
| 2728 | #define DDRSS1_PI_64_DATA 0x00000000 |
| 2729 | #define DDRSS1_PI_65_DATA 0x00000000 |
| 2730 | #define DDRSS1_PI_66_DATA 0x00000100 |
| 2731 | #define DDRSS1_PI_67_DATA 0x0001010F |
| 2732 | #define DDRSS1_PI_68_DATA 0x00340000 |
| 2733 | #define DDRSS1_PI_69_DATA 0x00000000 |
| 2734 | #define DDRSS1_PI_70_DATA 0x00000000 |
| 2735 | #define DDRSS1_PI_71_DATA 0x0000FFFF |
| 2736 | #define DDRSS1_PI_72_DATA 0x00000000 |
| 2737 | #define DDRSS1_PI_73_DATA 0x00080000 |
| 2738 | #define DDRSS1_PI_74_DATA 0x02000200 |
| 2739 | #define DDRSS1_PI_75_DATA 0x01000100 |
| 2740 | #define DDRSS1_PI_76_DATA 0x01000000 |
| 2741 | #define DDRSS1_PI_77_DATA 0x02000200 |
| 2742 | #define DDRSS1_PI_78_DATA 0x00000200 |
| 2743 | #define DDRSS1_PI_79_DATA 0x00000000 |
| 2744 | #define DDRSS1_PI_80_DATA 0x00000000 |
| 2745 | #define DDRSS1_PI_81_DATA 0x00000000 |
| 2746 | #define DDRSS1_PI_82_DATA 0x00000000 |
| 2747 | #define DDRSS1_PI_83_DATA 0x00000000 |
| 2748 | #define DDRSS1_PI_84_DATA 0x00000000 |
| 2749 | #define DDRSS1_PI_85_DATA 0x00000000 |
| 2750 | #define DDRSS1_PI_86_DATA 0x00000000 |
| 2751 | #define DDRSS1_PI_87_DATA 0x00000000 |
| 2752 | #define DDRSS1_PI_88_DATA 0x00000000 |
| 2753 | #define DDRSS1_PI_89_DATA 0x00000000 |
| 2754 | #define DDRSS1_PI_90_DATA 0x00000000 |
| 2755 | #define DDRSS1_PI_91_DATA 0x00000400 |
| 2756 | #define DDRSS1_PI_92_DATA 0x02010000 |
| 2757 | #define DDRSS1_PI_93_DATA 0x00080003 |
| 2758 | #define DDRSS1_PI_94_DATA 0x00080000 |
| 2759 | #define DDRSS1_PI_95_DATA 0x00000001 |
| 2760 | #define DDRSS1_PI_96_DATA 0x00000000 |
| 2761 | #define DDRSS1_PI_97_DATA 0x0000AA00 |
| 2762 | #define DDRSS1_PI_98_DATA 0x00000000 |
| 2763 | #define DDRSS1_PI_99_DATA 0x00000000 |
| 2764 | #define DDRSS1_PI_100_DATA 0x00010000 |
| 2765 | #define DDRSS1_PI_101_DATA 0x00000000 |
| 2766 | #define DDRSS1_PI_102_DATA 0x00000000 |
| 2767 | #define DDRSS1_PI_103_DATA 0x00000000 |
| 2768 | #define DDRSS1_PI_104_DATA 0x00000000 |
| 2769 | #define DDRSS1_PI_105_DATA 0x00000000 |
| 2770 | #define DDRSS1_PI_106_DATA 0x00000000 |
| 2771 | #define DDRSS1_PI_107_DATA 0x00000000 |
| 2772 | #define DDRSS1_PI_108_DATA 0x00000000 |
| 2773 | #define DDRSS1_PI_109_DATA 0x00000000 |
| 2774 | #define DDRSS1_PI_110_DATA 0x00000000 |
| 2775 | #define DDRSS1_PI_111_DATA 0x00000000 |
| 2776 | #define DDRSS1_PI_112_DATA 0x00000000 |
| 2777 | #define DDRSS1_PI_113_DATA 0x00000000 |
| 2778 | #define DDRSS1_PI_114_DATA 0x00000000 |
| 2779 | #define DDRSS1_PI_115_DATA 0x00000000 |
| 2780 | #define DDRSS1_PI_116_DATA 0x00000000 |
| 2781 | #define DDRSS1_PI_117_DATA 0x00000000 |
| 2782 | #define DDRSS1_PI_118_DATA 0x00000000 |
| 2783 | #define DDRSS1_PI_119_DATA 0x00000000 |
| 2784 | #define DDRSS1_PI_120_DATA 0x00000000 |
| 2785 | #define DDRSS1_PI_121_DATA 0x00000000 |
| 2786 | #define DDRSS1_PI_122_DATA 0x00000000 |
| 2787 | #define DDRSS1_PI_123_DATA 0x00000000 |
| 2788 | #define DDRSS1_PI_124_DATA 0x00000000 |
| 2789 | #define DDRSS1_PI_125_DATA 0x00000008 |
| 2790 | #define DDRSS1_PI_126_DATA 0x00000000 |
| 2791 | #define DDRSS1_PI_127_DATA 0x00000000 |
| 2792 | #define DDRSS1_PI_128_DATA 0x00000000 |
| 2793 | #define DDRSS1_PI_129_DATA 0x00000000 |
| 2794 | #define DDRSS1_PI_130_DATA 0x00000000 |
| 2795 | #define DDRSS1_PI_131_DATA 0x00000000 |
| 2796 | #define DDRSS1_PI_132_DATA 0x00000000 |
| 2797 | #define DDRSS1_PI_133_DATA 0x00000000 |
| 2798 | #define DDRSS1_PI_134_DATA 0x00000002 |
| 2799 | #define DDRSS1_PI_135_DATA 0x00000000 |
| 2800 | #define DDRSS1_PI_136_DATA 0x00000000 |
| 2801 | #define DDRSS1_PI_137_DATA 0x0000000A |
| 2802 | #define DDRSS1_PI_138_DATA 0x00000019 |
| 2803 | #define DDRSS1_PI_139_DATA 0x00000100 |
| 2804 | #define DDRSS1_PI_140_DATA 0x00000000 |
| 2805 | #define DDRSS1_PI_141_DATA 0x00000000 |
| 2806 | #define DDRSS1_PI_142_DATA 0x00000000 |
| 2807 | #define DDRSS1_PI_143_DATA 0x00000000 |
| 2808 | #define DDRSS1_PI_144_DATA 0x01000000 |
| 2809 | #define DDRSS1_PI_145_DATA 0x00010003 |
| 2810 | #define DDRSS1_PI_146_DATA 0x02000101 |
| 2811 | #define DDRSS1_PI_147_DATA 0x01030001 |
| 2812 | #define DDRSS1_PI_148_DATA 0x00010400 |
| 2813 | #define DDRSS1_PI_149_DATA 0x06000105 |
| 2814 | #define DDRSS1_PI_150_DATA 0x01070001 |
| 2815 | #define DDRSS1_PI_151_DATA 0x00000000 |
| 2816 | #define DDRSS1_PI_152_DATA 0x00000000 |
| 2817 | #define DDRSS1_PI_153_DATA 0x00000000 |
| 2818 | #define DDRSS1_PI_154_DATA 0x00010001 |
| 2819 | #define DDRSS1_PI_155_DATA 0x00000000 |
| 2820 | #define DDRSS1_PI_156_DATA 0x00000000 |
| 2821 | #define DDRSS1_PI_157_DATA 0x00000000 |
| 2822 | #define DDRSS1_PI_158_DATA 0x00000000 |
| 2823 | #define DDRSS1_PI_159_DATA 0x00000401 |
| 2824 | #define DDRSS1_PI_160_DATA 0x00000000 |
| 2825 | #define DDRSS1_PI_161_DATA 0x00010000 |
| 2826 | #define DDRSS1_PI_162_DATA 0x00000000 |
| 2827 | #define DDRSS1_PI_163_DATA 0x2B2B0200 |
| 2828 | #define DDRSS1_PI_164_DATA 0x00000034 |
| 2829 | #define DDRSS1_PI_165_DATA 0x00000064 |
| 2830 | #define DDRSS1_PI_166_DATA 0x00020064 |
| 2831 | #define DDRSS1_PI_167_DATA 0x02000200 |
| 2832 | #define DDRSS1_PI_168_DATA 0x48120C04 |
| 2833 | #define DDRSS1_PI_169_DATA 0x00154812 |
| 2834 | #define DDRSS1_PI_170_DATA 0x00000063 |
| 2835 | #define DDRSS1_PI_171_DATA 0x0000032B |
| 2836 | #define DDRSS1_PI_172_DATA 0x00001035 |
| 2837 | #define DDRSS1_PI_173_DATA 0x0000032B |
| 2838 | #define DDRSS1_PI_174_DATA 0x04001035 |
| 2839 | #define DDRSS1_PI_175_DATA 0x01010404 |
| 2840 | #define DDRSS1_PI_176_DATA 0x00001501 |
| 2841 | #define DDRSS1_PI_177_DATA 0x00150015 |
| 2842 | #define DDRSS1_PI_178_DATA 0x01000100 |
| 2843 | #define DDRSS1_PI_179_DATA 0x00000100 |
| 2844 | #define DDRSS1_PI_180_DATA 0x00000000 |
| 2845 | #define DDRSS1_PI_181_DATA 0x01010101 |
| 2846 | #define DDRSS1_PI_182_DATA 0x00000101 |
| 2847 | #define DDRSS1_PI_183_DATA 0x00000000 |
| 2848 | #define DDRSS1_PI_184_DATA 0x00000000 |
| 2849 | #define DDRSS1_PI_185_DATA 0x15040000 |
| 2850 | #define DDRSS1_PI_186_DATA 0x0E0E0215 |
| 2851 | #define DDRSS1_PI_187_DATA 0x00040402 |
| 2852 | #define DDRSS1_PI_188_DATA 0x000D0035 |
| 2853 | #define DDRSS1_PI_189_DATA 0x00218049 |
| 2854 | #define DDRSS1_PI_190_DATA 0x00218049 |
| 2855 | #define DDRSS1_PI_191_DATA 0x01010101 |
| 2856 | #define DDRSS1_PI_192_DATA 0x0004000E |
| 2857 | #define DDRSS1_PI_193_DATA 0x00040216 |
| 2858 | #define DDRSS1_PI_194_DATA 0x01000216 |
| 2859 | #define DDRSS1_PI_195_DATA 0x000F000F |
| 2860 | #define DDRSS1_PI_196_DATA 0x02170100 |
| 2861 | #define DDRSS1_PI_197_DATA 0x01000217 |
| 2862 | #define DDRSS1_PI_198_DATA 0x02170217 |
| 2863 | #define DDRSS1_PI_199_DATA 0x32103200 |
| 2864 | #define DDRSS1_PI_200_DATA 0x01013210 |
| 2865 | #define DDRSS1_PI_201_DATA 0x0A070601 |
| 2866 | #define DDRSS1_PI_202_DATA 0x1F130A0D |
| 2867 | #define DDRSS1_PI_203_DATA 0x1F130A14 |
| 2868 | #define DDRSS1_PI_204_DATA 0x0000C014 |
| 2869 | #define DDRSS1_PI_205_DATA 0x00C01000 |
| 2870 | #define DDRSS1_PI_206_DATA 0x00C01000 |
| 2871 | #define DDRSS1_PI_207_DATA 0x00021000 |
| 2872 | #define DDRSS1_PI_208_DATA 0x0024000E |
| 2873 | #define DDRSS1_PI_209_DATA 0x00240216 |
| 2874 | #define DDRSS1_PI_210_DATA 0x00110216 |
| 2875 | #define DDRSS1_PI_211_DATA 0x32000056 |
| 2876 | #define DDRSS1_PI_212_DATA 0x00000301 |
| 2877 | #define DDRSS1_PI_213_DATA 0x005B0036 |
| 2878 | #define DDRSS1_PI_214_DATA 0x03013212 |
| 2879 | #define DDRSS1_PI_215_DATA 0x00003600 |
| 2880 | #define DDRSS1_PI_216_DATA 0x3212005B |
| 2881 | #define DDRSS1_PI_217_DATA 0x09000301 |
| 2882 | #define DDRSS1_PI_218_DATA 0x04010504 |
| 2883 | #define DDRSS1_PI_219_DATA 0x04000364 |
| 2884 | #define DDRSS1_PI_220_DATA 0x0A032001 |
| 2885 | #define DDRSS1_PI_221_DATA 0x2C31110A |
| 2886 | #define DDRSS1_PI_222_DATA 0x00002918 |
| 2887 | #define DDRSS1_PI_223_DATA 0x6000838E |
| 2888 | #define DDRSS1_PI_224_DATA 0x1E202008 |
| 2889 | #define DDRSS1_PI_225_DATA 0x2C311116 |
| 2890 | #define DDRSS1_PI_226_DATA 0x00002918 |
| 2891 | #define DDRSS1_PI_227_DATA 0x6000838E |
| 2892 | #define DDRSS1_PI_228_DATA 0x1E202008 |
| 2893 | #define DDRSS1_PI_229_DATA 0x0000C616 |
| 2894 | #define DDRSS1_PI_230_DATA 0x000007BC |
| 2895 | #define DDRSS1_PI_231_DATA 0x0000206A |
| 2896 | #define DDRSS1_PI_232_DATA 0x00014424 |
| 2897 | #define DDRSS1_PI_233_DATA 0x0000206A |
| 2898 | #define DDRSS1_PI_234_DATA 0x00014424 |
| 2899 | #define DDRSS1_PI_235_DATA 0x033B0016 |
| 2900 | #define DDRSS1_PI_236_DATA 0x0303033B |
| 2901 | #define DDRSS1_PI_237_DATA 0x002AF803 |
| 2902 | #define DDRSS1_PI_238_DATA 0x0001ADAF |
| 2903 | #define DDRSS1_PI_239_DATA 0x00000005 |
| 2904 | #define DDRSS1_PI_240_DATA 0x0000006E |
| 2905 | #define DDRSS1_PI_241_DATA 0x00000016 |
| 2906 | #define DDRSS1_PI_242_DATA 0x000681C8 |
| 2907 | #define DDRSS1_PI_243_DATA 0x0001ADAF |
| 2908 | #define DDRSS1_PI_244_DATA 0x00000005 |
| 2909 | #define DDRSS1_PI_245_DATA 0x000010A9 |
| 2910 | #define DDRSS1_PI_246_DATA 0x0000033B |
| 2911 | #define DDRSS1_PI_247_DATA 0x000681C8 |
| 2912 | #define DDRSS1_PI_248_DATA 0x0001ADAF |
| 2913 | #define DDRSS1_PI_249_DATA 0x00000005 |
| 2914 | #define DDRSS1_PI_250_DATA 0x000010A9 |
| 2915 | #define DDRSS1_PI_251_DATA 0x0100033B |
| 2916 | #define DDRSS1_PI_252_DATA 0x00370040 |
| 2917 | #define DDRSS1_PI_253_DATA 0x00010008 |
| 2918 | #define DDRSS1_PI_254_DATA 0x08550040 |
| 2919 | #define DDRSS1_PI_255_DATA 0x00010040 |
| 2920 | #define DDRSS1_PI_256_DATA 0x08550040 |
| 2921 | #define DDRSS1_PI_257_DATA 0x00000340 |
| 2922 | #define DDRSS1_PI_258_DATA 0x006B006B |
| 2923 | #define DDRSS1_PI_259_DATA 0x08040404 |
| 2924 | #define DDRSS1_PI_260_DATA 0x00000055 |
| 2925 | #define DDRSS1_PI_261_DATA 0x55083C5A |
| 2926 | #define DDRSS1_PI_262_DATA 0x5A000000 |
| 2927 | #define DDRSS1_PI_263_DATA 0x0055083C |
| 2928 | #define DDRSS1_PI_264_DATA 0x3C5A0000 |
| 2929 | #define DDRSS1_PI_265_DATA 0x00005508 |
| 2930 | #define DDRSS1_PI_266_DATA 0x0C3C5A00 |
| 2931 | #define DDRSS1_PI_267_DATA 0x080F0E0D |
| 2932 | #define DDRSS1_PI_268_DATA 0x000B0A09 |
| 2933 | #define DDRSS1_PI_269_DATA 0x00030201 |
| 2934 | #define DDRSS1_PI_270_DATA 0x01000000 |
| 2935 | #define DDRSS1_PI_271_DATA 0x04020201 |
| 2936 | #define DDRSS1_PI_272_DATA 0x00080804 |
| 2937 | #define DDRSS1_PI_273_DATA 0x00000000 |
| 2938 | #define DDRSS1_PI_274_DATA 0x00000000 |
| 2939 | #define DDRSS1_PI_275_DATA 0x00330084 |
| 2940 | #define DDRSS1_PI_276_DATA 0x00160000 |
| 2941 | #define DDRSS1_PI_277_DATA 0x35333FF4 |
| 2942 | #define DDRSS1_PI_278_DATA 0x00160F27 |
| 2943 | #define DDRSS1_PI_279_DATA 0x35333FF4 |
| 2944 | #define DDRSS1_PI_280_DATA 0x00160F27 |
| 2945 | #define DDRSS1_PI_281_DATA 0x00330084 |
| 2946 | #define DDRSS1_PI_282_DATA 0x00160000 |
| 2947 | #define DDRSS1_PI_283_DATA 0x35333FF4 |
| 2948 | #define DDRSS1_PI_284_DATA 0x00160F27 |
| 2949 | #define DDRSS1_PI_285_DATA 0x35333FF4 |
| 2950 | #define DDRSS1_PI_286_DATA 0x00160F27 |
| 2951 | #define DDRSS1_PI_287_DATA 0x00330084 |
| 2952 | #define DDRSS1_PI_288_DATA 0x00160000 |
| 2953 | #define DDRSS1_PI_289_DATA 0x35333FF4 |
| 2954 | #define DDRSS1_PI_290_DATA 0x00160F27 |
| 2955 | #define DDRSS1_PI_291_DATA 0x35333FF4 |
| 2956 | #define DDRSS1_PI_292_DATA 0x00160F27 |
| 2957 | #define DDRSS1_PI_293_DATA 0x00330084 |
| 2958 | #define DDRSS1_PI_294_DATA 0x00160000 |
| 2959 | #define DDRSS1_PI_295_DATA 0x35333FF4 |
| 2960 | #define DDRSS1_PI_296_DATA 0x00160F27 |
| 2961 | #define DDRSS1_PI_297_DATA 0x35333FF4 |
| 2962 | #define DDRSS1_PI_298_DATA 0x00160F27 |
| 2963 | #define DDRSS1_PI_299_DATA 0x00000000 |
| 2964 | |
| 2965 | #define DDRSS1_PHY_00_DATA 0x000004F0 |
| 2966 | #define DDRSS1_PHY_01_DATA 0x00000000 |
| 2967 | #define DDRSS1_PHY_02_DATA 0x00030200 |
| 2968 | #define DDRSS1_PHY_03_DATA 0x00000000 |
| 2969 | #define DDRSS1_PHY_04_DATA 0x00000000 |
| 2970 | #define DDRSS1_PHY_05_DATA 0x01030000 |
| 2971 | #define DDRSS1_PHY_06_DATA 0x00010000 |
| 2972 | #define DDRSS1_PHY_07_DATA 0x01030004 |
| 2973 | #define DDRSS1_PHY_08_DATA 0x01000000 |
| 2974 | #define DDRSS1_PHY_09_DATA 0x00000000 |
| 2975 | #define DDRSS1_PHY_10_DATA 0x00000000 |
| 2976 | #define DDRSS1_PHY_11_DATA 0x01000001 |
| 2977 | #define DDRSS1_PHY_12_DATA 0x00000100 |
| 2978 | #define DDRSS1_PHY_13_DATA 0x000800C0 |
| 2979 | #define DDRSS1_PHY_14_DATA 0x060100CC |
| 2980 | #define DDRSS1_PHY_15_DATA 0x00030066 |
| 2981 | #define DDRSS1_PHY_16_DATA 0x00000000 |
| 2982 | #define DDRSS1_PHY_17_DATA 0x00000301 |
| 2983 | #define DDRSS1_PHY_18_DATA 0x0000AAAA |
| 2984 | #define DDRSS1_PHY_19_DATA 0x00005555 |
| 2985 | #define DDRSS1_PHY_20_DATA 0x0000B5B5 |
| 2986 | #define DDRSS1_PHY_21_DATA 0x00004A4A |
| 2987 | #define DDRSS1_PHY_22_DATA 0x00005656 |
| 2988 | #define DDRSS1_PHY_23_DATA 0x0000A9A9 |
| 2989 | #define DDRSS1_PHY_24_DATA 0x0000A9A9 |
| 2990 | #define DDRSS1_PHY_25_DATA 0x0000B5B5 |
| 2991 | #define DDRSS1_PHY_26_DATA 0x00000000 |
| 2992 | #define DDRSS1_PHY_27_DATA 0x00000000 |
| 2993 | #define DDRSS1_PHY_28_DATA 0x2A000000 |
| 2994 | #define DDRSS1_PHY_29_DATA 0x00000808 |
| 2995 | #define DDRSS1_PHY_30_DATA 0x0F000000 |
| 2996 | #define DDRSS1_PHY_31_DATA 0x00000F0F |
| 2997 | #define DDRSS1_PHY_32_DATA 0x10400000 |
| 2998 | #define DDRSS1_PHY_33_DATA 0x0C002006 |
| 2999 | #define DDRSS1_PHY_34_DATA 0x00000000 |
| 3000 | #define DDRSS1_PHY_35_DATA 0x00000000 |
| 3001 | #define DDRSS1_PHY_36_DATA 0x55555555 |
| 3002 | #define DDRSS1_PHY_37_DATA 0xAAAAAAAA |
| 3003 | #define DDRSS1_PHY_38_DATA 0x55555555 |
| 3004 | #define DDRSS1_PHY_39_DATA 0xAAAAAAAA |
| 3005 | #define DDRSS1_PHY_40_DATA 0x00005555 |
| 3006 | #define DDRSS1_PHY_41_DATA 0x01000100 |
| 3007 | #define DDRSS1_PHY_42_DATA 0x00800180 |
| 3008 | #define DDRSS1_PHY_43_DATA 0x00000001 |
| 3009 | #define DDRSS1_PHY_44_DATA 0x00000000 |
| 3010 | #define DDRSS1_PHY_45_DATA 0x00000000 |
| 3011 | #define DDRSS1_PHY_46_DATA 0x00000000 |
| 3012 | #define DDRSS1_PHY_47_DATA 0x00000000 |
| 3013 | #define DDRSS1_PHY_48_DATA 0x00000000 |
| 3014 | #define DDRSS1_PHY_49_DATA 0x00000000 |
| 3015 | #define DDRSS1_PHY_50_DATA 0x00000000 |
| 3016 | #define DDRSS1_PHY_51_DATA 0x00000000 |
| 3017 | #define DDRSS1_PHY_52_DATA 0x00000000 |
| 3018 | #define DDRSS1_PHY_53_DATA 0x00000000 |
| 3019 | #define DDRSS1_PHY_54_DATA 0x00000000 |
| 3020 | #define DDRSS1_PHY_55_DATA 0x00000000 |
| 3021 | #define DDRSS1_PHY_56_DATA 0x00000000 |
| 3022 | #define DDRSS1_PHY_57_DATA 0x00000000 |
| 3023 | #define DDRSS1_PHY_58_DATA 0x00000000 |
| 3024 | #define DDRSS1_PHY_59_DATA 0x00000000 |
| 3025 | #define DDRSS1_PHY_60_DATA 0x00000000 |
| 3026 | #define DDRSS1_PHY_61_DATA 0x00000000 |
| 3027 | #define DDRSS1_PHY_62_DATA 0x00000000 |
| 3028 | #define DDRSS1_PHY_63_DATA 0x00000000 |
| 3029 | #define DDRSS1_PHY_64_DATA 0x00000000 |
| 3030 | #define DDRSS1_PHY_65_DATA 0x00000000 |
| 3031 | #define DDRSS1_PHY_66_DATA 0x00000104 |
| 3032 | #define DDRSS1_PHY_67_DATA 0x00000120 |
| 3033 | #define DDRSS1_PHY_68_DATA 0x00000000 |
| 3034 | #define DDRSS1_PHY_69_DATA 0x00000000 |
| 3035 | #define DDRSS1_PHY_70_DATA 0x00000000 |
| 3036 | #define DDRSS1_PHY_71_DATA 0x00000000 |
| 3037 | #define DDRSS1_PHY_72_DATA 0x00000000 |
| 3038 | #define DDRSS1_PHY_73_DATA 0x00000000 |
| 3039 | #define DDRSS1_PHY_74_DATA 0x00000000 |
| 3040 | #define DDRSS1_PHY_75_DATA 0x00000001 |
| 3041 | #define DDRSS1_PHY_76_DATA 0x07FF0000 |
| 3042 | #define DDRSS1_PHY_77_DATA 0x0080081F |
| 3043 | #define DDRSS1_PHY_78_DATA 0x00081020 |
| 3044 | #define DDRSS1_PHY_79_DATA 0x04010000 |
| 3045 | #define DDRSS1_PHY_80_DATA 0x00000000 |
| 3046 | #define DDRSS1_PHY_81_DATA 0x00000000 |
| 3047 | #define DDRSS1_PHY_82_DATA 0x00000000 |
| 3048 | #define DDRSS1_PHY_83_DATA 0x00000100 |
| 3049 | #define DDRSS1_PHY_84_DATA 0x01CC0C01 |
| 3050 | #define DDRSS1_PHY_85_DATA 0x1003CC0C |
| 3051 | #define DDRSS1_PHY_86_DATA 0x20000140 |
| 3052 | #define DDRSS1_PHY_87_DATA 0x07FF0200 |
| 3053 | #define DDRSS1_PHY_88_DATA 0x0000DD01 |
| 3054 | #define DDRSS1_PHY_89_DATA 0x10100303 |
| 3055 | #define DDRSS1_PHY_90_DATA 0x10101010 |
| 3056 | #define DDRSS1_PHY_91_DATA 0x10101010 |
| 3057 | #define DDRSS1_PHY_92_DATA 0x00021010 |
| 3058 | #define DDRSS1_PHY_93_DATA 0x00100010 |
| 3059 | #define DDRSS1_PHY_94_DATA 0x00100010 |
| 3060 | #define DDRSS1_PHY_95_DATA 0x00100010 |
| 3061 | #define DDRSS1_PHY_96_DATA 0x00100010 |
| 3062 | #define DDRSS1_PHY_97_DATA 0x00050010 |
| 3063 | #define DDRSS1_PHY_98_DATA 0x51517041 |
| 3064 | #define DDRSS1_PHY_99_DATA 0x31C06001 |
| 3065 | #define DDRSS1_PHY_100_DATA 0x07AB0340 |
| 3066 | #define DDRSS1_PHY_101_DATA 0x00C0C001 |
| 3067 | #define DDRSS1_PHY_102_DATA 0x0E0D0001 |
| 3068 | #define DDRSS1_PHY_103_DATA 0x10001000 |
| 3069 | #define DDRSS1_PHY_104_DATA 0x0C083E42 |
| 3070 | #define DDRSS1_PHY_105_DATA 0x0F0C3701 |
| 3071 | #define DDRSS1_PHY_106_DATA 0x01000140 |
| 3072 | #define DDRSS1_PHY_107_DATA 0x0C000420 |
| 3073 | #define DDRSS1_PHY_108_DATA 0x00000198 |
| 3074 | #define DDRSS1_PHY_109_DATA 0x0A0000D0 |
| 3075 | #define DDRSS1_PHY_110_DATA 0x00030200 |
| 3076 | #define DDRSS1_PHY_111_DATA 0x02800000 |
| 3077 | #define DDRSS1_PHY_112_DATA 0x80800000 |
| 3078 | #define DDRSS1_PHY_113_DATA 0x000E2010 |
| 3079 | #define DDRSS1_PHY_114_DATA 0x76543210 |
| 3080 | #define DDRSS1_PHY_115_DATA 0x00000008 |
| 3081 | #define DDRSS1_PHY_116_DATA 0x02800280 |
| 3082 | #define DDRSS1_PHY_117_DATA 0x02800280 |
| 3083 | #define DDRSS1_PHY_118_DATA 0x02800280 |
| 3084 | #define DDRSS1_PHY_119_DATA 0x02800280 |
| 3085 | #define DDRSS1_PHY_120_DATA 0x00000280 |
| 3086 | #define DDRSS1_PHY_121_DATA 0x0000A000 |
| 3087 | #define DDRSS1_PHY_122_DATA 0x00A000A0 |
| 3088 | #define DDRSS1_PHY_123_DATA 0x00A000A0 |
| 3089 | #define DDRSS1_PHY_124_DATA 0x00A000A0 |
| 3090 | #define DDRSS1_PHY_125_DATA 0x00A000A0 |
| 3091 | #define DDRSS1_PHY_126_DATA 0x00A000A0 |
| 3092 | #define DDRSS1_PHY_127_DATA 0x00A000A0 |
| 3093 | #define DDRSS1_PHY_128_DATA 0x00A000A0 |
| 3094 | #define DDRSS1_PHY_129_DATA 0x00A000A0 |
| 3095 | #define DDRSS1_PHY_130_DATA 0x01C200A0 |
| 3096 | #define DDRSS1_PHY_131_DATA 0x01A00005 |
| 3097 | #define DDRSS1_PHY_132_DATA 0x00000000 |
| 3098 | #define DDRSS1_PHY_133_DATA 0x00000000 |
| 3099 | #define DDRSS1_PHY_134_DATA 0x00080200 |
| 3100 | #define DDRSS1_PHY_135_DATA 0x00000000 |
| 3101 | #define DDRSS1_PHY_136_DATA 0x20202000 |
| 3102 | #define DDRSS1_PHY_137_DATA 0x20202020 |
| 3103 | #define DDRSS1_PHY_138_DATA 0xF0F02020 |
| 3104 | #define DDRSS1_PHY_139_DATA 0x00000000 |
| 3105 | #define DDRSS1_PHY_140_DATA 0x00000000 |
| 3106 | #define DDRSS1_PHY_141_DATA 0x00000000 |
| 3107 | #define DDRSS1_PHY_142_DATA 0x00000000 |
| 3108 | #define DDRSS1_PHY_143_DATA 0x00000000 |
| 3109 | #define DDRSS1_PHY_144_DATA 0x00000000 |
| 3110 | #define DDRSS1_PHY_145_DATA 0x00000000 |
| 3111 | #define DDRSS1_PHY_146_DATA 0x00000000 |
| 3112 | #define DDRSS1_PHY_147_DATA 0x00000000 |
| 3113 | #define DDRSS1_PHY_148_DATA 0x00000000 |
| 3114 | #define DDRSS1_PHY_149_DATA 0x00000000 |
| 3115 | #define DDRSS1_PHY_150_DATA 0x00000000 |
| 3116 | #define DDRSS1_PHY_151_DATA 0x00000000 |
| 3117 | #define DDRSS1_PHY_152_DATA 0x00000000 |
| 3118 | #define DDRSS1_PHY_153_DATA 0x00000000 |
| 3119 | #define DDRSS1_PHY_154_DATA 0x00000000 |
| 3120 | #define DDRSS1_PHY_155_DATA 0x00000000 |
| 3121 | #define DDRSS1_PHY_156_DATA 0x00000000 |
| 3122 | #define DDRSS1_PHY_157_DATA 0x00000000 |
| 3123 | #define DDRSS1_PHY_158_DATA 0x00000000 |
| 3124 | #define DDRSS1_PHY_159_DATA 0x00000000 |
| 3125 | #define DDRSS1_PHY_160_DATA 0x00000000 |
| 3126 | #define DDRSS1_PHY_161_DATA 0x00000000 |
| 3127 | #define DDRSS1_PHY_162_DATA 0x00000000 |
| 3128 | #define DDRSS1_PHY_163_DATA 0x00000000 |
| 3129 | #define DDRSS1_PHY_164_DATA 0x00000000 |
| 3130 | #define DDRSS1_PHY_165_DATA 0x00000000 |
| 3131 | #define DDRSS1_PHY_166_DATA 0x00000000 |
| 3132 | #define DDRSS1_PHY_167_DATA 0x00000000 |
| 3133 | #define DDRSS1_PHY_168_DATA 0x00000000 |
| 3134 | #define DDRSS1_PHY_169_DATA 0x00000000 |
| 3135 | #define DDRSS1_PHY_170_DATA 0x00000000 |
| 3136 | #define DDRSS1_PHY_171_DATA 0x00000000 |
| 3137 | #define DDRSS1_PHY_172_DATA 0x00000000 |
| 3138 | #define DDRSS1_PHY_173_DATA 0x00000000 |
| 3139 | #define DDRSS1_PHY_174_DATA 0x00000000 |
| 3140 | #define DDRSS1_PHY_175_DATA 0x00000000 |
| 3141 | #define DDRSS1_PHY_176_DATA 0x00000000 |
| 3142 | #define DDRSS1_PHY_177_DATA 0x00000000 |
| 3143 | #define DDRSS1_PHY_178_DATA 0x00000000 |
| 3144 | #define DDRSS1_PHY_179_DATA 0x00000000 |
| 3145 | #define DDRSS1_PHY_180_DATA 0x00000000 |
| 3146 | #define DDRSS1_PHY_181_DATA 0x00000000 |
| 3147 | #define DDRSS1_PHY_182_DATA 0x00000000 |
| 3148 | #define DDRSS1_PHY_183_DATA 0x00000000 |
| 3149 | #define DDRSS1_PHY_184_DATA 0x00000000 |
| 3150 | #define DDRSS1_PHY_185_DATA 0x00000000 |
| 3151 | #define DDRSS1_PHY_186_DATA 0x00000000 |
| 3152 | #define DDRSS1_PHY_187_DATA 0x00000000 |
| 3153 | #define DDRSS1_PHY_188_DATA 0x00000000 |
| 3154 | #define DDRSS1_PHY_189_DATA 0x00000000 |
| 3155 | #define DDRSS1_PHY_190_DATA 0x00000000 |
| 3156 | #define DDRSS1_PHY_191_DATA 0x00000000 |
| 3157 | #define DDRSS1_PHY_192_DATA 0x00000000 |
| 3158 | #define DDRSS1_PHY_193_DATA 0x00000000 |
| 3159 | #define DDRSS1_PHY_194_DATA 0x00000000 |
| 3160 | #define DDRSS1_PHY_195_DATA 0x00000000 |
| 3161 | #define DDRSS1_PHY_196_DATA 0x00000000 |
| 3162 | #define DDRSS1_PHY_197_DATA 0x00000000 |
| 3163 | #define DDRSS1_PHY_198_DATA 0x00000000 |
| 3164 | #define DDRSS1_PHY_199_DATA 0x00000000 |
| 3165 | #define DDRSS1_PHY_200_DATA 0x00000000 |
| 3166 | #define DDRSS1_PHY_201_DATA 0x00000000 |
| 3167 | #define DDRSS1_PHY_202_DATA 0x00000000 |
| 3168 | #define DDRSS1_PHY_203_DATA 0x00000000 |
| 3169 | #define DDRSS1_PHY_204_DATA 0x00000000 |
| 3170 | #define DDRSS1_PHY_205_DATA 0x00000000 |
| 3171 | #define DDRSS1_PHY_206_DATA 0x00000000 |
| 3172 | #define DDRSS1_PHY_207_DATA 0x00000000 |
| 3173 | #define DDRSS1_PHY_208_DATA 0x00000000 |
| 3174 | #define DDRSS1_PHY_209_DATA 0x00000000 |
| 3175 | #define DDRSS1_PHY_210_DATA 0x00000000 |
| 3176 | #define DDRSS1_PHY_211_DATA 0x00000000 |
| 3177 | #define DDRSS1_PHY_212_DATA 0x00000000 |
| 3178 | #define DDRSS1_PHY_213_DATA 0x00000000 |
| 3179 | #define DDRSS1_PHY_214_DATA 0x00000000 |
| 3180 | #define DDRSS1_PHY_215_DATA 0x00000000 |
| 3181 | #define DDRSS1_PHY_216_DATA 0x00000000 |
| 3182 | #define DDRSS1_PHY_217_DATA 0x00000000 |
| 3183 | #define DDRSS1_PHY_218_DATA 0x00000000 |
| 3184 | #define DDRSS1_PHY_219_DATA 0x00000000 |
| 3185 | #define DDRSS1_PHY_220_DATA 0x00000000 |
| 3186 | #define DDRSS1_PHY_221_DATA 0x00000000 |
| 3187 | #define DDRSS1_PHY_222_DATA 0x00000000 |
| 3188 | #define DDRSS1_PHY_223_DATA 0x00000000 |
| 3189 | #define DDRSS1_PHY_224_DATA 0x00000000 |
| 3190 | #define DDRSS1_PHY_225_DATA 0x00000000 |
| 3191 | #define DDRSS1_PHY_226_DATA 0x00000000 |
| 3192 | #define DDRSS1_PHY_227_DATA 0x00000000 |
| 3193 | #define DDRSS1_PHY_228_DATA 0x00000000 |
| 3194 | #define DDRSS1_PHY_229_DATA 0x00000000 |
| 3195 | #define DDRSS1_PHY_230_DATA 0x00000000 |
| 3196 | #define DDRSS1_PHY_231_DATA 0x00000000 |
| 3197 | #define DDRSS1_PHY_232_DATA 0x00000000 |
| 3198 | #define DDRSS1_PHY_233_DATA 0x00000000 |
| 3199 | #define DDRSS1_PHY_234_DATA 0x00000000 |
| 3200 | #define DDRSS1_PHY_235_DATA 0x00000000 |
| 3201 | #define DDRSS1_PHY_236_DATA 0x00000000 |
| 3202 | #define DDRSS1_PHY_237_DATA 0x00000000 |
| 3203 | #define DDRSS1_PHY_238_DATA 0x00000000 |
| 3204 | #define DDRSS1_PHY_239_DATA 0x00000000 |
| 3205 | #define DDRSS1_PHY_240_DATA 0x00000000 |
| 3206 | #define DDRSS1_PHY_241_DATA 0x00000000 |
| 3207 | #define DDRSS1_PHY_242_DATA 0x00000000 |
| 3208 | #define DDRSS1_PHY_243_DATA 0x00000000 |
| 3209 | #define DDRSS1_PHY_244_DATA 0x00000000 |
| 3210 | #define DDRSS1_PHY_245_DATA 0x00000000 |
| 3211 | #define DDRSS1_PHY_246_DATA 0x00000000 |
| 3212 | #define DDRSS1_PHY_247_DATA 0x00000000 |
| 3213 | #define DDRSS1_PHY_248_DATA 0x00000000 |
| 3214 | #define DDRSS1_PHY_249_DATA 0x00000000 |
| 3215 | #define DDRSS1_PHY_250_DATA 0x00000000 |
| 3216 | #define DDRSS1_PHY_251_DATA 0x00000000 |
| 3217 | #define DDRSS1_PHY_252_DATA 0x00000000 |
| 3218 | #define DDRSS1_PHY_253_DATA 0x00000000 |
| 3219 | #define DDRSS1_PHY_254_DATA 0x00000000 |
| 3220 | #define DDRSS1_PHY_255_DATA 0x00000000 |
| 3221 | #define DDRSS1_PHY_256_DATA 0x000004F0 |
| 3222 | #define DDRSS1_PHY_257_DATA 0x00000000 |
| 3223 | #define DDRSS1_PHY_258_DATA 0x00030200 |
| 3224 | #define DDRSS1_PHY_259_DATA 0x00000000 |
| 3225 | #define DDRSS1_PHY_260_DATA 0x00000000 |
| 3226 | #define DDRSS1_PHY_261_DATA 0x01030000 |
| 3227 | #define DDRSS1_PHY_262_DATA 0x00010000 |
| 3228 | #define DDRSS1_PHY_263_DATA 0x01030004 |
| 3229 | #define DDRSS1_PHY_264_DATA 0x01000000 |
| 3230 | #define DDRSS1_PHY_265_DATA 0x00000000 |
| 3231 | #define DDRSS1_PHY_266_DATA 0x00000000 |
| 3232 | #define DDRSS1_PHY_267_DATA 0x01000001 |
| 3233 | #define DDRSS1_PHY_268_DATA 0x00000100 |
| 3234 | #define DDRSS1_PHY_269_DATA 0x000800C0 |
| 3235 | #define DDRSS1_PHY_270_DATA 0x060100CC |
| 3236 | #define DDRSS1_PHY_271_DATA 0x00030066 |
| 3237 | #define DDRSS1_PHY_272_DATA 0x00000000 |
| 3238 | #define DDRSS1_PHY_273_DATA 0x00000301 |
| 3239 | #define DDRSS1_PHY_274_DATA 0x0000AAAA |
| 3240 | #define DDRSS1_PHY_275_DATA 0x00005555 |
| 3241 | #define DDRSS1_PHY_276_DATA 0x0000B5B5 |
| 3242 | #define DDRSS1_PHY_277_DATA 0x00004A4A |
| 3243 | #define DDRSS1_PHY_278_DATA 0x00005656 |
| 3244 | #define DDRSS1_PHY_279_DATA 0x0000A9A9 |
| 3245 | #define DDRSS1_PHY_280_DATA 0x0000A9A9 |
| 3246 | #define DDRSS1_PHY_281_DATA 0x0000B5B5 |
| 3247 | #define DDRSS1_PHY_282_DATA 0x00000000 |
| 3248 | #define DDRSS1_PHY_283_DATA 0x00000000 |
| 3249 | #define DDRSS1_PHY_284_DATA 0x2A000000 |
| 3250 | #define DDRSS1_PHY_285_DATA 0x00000808 |
| 3251 | #define DDRSS1_PHY_286_DATA 0x0F000000 |
| 3252 | #define DDRSS1_PHY_287_DATA 0x00000F0F |
| 3253 | #define DDRSS1_PHY_288_DATA 0x10400000 |
| 3254 | #define DDRSS1_PHY_289_DATA 0x0C002006 |
| 3255 | #define DDRSS1_PHY_290_DATA 0x00000000 |
| 3256 | #define DDRSS1_PHY_291_DATA 0x00000000 |
| 3257 | #define DDRSS1_PHY_292_DATA 0x55555555 |
| 3258 | #define DDRSS1_PHY_293_DATA 0xAAAAAAAA |
| 3259 | #define DDRSS1_PHY_294_DATA 0x55555555 |
| 3260 | #define DDRSS1_PHY_295_DATA 0xAAAAAAAA |
| 3261 | #define DDRSS1_PHY_296_DATA 0x00005555 |
| 3262 | #define DDRSS1_PHY_297_DATA 0x01000100 |
| 3263 | #define DDRSS1_PHY_298_DATA 0x00800180 |
| 3264 | #define DDRSS1_PHY_299_DATA 0x00000000 |
| 3265 | #define DDRSS1_PHY_300_DATA 0x00000000 |
| 3266 | #define DDRSS1_PHY_301_DATA 0x00000000 |
| 3267 | #define DDRSS1_PHY_302_DATA 0x00000000 |
| 3268 | #define DDRSS1_PHY_303_DATA 0x00000000 |
| 3269 | #define DDRSS1_PHY_304_DATA 0x00000000 |
| 3270 | #define DDRSS1_PHY_305_DATA 0x00000000 |
| 3271 | #define DDRSS1_PHY_306_DATA 0x00000000 |
| 3272 | #define DDRSS1_PHY_307_DATA 0x00000000 |
| 3273 | #define DDRSS1_PHY_308_DATA 0x00000000 |
| 3274 | #define DDRSS1_PHY_309_DATA 0x00000000 |
| 3275 | #define DDRSS1_PHY_310_DATA 0x00000000 |
| 3276 | #define DDRSS1_PHY_311_DATA 0x00000000 |
| 3277 | #define DDRSS1_PHY_312_DATA 0x00000000 |
| 3278 | #define DDRSS1_PHY_313_DATA 0x00000000 |
| 3279 | #define DDRSS1_PHY_314_DATA 0x00000000 |
| 3280 | #define DDRSS1_PHY_315_DATA 0x00000000 |
| 3281 | #define DDRSS1_PHY_316_DATA 0x00000000 |
| 3282 | #define DDRSS1_PHY_317_DATA 0x00000000 |
| 3283 | #define DDRSS1_PHY_318_DATA 0x00000000 |
| 3284 | #define DDRSS1_PHY_319_DATA 0x00000000 |
| 3285 | #define DDRSS1_PHY_320_DATA 0x00000000 |
| 3286 | #define DDRSS1_PHY_321_DATA 0x00000000 |
| 3287 | #define DDRSS1_PHY_322_DATA 0x00000104 |
| 3288 | #define DDRSS1_PHY_323_DATA 0x00000120 |
| 3289 | #define DDRSS1_PHY_324_DATA 0x00000000 |
| 3290 | #define DDRSS1_PHY_325_DATA 0x00000000 |
| 3291 | #define DDRSS1_PHY_326_DATA 0x00000000 |
| 3292 | #define DDRSS1_PHY_327_DATA 0x00000000 |
| 3293 | #define DDRSS1_PHY_328_DATA 0x00000000 |
| 3294 | #define DDRSS1_PHY_329_DATA 0x00000000 |
| 3295 | #define DDRSS1_PHY_330_DATA 0x00000000 |
| 3296 | #define DDRSS1_PHY_331_DATA 0x00000001 |
| 3297 | #define DDRSS1_PHY_332_DATA 0x07FF0000 |
| 3298 | #define DDRSS1_PHY_333_DATA 0x0080081F |
| 3299 | #define DDRSS1_PHY_334_DATA 0x00081020 |
| 3300 | #define DDRSS1_PHY_335_DATA 0x04010000 |
| 3301 | #define DDRSS1_PHY_336_DATA 0x00000000 |
| 3302 | #define DDRSS1_PHY_337_DATA 0x00000000 |
| 3303 | #define DDRSS1_PHY_338_DATA 0x00000000 |
| 3304 | #define DDRSS1_PHY_339_DATA 0x00000100 |
| 3305 | #define DDRSS1_PHY_340_DATA 0x01CC0C01 |
| 3306 | #define DDRSS1_PHY_341_DATA 0x1003CC0C |
| 3307 | #define DDRSS1_PHY_342_DATA 0x20000140 |
| 3308 | #define DDRSS1_PHY_343_DATA 0x07FF0200 |
| 3309 | #define DDRSS1_PHY_344_DATA 0x0000DD01 |
| 3310 | #define DDRSS1_PHY_345_DATA 0x10100303 |
| 3311 | #define DDRSS1_PHY_346_DATA 0x10101010 |
| 3312 | #define DDRSS1_PHY_347_DATA 0x10101010 |
| 3313 | #define DDRSS1_PHY_348_DATA 0x00021010 |
| 3314 | #define DDRSS1_PHY_349_DATA 0x00100010 |
| 3315 | #define DDRSS1_PHY_350_DATA 0x00100010 |
| 3316 | #define DDRSS1_PHY_351_DATA 0x00100010 |
| 3317 | #define DDRSS1_PHY_352_DATA 0x00100010 |
| 3318 | #define DDRSS1_PHY_353_DATA 0x00050010 |
| 3319 | #define DDRSS1_PHY_354_DATA 0x51517041 |
| 3320 | #define DDRSS1_PHY_355_DATA 0x31C06001 |
| 3321 | #define DDRSS1_PHY_356_DATA 0x07AB0340 |
| 3322 | #define DDRSS1_PHY_357_DATA 0x00C0C001 |
| 3323 | #define DDRSS1_PHY_358_DATA 0x0E0D0001 |
| 3324 | #define DDRSS1_PHY_359_DATA 0x10001000 |
| 3325 | #define DDRSS1_PHY_360_DATA 0x0C083E42 |
| 3326 | #define DDRSS1_PHY_361_DATA 0x0F0C3701 |
| 3327 | #define DDRSS1_PHY_362_DATA 0x01000140 |
| 3328 | #define DDRSS1_PHY_363_DATA 0x0C000420 |
| 3329 | #define DDRSS1_PHY_364_DATA 0x00000198 |
| 3330 | #define DDRSS1_PHY_365_DATA 0x0A0000D0 |
| 3331 | #define DDRSS1_PHY_366_DATA 0x00030200 |
| 3332 | #define DDRSS1_PHY_367_DATA 0x02800000 |
| 3333 | #define DDRSS1_PHY_368_DATA 0x80800000 |
| 3334 | #define DDRSS1_PHY_369_DATA 0x000E2010 |
| 3335 | #define DDRSS1_PHY_370_DATA 0x76543210 |
| 3336 | #define DDRSS1_PHY_371_DATA 0x00000008 |
| 3337 | #define DDRSS1_PHY_372_DATA 0x02800280 |
| 3338 | #define DDRSS1_PHY_373_DATA 0x02800280 |
| 3339 | #define DDRSS1_PHY_374_DATA 0x02800280 |
| 3340 | #define DDRSS1_PHY_375_DATA 0x02800280 |
| 3341 | #define DDRSS1_PHY_376_DATA 0x00000280 |
| 3342 | #define DDRSS1_PHY_377_DATA 0x0000A000 |
| 3343 | #define DDRSS1_PHY_378_DATA 0x00A000A0 |
| 3344 | #define DDRSS1_PHY_379_DATA 0x00A000A0 |
| 3345 | #define DDRSS1_PHY_380_DATA 0x00A000A0 |
| 3346 | #define DDRSS1_PHY_381_DATA 0x00A000A0 |
| 3347 | #define DDRSS1_PHY_382_DATA 0x00A000A0 |
| 3348 | #define DDRSS1_PHY_383_DATA 0x00A000A0 |
| 3349 | #define DDRSS1_PHY_384_DATA 0x00A000A0 |
| 3350 | #define DDRSS1_PHY_385_DATA 0x00A000A0 |
| 3351 | #define DDRSS1_PHY_386_DATA 0x01C200A0 |
| 3352 | #define DDRSS1_PHY_387_DATA 0x01A00005 |
| 3353 | #define DDRSS1_PHY_388_DATA 0x00000000 |
| 3354 | #define DDRSS1_PHY_389_DATA 0x00000000 |
| 3355 | #define DDRSS1_PHY_390_DATA 0x00080200 |
| 3356 | #define DDRSS1_PHY_391_DATA 0x00000000 |
| 3357 | #define DDRSS1_PHY_392_DATA 0x20202000 |
| 3358 | #define DDRSS1_PHY_393_DATA 0x20202020 |
| 3359 | #define DDRSS1_PHY_394_DATA 0xF0F02020 |
| 3360 | #define DDRSS1_PHY_395_DATA 0x00000000 |
| 3361 | #define DDRSS1_PHY_396_DATA 0x00000000 |
| 3362 | #define DDRSS1_PHY_397_DATA 0x00000000 |
| 3363 | #define DDRSS1_PHY_398_DATA 0x00000000 |
| 3364 | #define DDRSS1_PHY_399_DATA 0x00000000 |
| 3365 | #define DDRSS1_PHY_400_DATA 0x00000000 |
| 3366 | #define DDRSS1_PHY_401_DATA 0x00000000 |
| 3367 | #define DDRSS1_PHY_402_DATA 0x00000000 |
| 3368 | #define DDRSS1_PHY_403_DATA 0x00000000 |
| 3369 | #define DDRSS1_PHY_404_DATA 0x00000000 |
| 3370 | #define DDRSS1_PHY_405_DATA 0x00000000 |
| 3371 | #define DDRSS1_PHY_406_DATA 0x00000000 |
| 3372 | #define DDRSS1_PHY_407_DATA 0x00000000 |
| 3373 | #define DDRSS1_PHY_408_DATA 0x00000000 |
| 3374 | #define DDRSS1_PHY_409_DATA 0x00000000 |
| 3375 | #define DDRSS1_PHY_410_DATA 0x00000000 |
| 3376 | #define DDRSS1_PHY_411_DATA 0x00000000 |
| 3377 | #define DDRSS1_PHY_412_DATA 0x00000000 |
| 3378 | #define DDRSS1_PHY_413_DATA 0x00000000 |
| 3379 | #define DDRSS1_PHY_414_DATA 0x00000000 |
| 3380 | #define DDRSS1_PHY_415_DATA 0x00000000 |
| 3381 | #define DDRSS1_PHY_416_DATA 0x00000000 |
| 3382 | #define DDRSS1_PHY_417_DATA 0x00000000 |
| 3383 | #define DDRSS1_PHY_418_DATA 0x00000000 |
| 3384 | #define DDRSS1_PHY_419_DATA 0x00000000 |
| 3385 | #define DDRSS1_PHY_420_DATA 0x00000000 |
| 3386 | #define DDRSS1_PHY_421_DATA 0x00000000 |
| 3387 | #define DDRSS1_PHY_422_DATA 0x00000000 |
| 3388 | #define DDRSS1_PHY_423_DATA 0x00000000 |
| 3389 | #define DDRSS1_PHY_424_DATA 0x00000000 |
| 3390 | #define DDRSS1_PHY_425_DATA 0x00000000 |
| 3391 | #define DDRSS1_PHY_426_DATA 0x00000000 |
| 3392 | #define DDRSS1_PHY_427_DATA 0x00000000 |
| 3393 | #define DDRSS1_PHY_428_DATA 0x00000000 |
| 3394 | #define DDRSS1_PHY_429_DATA 0x00000000 |
| 3395 | #define DDRSS1_PHY_430_DATA 0x00000000 |
| 3396 | #define DDRSS1_PHY_431_DATA 0x00000000 |
| 3397 | #define DDRSS1_PHY_432_DATA 0x00000000 |
| 3398 | #define DDRSS1_PHY_433_DATA 0x00000000 |
| 3399 | #define DDRSS1_PHY_434_DATA 0x00000000 |
| 3400 | #define DDRSS1_PHY_435_DATA 0x00000000 |
| 3401 | #define DDRSS1_PHY_436_DATA 0x00000000 |
| 3402 | #define DDRSS1_PHY_437_DATA 0x00000000 |
| 3403 | #define DDRSS1_PHY_438_DATA 0x00000000 |
| 3404 | #define DDRSS1_PHY_439_DATA 0x00000000 |
| 3405 | #define DDRSS1_PHY_440_DATA 0x00000000 |
| 3406 | #define DDRSS1_PHY_441_DATA 0x00000000 |
| 3407 | #define DDRSS1_PHY_442_DATA 0x00000000 |
| 3408 | #define DDRSS1_PHY_443_DATA 0x00000000 |
| 3409 | #define DDRSS1_PHY_444_DATA 0x00000000 |
| 3410 | #define DDRSS1_PHY_445_DATA 0x00000000 |
| 3411 | #define DDRSS1_PHY_446_DATA 0x00000000 |
| 3412 | #define DDRSS1_PHY_447_DATA 0x00000000 |
| 3413 | #define DDRSS1_PHY_448_DATA 0x00000000 |
| 3414 | #define DDRSS1_PHY_449_DATA 0x00000000 |
| 3415 | #define DDRSS1_PHY_450_DATA 0x00000000 |
| 3416 | #define DDRSS1_PHY_451_DATA 0x00000000 |
| 3417 | #define DDRSS1_PHY_452_DATA 0x00000000 |
| 3418 | #define DDRSS1_PHY_453_DATA 0x00000000 |
| 3419 | #define DDRSS1_PHY_454_DATA 0x00000000 |
| 3420 | #define DDRSS1_PHY_455_DATA 0x00000000 |
| 3421 | #define DDRSS1_PHY_456_DATA 0x00000000 |
| 3422 | #define DDRSS1_PHY_457_DATA 0x00000000 |
| 3423 | #define DDRSS1_PHY_458_DATA 0x00000000 |
| 3424 | #define DDRSS1_PHY_459_DATA 0x00000000 |
| 3425 | #define DDRSS1_PHY_460_DATA 0x00000000 |
| 3426 | #define DDRSS1_PHY_461_DATA 0x00000000 |
| 3427 | #define DDRSS1_PHY_462_DATA 0x00000000 |
| 3428 | #define DDRSS1_PHY_463_DATA 0x00000000 |
| 3429 | #define DDRSS1_PHY_464_DATA 0x00000000 |
| 3430 | #define DDRSS1_PHY_465_DATA 0x00000000 |
| 3431 | #define DDRSS1_PHY_466_DATA 0x00000000 |
| 3432 | #define DDRSS1_PHY_467_DATA 0x00000000 |
| 3433 | #define DDRSS1_PHY_468_DATA 0x00000000 |
| 3434 | #define DDRSS1_PHY_469_DATA 0x00000000 |
| 3435 | #define DDRSS1_PHY_470_DATA 0x00000000 |
| 3436 | #define DDRSS1_PHY_471_DATA 0x00000000 |
| 3437 | #define DDRSS1_PHY_472_DATA 0x00000000 |
| 3438 | #define DDRSS1_PHY_473_DATA 0x00000000 |
| 3439 | #define DDRSS1_PHY_474_DATA 0x00000000 |
| 3440 | #define DDRSS1_PHY_475_DATA 0x00000000 |
| 3441 | #define DDRSS1_PHY_476_DATA 0x00000000 |
| 3442 | #define DDRSS1_PHY_477_DATA 0x00000000 |
| 3443 | #define DDRSS1_PHY_478_DATA 0x00000000 |
| 3444 | #define DDRSS1_PHY_479_DATA 0x00000000 |
| 3445 | #define DDRSS1_PHY_480_DATA 0x00000000 |
| 3446 | #define DDRSS1_PHY_481_DATA 0x00000000 |
| 3447 | #define DDRSS1_PHY_482_DATA 0x00000000 |
| 3448 | #define DDRSS1_PHY_483_DATA 0x00000000 |
| 3449 | #define DDRSS1_PHY_484_DATA 0x00000000 |
| 3450 | #define DDRSS1_PHY_485_DATA 0x00000000 |
| 3451 | #define DDRSS1_PHY_486_DATA 0x00000000 |
| 3452 | #define DDRSS1_PHY_487_DATA 0x00000000 |
| 3453 | #define DDRSS1_PHY_488_DATA 0x00000000 |
| 3454 | #define DDRSS1_PHY_489_DATA 0x00000000 |
| 3455 | #define DDRSS1_PHY_490_DATA 0x00000000 |
| 3456 | #define DDRSS1_PHY_491_DATA 0x00000000 |
| 3457 | #define DDRSS1_PHY_492_DATA 0x00000000 |
| 3458 | #define DDRSS1_PHY_493_DATA 0x00000000 |
| 3459 | #define DDRSS1_PHY_494_DATA 0x00000000 |
| 3460 | #define DDRSS1_PHY_495_DATA 0x00000000 |
| 3461 | #define DDRSS1_PHY_496_DATA 0x00000000 |
| 3462 | #define DDRSS1_PHY_497_DATA 0x00000000 |
| 3463 | #define DDRSS1_PHY_498_DATA 0x00000000 |
| 3464 | #define DDRSS1_PHY_499_DATA 0x00000000 |
| 3465 | #define DDRSS1_PHY_500_DATA 0x00000000 |
| 3466 | #define DDRSS1_PHY_501_DATA 0x00000000 |
| 3467 | #define DDRSS1_PHY_502_DATA 0x00000000 |
| 3468 | #define DDRSS1_PHY_503_DATA 0x00000000 |
| 3469 | #define DDRSS1_PHY_504_DATA 0x00000000 |
| 3470 | #define DDRSS1_PHY_505_DATA 0x00000000 |
| 3471 | #define DDRSS1_PHY_506_DATA 0x00000000 |
| 3472 | #define DDRSS1_PHY_507_DATA 0x00000000 |
| 3473 | #define DDRSS1_PHY_508_DATA 0x00000000 |
| 3474 | #define DDRSS1_PHY_509_DATA 0x00000000 |
| 3475 | #define DDRSS1_PHY_510_DATA 0x00000000 |
| 3476 | #define DDRSS1_PHY_511_DATA 0x00000000 |
| 3477 | #define DDRSS1_PHY_512_DATA 0x000004F0 |
| 3478 | #define DDRSS1_PHY_513_DATA 0x00000000 |
| 3479 | #define DDRSS1_PHY_514_DATA 0x00030200 |
| 3480 | #define DDRSS1_PHY_515_DATA 0x00000000 |
| 3481 | #define DDRSS1_PHY_516_DATA 0x00000000 |
| 3482 | #define DDRSS1_PHY_517_DATA 0x01030000 |
| 3483 | #define DDRSS1_PHY_518_DATA 0x00010000 |
| 3484 | #define DDRSS1_PHY_519_DATA 0x01030004 |
| 3485 | #define DDRSS1_PHY_520_DATA 0x01000000 |
| 3486 | #define DDRSS1_PHY_521_DATA 0x00000000 |
| 3487 | #define DDRSS1_PHY_522_DATA 0x00000000 |
| 3488 | #define DDRSS1_PHY_523_DATA 0x01000001 |
| 3489 | #define DDRSS1_PHY_524_DATA 0x00000100 |
| 3490 | #define DDRSS1_PHY_525_DATA 0x000800C0 |
| 3491 | #define DDRSS1_PHY_526_DATA 0x060100CC |
| 3492 | #define DDRSS1_PHY_527_DATA 0x00030066 |
| 3493 | #define DDRSS1_PHY_528_DATA 0x00000000 |
| 3494 | #define DDRSS1_PHY_529_DATA 0x00000301 |
| 3495 | #define DDRSS1_PHY_530_DATA 0x0000AAAA |
| 3496 | #define DDRSS1_PHY_531_DATA 0x00005555 |
| 3497 | #define DDRSS1_PHY_532_DATA 0x0000B5B5 |
| 3498 | #define DDRSS1_PHY_533_DATA 0x00004A4A |
| 3499 | #define DDRSS1_PHY_534_DATA 0x00005656 |
| 3500 | #define DDRSS1_PHY_535_DATA 0x0000A9A9 |
| 3501 | #define DDRSS1_PHY_536_DATA 0x0000A9A9 |
| 3502 | #define DDRSS1_PHY_537_DATA 0x0000B5B5 |
| 3503 | #define DDRSS1_PHY_538_DATA 0x00000000 |
| 3504 | #define DDRSS1_PHY_539_DATA 0x00000000 |
| 3505 | #define DDRSS1_PHY_540_DATA 0x2A000000 |
| 3506 | #define DDRSS1_PHY_541_DATA 0x00000808 |
| 3507 | #define DDRSS1_PHY_542_DATA 0x0F000000 |
| 3508 | #define DDRSS1_PHY_543_DATA 0x00000F0F |
| 3509 | #define DDRSS1_PHY_544_DATA 0x10400000 |
| 3510 | #define DDRSS1_PHY_545_DATA 0x0C002006 |
| 3511 | #define DDRSS1_PHY_546_DATA 0x00000000 |
| 3512 | #define DDRSS1_PHY_547_DATA 0x00000000 |
| 3513 | #define DDRSS1_PHY_548_DATA 0x55555555 |
| 3514 | #define DDRSS1_PHY_549_DATA 0xAAAAAAAA |
| 3515 | #define DDRSS1_PHY_550_DATA 0x55555555 |
| 3516 | #define DDRSS1_PHY_551_DATA 0xAAAAAAAA |
| 3517 | #define DDRSS1_PHY_552_DATA 0x00005555 |
| 3518 | #define DDRSS1_PHY_553_DATA 0x01000100 |
| 3519 | #define DDRSS1_PHY_554_DATA 0x00800180 |
| 3520 | #define DDRSS1_PHY_555_DATA 0x00000001 |
| 3521 | #define DDRSS1_PHY_556_DATA 0x00000000 |
| 3522 | #define DDRSS1_PHY_557_DATA 0x00000000 |
| 3523 | #define DDRSS1_PHY_558_DATA 0x00000000 |
| 3524 | #define DDRSS1_PHY_559_DATA 0x00000000 |
| 3525 | #define DDRSS1_PHY_560_DATA 0x00000000 |
| 3526 | #define DDRSS1_PHY_561_DATA 0x00000000 |
| 3527 | #define DDRSS1_PHY_562_DATA 0x00000000 |
| 3528 | #define DDRSS1_PHY_563_DATA 0x00000000 |
| 3529 | #define DDRSS1_PHY_564_DATA 0x00000000 |
| 3530 | #define DDRSS1_PHY_565_DATA 0x00000000 |
| 3531 | #define DDRSS1_PHY_566_DATA 0x00000000 |
| 3532 | #define DDRSS1_PHY_567_DATA 0x00000000 |
| 3533 | #define DDRSS1_PHY_568_DATA 0x00000000 |
| 3534 | #define DDRSS1_PHY_569_DATA 0x00000000 |
| 3535 | #define DDRSS1_PHY_570_DATA 0x00000000 |
| 3536 | #define DDRSS1_PHY_571_DATA 0x00000000 |
| 3537 | #define DDRSS1_PHY_572_DATA 0x00000000 |
| 3538 | #define DDRSS1_PHY_573_DATA 0x00000000 |
| 3539 | #define DDRSS1_PHY_574_DATA 0x00000000 |
| 3540 | #define DDRSS1_PHY_575_DATA 0x00000000 |
| 3541 | #define DDRSS1_PHY_576_DATA 0x00000000 |
| 3542 | #define DDRSS1_PHY_577_DATA 0x00000000 |
| 3543 | #define DDRSS1_PHY_578_DATA 0x00000104 |
| 3544 | #define DDRSS1_PHY_579_DATA 0x00000120 |
| 3545 | #define DDRSS1_PHY_580_DATA 0x00000000 |
| 3546 | #define DDRSS1_PHY_581_DATA 0x00000000 |
| 3547 | #define DDRSS1_PHY_582_DATA 0x00000000 |
| 3548 | #define DDRSS1_PHY_583_DATA 0x00000000 |
| 3549 | #define DDRSS1_PHY_584_DATA 0x00000000 |
| 3550 | #define DDRSS1_PHY_585_DATA 0x00000000 |
| 3551 | #define DDRSS1_PHY_586_DATA 0x00000000 |
| 3552 | #define DDRSS1_PHY_587_DATA 0x00000001 |
| 3553 | #define DDRSS1_PHY_588_DATA 0x07FF0000 |
| 3554 | #define DDRSS1_PHY_589_DATA 0x0080081F |
| 3555 | #define DDRSS1_PHY_590_DATA 0x00081020 |
| 3556 | #define DDRSS1_PHY_591_DATA 0x04010000 |
| 3557 | #define DDRSS1_PHY_592_DATA 0x00000000 |
| 3558 | #define DDRSS1_PHY_593_DATA 0x00000000 |
| 3559 | #define DDRSS1_PHY_594_DATA 0x00000000 |
| 3560 | #define DDRSS1_PHY_595_DATA 0x00000100 |
| 3561 | #define DDRSS1_PHY_596_DATA 0x01CC0C01 |
| 3562 | #define DDRSS1_PHY_597_DATA 0x1003CC0C |
| 3563 | #define DDRSS1_PHY_598_DATA 0x20000140 |
| 3564 | #define DDRSS1_PHY_599_DATA 0x07FF0200 |
| 3565 | #define DDRSS1_PHY_600_DATA 0x0000DD01 |
| 3566 | #define DDRSS1_PHY_601_DATA 0x10100303 |
| 3567 | #define DDRSS1_PHY_602_DATA 0x10101010 |
| 3568 | #define DDRSS1_PHY_603_DATA 0x10101010 |
| 3569 | #define DDRSS1_PHY_604_DATA 0x00021010 |
| 3570 | #define DDRSS1_PHY_605_DATA 0x00100010 |
| 3571 | #define DDRSS1_PHY_606_DATA 0x00100010 |
| 3572 | #define DDRSS1_PHY_607_DATA 0x00100010 |
| 3573 | #define DDRSS1_PHY_608_DATA 0x00100010 |
| 3574 | #define DDRSS1_PHY_609_DATA 0x00050010 |
| 3575 | #define DDRSS1_PHY_610_DATA 0x51517041 |
| 3576 | #define DDRSS1_PHY_611_DATA 0x31C06001 |
| 3577 | #define DDRSS1_PHY_612_DATA 0x07AB0340 |
| 3578 | #define DDRSS1_PHY_613_DATA 0x00C0C001 |
| 3579 | #define DDRSS1_PHY_614_DATA 0x0E0D0001 |
| 3580 | #define DDRSS1_PHY_615_DATA 0x10001000 |
| 3581 | #define DDRSS1_PHY_616_DATA 0x0C083E42 |
| 3582 | #define DDRSS1_PHY_617_DATA 0x0F0C3701 |
| 3583 | #define DDRSS1_PHY_618_DATA 0x01000140 |
| 3584 | #define DDRSS1_PHY_619_DATA 0x0C000420 |
| 3585 | #define DDRSS1_PHY_620_DATA 0x00000198 |
| 3586 | #define DDRSS1_PHY_621_DATA 0x0A0000D0 |
| 3587 | #define DDRSS1_PHY_622_DATA 0x00030200 |
| 3588 | #define DDRSS1_PHY_623_DATA 0x02800000 |
| 3589 | #define DDRSS1_PHY_624_DATA 0x80800000 |
| 3590 | #define DDRSS1_PHY_625_DATA 0x000E2010 |
| 3591 | #define DDRSS1_PHY_626_DATA 0x76543210 |
| 3592 | #define DDRSS1_PHY_627_DATA 0x00000008 |
| 3593 | #define DDRSS1_PHY_628_DATA 0x02800280 |
| 3594 | #define DDRSS1_PHY_629_DATA 0x02800280 |
| 3595 | #define DDRSS1_PHY_630_DATA 0x02800280 |
| 3596 | #define DDRSS1_PHY_631_DATA 0x02800280 |
| 3597 | #define DDRSS1_PHY_632_DATA 0x00000280 |
| 3598 | #define DDRSS1_PHY_633_DATA 0x0000A000 |
| 3599 | #define DDRSS1_PHY_634_DATA 0x00A000A0 |
| 3600 | #define DDRSS1_PHY_635_DATA 0x00A000A0 |
| 3601 | #define DDRSS1_PHY_636_DATA 0x00A000A0 |
| 3602 | #define DDRSS1_PHY_637_DATA 0x00A000A0 |
| 3603 | #define DDRSS1_PHY_638_DATA 0x00A000A0 |
| 3604 | #define DDRSS1_PHY_639_DATA 0x00A000A0 |
| 3605 | #define DDRSS1_PHY_640_DATA 0x00A000A0 |
| 3606 | #define DDRSS1_PHY_641_DATA 0x00A000A0 |
| 3607 | #define DDRSS1_PHY_642_DATA 0x01C200A0 |
| 3608 | #define DDRSS1_PHY_643_DATA 0x01A00005 |
| 3609 | #define DDRSS1_PHY_644_DATA 0x00000000 |
| 3610 | #define DDRSS1_PHY_645_DATA 0x00000000 |
| 3611 | #define DDRSS1_PHY_646_DATA 0x00080200 |
| 3612 | #define DDRSS1_PHY_647_DATA 0x00000000 |
| 3613 | #define DDRSS1_PHY_648_DATA 0x20202000 |
| 3614 | #define DDRSS1_PHY_649_DATA 0x20202020 |
| 3615 | #define DDRSS1_PHY_650_DATA 0xF0F02020 |
| 3616 | #define DDRSS1_PHY_651_DATA 0x00000000 |
| 3617 | #define DDRSS1_PHY_652_DATA 0x00000000 |
| 3618 | #define DDRSS1_PHY_653_DATA 0x00000000 |
| 3619 | #define DDRSS1_PHY_654_DATA 0x00000000 |
| 3620 | #define DDRSS1_PHY_655_DATA 0x00000000 |
| 3621 | #define DDRSS1_PHY_656_DATA 0x00000000 |
| 3622 | #define DDRSS1_PHY_657_DATA 0x00000000 |
| 3623 | #define DDRSS1_PHY_658_DATA 0x00000000 |
| 3624 | #define DDRSS1_PHY_659_DATA 0x00000000 |
| 3625 | #define DDRSS1_PHY_660_DATA 0x00000000 |
| 3626 | #define DDRSS1_PHY_661_DATA 0x00000000 |
| 3627 | #define DDRSS1_PHY_662_DATA 0x00000000 |
| 3628 | #define DDRSS1_PHY_663_DATA 0x00000000 |
| 3629 | #define DDRSS1_PHY_664_DATA 0x00000000 |
| 3630 | #define DDRSS1_PHY_665_DATA 0x00000000 |
| 3631 | #define DDRSS1_PHY_666_DATA 0x00000000 |
| 3632 | #define DDRSS1_PHY_667_DATA 0x00000000 |
| 3633 | #define DDRSS1_PHY_668_DATA 0x00000000 |
| 3634 | #define DDRSS1_PHY_669_DATA 0x00000000 |
| 3635 | #define DDRSS1_PHY_670_DATA 0x00000000 |
| 3636 | #define DDRSS1_PHY_671_DATA 0x00000000 |
| 3637 | #define DDRSS1_PHY_672_DATA 0x00000000 |
| 3638 | #define DDRSS1_PHY_673_DATA 0x00000000 |
| 3639 | #define DDRSS1_PHY_674_DATA 0x00000000 |
| 3640 | #define DDRSS1_PHY_675_DATA 0x00000000 |
| 3641 | #define DDRSS1_PHY_676_DATA 0x00000000 |
| 3642 | #define DDRSS1_PHY_677_DATA 0x00000000 |
| 3643 | #define DDRSS1_PHY_678_DATA 0x00000000 |
| 3644 | #define DDRSS1_PHY_679_DATA 0x00000000 |
| 3645 | #define DDRSS1_PHY_680_DATA 0x00000000 |
| 3646 | #define DDRSS1_PHY_681_DATA 0x00000000 |
| 3647 | #define DDRSS1_PHY_682_DATA 0x00000000 |
| 3648 | #define DDRSS1_PHY_683_DATA 0x00000000 |
| 3649 | #define DDRSS1_PHY_684_DATA 0x00000000 |
| 3650 | #define DDRSS1_PHY_685_DATA 0x00000000 |
| 3651 | #define DDRSS1_PHY_686_DATA 0x00000000 |
| 3652 | #define DDRSS1_PHY_687_DATA 0x00000000 |
| 3653 | #define DDRSS1_PHY_688_DATA 0x00000000 |
| 3654 | #define DDRSS1_PHY_689_DATA 0x00000000 |
| 3655 | #define DDRSS1_PHY_690_DATA 0x00000000 |
| 3656 | #define DDRSS1_PHY_691_DATA 0x00000000 |
| 3657 | #define DDRSS1_PHY_692_DATA 0x00000000 |
| 3658 | #define DDRSS1_PHY_693_DATA 0x00000000 |
| 3659 | #define DDRSS1_PHY_694_DATA 0x00000000 |
| 3660 | #define DDRSS1_PHY_695_DATA 0x00000000 |
| 3661 | #define DDRSS1_PHY_696_DATA 0x00000000 |
| 3662 | #define DDRSS1_PHY_697_DATA 0x00000000 |
| 3663 | #define DDRSS1_PHY_698_DATA 0x00000000 |
| 3664 | #define DDRSS1_PHY_699_DATA 0x00000000 |
| 3665 | #define DDRSS1_PHY_700_DATA 0x00000000 |
| 3666 | #define DDRSS1_PHY_701_DATA 0x00000000 |
| 3667 | #define DDRSS1_PHY_702_DATA 0x00000000 |
| 3668 | #define DDRSS1_PHY_703_DATA 0x00000000 |
| 3669 | #define DDRSS1_PHY_704_DATA 0x00000000 |
| 3670 | #define DDRSS1_PHY_705_DATA 0x00000000 |
| 3671 | #define DDRSS1_PHY_706_DATA 0x00000000 |
| 3672 | #define DDRSS1_PHY_707_DATA 0x00000000 |
| 3673 | #define DDRSS1_PHY_708_DATA 0x00000000 |
| 3674 | #define DDRSS1_PHY_709_DATA 0x00000000 |
| 3675 | #define DDRSS1_PHY_710_DATA 0x00000000 |
| 3676 | #define DDRSS1_PHY_711_DATA 0x00000000 |
| 3677 | #define DDRSS1_PHY_712_DATA 0x00000000 |
| 3678 | #define DDRSS1_PHY_713_DATA 0x00000000 |
| 3679 | #define DDRSS1_PHY_714_DATA 0x00000000 |
| 3680 | #define DDRSS1_PHY_715_DATA 0x00000000 |
| 3681 | #define DDRSS1_PHY_716_DATA 0x00000000 |
| 3682 | #define DDRSS1_PHY_717_DATA 0x00000000 |
| 3683 | #define DDRSS1_PHY_718_DATA 0x00000000 |
| 3684 | #define DDRSS1_PHY_719_DATA 0x00000000 |
| 3685 | #define DDRSS1_PHY_720_DATA 0x00000000 |
| 3686 | #define DDRSS1_PHY_721_DATA 0x00000000 |
| 3687 | #define DDRSS1_PHY_722_DATA 0x00000000 |
| 3688 | #define DDRSS1_PHY_723_DATA 0x00000000 |
| 3689 | #define DDRSS1_PHY_724_DATA 0x00000000 |
| 3690 | #define DDRSS1_PHY_725_DATA 0x00000000 |
| 3691 | #define DDRSS1_PHY_726_DATA 0x00000000 |
| 3692 | #define DDRSS1_PHY_727_DATA 0x00000000 |
| 3693 | #define DDRSS1_PHY_728_DATA 0x00000000 |
| 3694 | #define DDRSS1_PHY_729_DATA 0x00000000 |
| 3695 | #define DDRSS1_PHY_730_DATA 0x00000000 |
| 3696 | #define DDRSS1_PHY_731_DATA 0x00000000 |
| 3697 | #define DDRSS1_PHY_732_DATA 0x00000000 |
| 3698 | #define DDRSS1_PHY_733_DATA 0x00000000 |
| 3699 | #define DDRSS1_PHY_734_DATA 0x00000000 |
| 3700 | #define DDRSS1_PHY_735_DATA 0x00000000 |
| 3701 | #define DDRSS1_PHY_736_DATA 0x00000000 |
| 3702 | #define DDRSS1_PHY_737_DATA 0x00000000 |
| 3703 | #define DDRSS1_PHY_738_DATA 0x00000000 |
| 3704 | #define DDRSS1_PHY_739_DATA 0x00000000 |
| 3705 | #define DDRSS1_PHY_740_DATA 0x00000000 |
| 3706 | #define DDRSS1_PHY_741_DATA 0x00000000 |
| 3707 | #define DDRSS1_PHY_742_DATA 0x00000000 |
| 3708 | #define DDRSS1_PHY_743_DATA 0x00000000 |
| 3709 | #define DDRSS1_PHY_744_DATA 0x00000000 |
| 3710 | #define DDRSS1_PHY_745_DATA 0x00000000 |
| 3711 | #define DDRSS1_PHY_746_DATA 0x00000000 |
| 3712 | #define DDRSS1_PHY_747_DATA 0x00000000 |
| 3713 | #define DDRSS1_PHY_748_DATA 0x00000000 |
| 3714 | #define DDRSS1_PHY_749_DATA 0x00000000 |
| 3715 | #define DDRSS1_PHY_750_DATA 0x00000000 |
| 3716 | #define DDRSS1_PHY_751_DATA 0x00000000 |
| 3717 | #define DDRSS1_PHY_752_DATA 0x00000000 |
| 3718 | #define DDRSS1_PHY_753_DATA 0x00000000 |
| 3719 | #define DDRSS1_PHY_754_DATA 0x00000000 |
| 3720 | #define DDRSS1_PHY_755_DATA 0x00000000 |
| 3721 | #define DDRSS1_PHY_756_DATA 0x00000000 |
| 3722 | #define DDRSS1_PHY_757_DATA 0x00000000 |
| 3723 | #define DDRSS1_PHY_758_DATA 0x00000000 |
| 3724 | #define DDRSS1_PHY_759_DATA 0x00000000 |
| 3725 | #define DDRSS1_PHY_760_DATA 0x00000000 |
| 3726 | #define DDRSS1_PHY_761_DATA 0x00000000 |
| 3727 | #define DDRSS1_PHY_762_DATA 0x00000000 |
| 3728 | #define DDRSS1_PHY_763_DATA 0x00000000 |
| 3729 | #define DDRSS1_PHY_764_DATA 0x00000000 |
| 3730 | #define DDRSS1_PHY_765_DATA 0x00000000 |
| 3731 | #define DDRSS1_PHY_766_DATA 0x00000000 |
| 3732 | #define DDRSS1_PHY_767_DATA 0x00000000 |
| 3733 | #define DDRSS1_PHY_768_DATA 0x000004F0 |
| 3734 | #define DDRSS1_PHY_769_DATA 0x00000000 |
| 3735 | #define DDRSS1_PHY_770_DATA 0x00030200 |
| 3736 | #define DDRSS1_PHY_771_DATA 0x00000000 |
| 3737 | #define DDRSS1_PHY_772_DATA 0x00000000 |
| 3738 | #define DDRSS1_PHY_773_DATA 0x01030000 |
| 3739 | #define DDRSS1_PHY_774_DATA 0x00010000 |
| 3740 | #define DDRSS1_PHY_775_DATA 0x01030004 |
| 3741 | #define DDRSS1_PHY_776_DATA 0x01000000 |
| 3742 | #define DDRSS1_PHY_777_DATA 0x00000000 |
| 3743 | #define DDRSS1_PHY_778_DATA 0x00000000 |
| 3744 | #define DDRSS1_PHY_779_DATA 0x01000001 |
| 3745 | #define DDRSS1_PHY_780_DATA 0x00000100 |
| 3746 | #define DDRSS1_PHY_781_DATA 0x000800C0 |
| 3747 | #define DDRSS1_PHY_782_DATA 0x060100CC |
| 3748 | #define DDRSS1_PHY_783_DATA 0x00030066 |
| 3749 | #define DDRSS1_PHY_784_DATA 0x00000000 |
| 3750 | #define DDRSS1_PHY_785_DATA 0x00000301 |
| 3751 | #define DDRSS1_PHY_786_DATA 0x0000AAAA |
| 3752 | #define DDRSS1_PHY_787_DATA 0x00005555 |
| 3753 | #define DDRSS1_PHY_788_DATA 0x0000B5B5 |
| 3754 | #define DDRSS1_PHY_789_DATA 0x00004A4A |
| 3755 | #define DDRSS1_PHY_790_DATA 0x00005656 |
| 3756 | #define DDRSS1_PHY_791_DATA 0x0000A9A9 |
| 3757 | #define DDRSS1_PHY_792_DATA 0x0000A9A9 |
| 3758 | #define DDRSS1_PHY_793_DATA 0x0000B5B5 |
| 3759 | #define DDRSS1_PHY_794_DATA 0x00000000 |
| 3760 | #define DDRSS1_PHY_795_DATA 0x00000000 |
| 3761 | #define DDRSS1_PHY_796_DATA 0x2A000000 |
| 3762 | #define DDRSS1_PHY_797_DATA 0x00000808 |
| 3763 | #define DDRSS1_PHY_798_DATA 0x0F000000 |
| 3764 | #define DDRSS1_PHY_799_DATA 0x00000F0F |
| 3765 | #define DDRSS1_PHY_800_DATA 0x10400000 |
| 3766 | #define DDRSS1_PHY_801_DATA 0x0C002006 |
| 3767 | #define DDRSS1_PHY_802_DATA 0x00000000 |
| 3768 | #define DDRSS1_PHY_803_DATA 0x00000000 |
| 3769 | #define DDRSS1_PHY_804_DATA 0x55555555 |
| 3770 | #define DDRSS1_PHY_805_DATA 0xAAAAAAAA |
| 3771 | #define DDRSS1_PHY_806_DATA 0x55555555 |
| 3772 | #define DDRSS1_PHY_807_DATA 0xAAAAAAAA |
| 3773 | #define DDRSS1_PHY_808_DATA 0x00005555 |
| 3774 | #define DDRSS1_PHY_809_DATA 0x01000100 |
| 3775 | #define DDRSS1_PHY_810_DATA 0x00800180 |
| 3776 | #define DDRSS1_PHY_811_DATA 0x00000000 |
| 3777 | #define DDRSS1_PHY_812_DATA 0x00000000 |
| 3778 | #define DDRSS1_PHY_813_DATA 0x00000000 |
| 3779 | #define DDRSS1_PHY_814_DATA 0x00000000 |
| 3780 | #define DDRSS1_PHY_815_DATA 0x00000000 |
| 3781 | #define DDRSS1_PHY_816_DATA 0x00000000 |
| 3782 | #define DDRSS1_PHY_817_DATA 0x00000000 |
| 3783 | #define DDRSS1_PHY_818_DATA 0x00000000 |
| 3784 | #define DDRSS1_PHY_819_DATA 0x00000000 |
| 3785 | #define DDRSS1_PHY_820_DATA 0x00000000 |
| 3786 | #define DDRSS1_PHY_821_DATA 0x00000000 |
| 3787 | #define DDRSS1_PHY_822_DATA 0x00000000 |
| 3788 | #define DDRSS1_PHY_823_DATA 0x00000000 |
| 3789 | #define DDRSS1_PHY_824_DATA 0x00000000 |
| 3790 | #define DDRSS1_PHY_825_DATA 0x00000000 |
| 3791 | #define DDRSS1_PHY_826_DATA 0x00000000 |
| 3792 | #define DDRSS1_PHY_827_DATA 0x00000000 |
| 3793 | #define DDRSS1_PHY_828_DATA 0x00000000 |
| 3794 | #define DDRSS1_PHY_829_DATA 0x00000000 |
| 3795 | #define DDRSS1_PHY_830_DATA 0x00000000 |
| 3796 | #define DDRSS1_PHY_831_DATA 0x00000000 |
| 3797 | #define DDRSS1_PHY_832_DATA 0x00000000 |
| 3798 | #define DDRSS1_PHY_833_DATA 0x00000000 |
| 3799 | #define DDRSS1_PHY_834_DATA 0x00000104 |
| 3800 | #define DDRSS1_PHY_835_DATA 0x00000120 |
| 3801 | #define DDRSS1_PHY_836_DATA 0x00000000 |
| 3802 | #define DDRSS1_PHY_837_DATA 0x00000000 |
| 3803 | #define DDRSS1_PHY_838_DATA 0x00000000 |
| 3804 | #define DDRSS1_PHY_839_DATA 0x00000000 |
| 3805 | #define DDRSS1_PHY_840_DATA 0x00000000 |
| 3806 | #define DDRSS1_PHY_841_DATA 0x00000000 |
| 3807 | #define DDRSS1_PHY_842_DATA 0x00000000 |
| 3808 | #define DDRSS1_PHY_843_DATA 0x00000001 |
| 3809 | #define DDRSS1_PHY_844_DATA 0x07FF0000 |
| 3810 | #define DDRSS1_PHY_845_DATA 0x0080081F |
| 3811 | #define DDRSS1_PHY_846_DATA 0x00081020 |
| 3812 | #define DDRSS1_PHY_847_DATA 0x04010000 |
| 3813 | #define DDRSS1_PHY_848_DATA 0x00000000 |
| 3814 | #define DDRSS1_PHY_849_DATA 0x00000000 |
| 3815 | #define DDRSS1_PHY_850_DATA 0x00000000 |
| 3816 | #define DDRSS1_PHY_851_DATA 0x00000100 |
| 3817 | #define DDRSS1_PHY_852_DATA 0x01CC0C01 |
| 3818 | #define DDRSS1_PHY_853_DATA 0x1003CC0C |
| 3819 | #define DDRSS1_PHY_854_DATA 0x20000140 |
| 3820 | #define DDRSS1_PHY_855_DATA 0x07FF0200 |
| 3821 | #define DDRSS1_PHY_856_DATA 0x0000DD01 |
| 3822 | #define DDRSS1_PHY_857_DATA 0x10100303 |
| 3823 | #define DDRSS1_PHY_858_DATA 0x10101010 |
| 3824 | #define DDRSS1_PHY_859_DATA 0x10101010 |
| 3825 | #define DDRSS1_PHY_860_DATA 0x00021010 |
| 3826 | #define DDRSS1_PHY_861_DATA 0x00100010 |
| 3827 | #define DDRSS1_PHY_862_DATA 0x00100010 |
| 3828 | #define DDRSS1_PHY_863_DATA 0x00100010 |
| 3829 | #define DDRSS1_PHY_864_DATA 0x00100010 |
| 3830 | #define DDRSS1_PHY_865_DATA 0x00050010 |
| 3831 | #define DDRSS1_PHY_866_DATA 0x51517041 |
| 3832 | #define DDRSS1_PHY_867_DATA 0x31C06001 |
| 3833 | #define DDRSS1_PHY_868_DATA 0x07AB0340 |
| 3834 | #define DDRSS1_PHY_869_DATA 0x00C0C001 |
| 3835 | #define DDRSS1_PHY_870_DATA 0x0E0D0001 |
| 3836 | #define DDRSS1_PHY_871_DATA 0x10001000 |
| 3837 | #define DDRSS1_PHY_872_DATA 0x0C083E42 |
| 3838 | #define DDRSS1_PHY_873_DATA 0x0F0C3701 |
| 3839 | #define DDRSS1_PHY_874_DATA 0x01000140 |
| 3840 | #define DDRSS1_PHY_875_DATA 0x0C000420 |
| 3841 | #define DDRSS1_PHY_876_DATA 0x00000198 |
| 3842 | #define DDRSS1_PHY_877_DATA 0x0A0000D0 |
| 3843 | #define DDRSS1_PHY_878_DATA 0x00030200 |
| 3844 | #define DDRSS1_PHY_879_DATA 0x02800000 |
| 3845 | #define DDRSS1_PHY_880_DATA 0x80800000 |
| 3846 | #define DDRSS1_PHY_881_DATA 0x000E2010 |
| 3847 | #define DDRSS1_PHY_882_DATA 0x76543210 |
| 3848 | #define DDRSS1_PHY_883_DATA 0x00000008 |
| 3849 | #define DDRSS1_PHY_884_DATA 0x02800280 |
| 3850 | #define DDRSS1_PHY_885_DATA 0x02800280 |
| 3851 | #define DDRSS1_PHY_886_DATA 0x02800280 |
| 3852 | #define DDRSS1_PHY_887_DATA 0x02800280 |
| 3853 | #define DDRSS1_PHY_888_DATA 0x00000280 |
| 3854 | #define DDRSS1_PHY_889_DATA 0x0000A000 |
| 3855 | #define DDRSS1_PHY_890_DATA 0x00A000A0 |
| 3856 | #define DDRSS1_PHY_891_DATA 0x00A000A0 |
| 3857 | #define DDRSS1_PHY_892_DATA 0x00A000A0 |
| 3858 | #define DDRSS1_PHY_893_DATA 0x00A000A0 |
| 3859 | #define DDRSS1_PHY_894_DATA 0x00A000A0 |
| 3860 | #define DDRSS1_PHY_895_DATA 0x00A000A0 |
| 3861 | #define DDRSS1_PHY_896_DATA 0x00A000A0 |
| 3862 | #define DDRSS1_PHY_897_DATA 0x00A000A0 |
| 3863 | #define DDRSS1_PHY_898_DATA 0x01C200A0 |
| 3864 | #define DDRSS1_PHY_899_DATA 0x01A00005 |
| 3865 | #define DDRSS1_PHY_900_DATA 0x00000000 |
| 3866 | #define DDRSS1_PHY_901_DATA 0x00000000 |
| 3867 | #define DDRSS1_PHY_902_DATA 0x00080200 |
| 3868 | #define DDRSS1_PHY_903_DATA 0x00000000 |
| 3869 | #define DDRSS1_PHY_904_DATA 0x20202000 |
| 3870 | #define DDRSS1_PHY_905_DATA 0x20202020 |
| 3871 | #define DDRSS1_PHY_906_DATA 0xF0F02020 |
| 3872 | #define DDRSS1_PHY_907_DATA 0x00000000 |
| 3873 | #define DDRSS1_PHY_908_DATA 0x00000000 |
| 3874 | #define DDRSS1_PHY_909_DATA 0x00000000 |
| 3875 | #define DDRSS1_PHY_910_DATA 0x00000000 |
| 3876 | #define DDRSS1_PHY_911_DATA 0x00000000 |
| 3877 | #define DDRSS1_PHY_912_DATA 0x00000000 |
| 3878 | #define DDRSS1_PHY_913_DATA 0x00000000 |
| 3879 | #define DDRSS1_PHY_914_DATA 0x00000000 |
| 3880 | #define DDRSS1_PHY_915_DATA 0x00000000 |
| 3881 | #define DDRSS1_PHY_916_DATA 0x00000000 |
| 3882 | #define DDRSS1_PHY_917_DATA 0x00000000 |
| 3883 | #define DDRSS1_PHY_918_DATA 0x00000000 |
| 3884 | #define DDRSS1_PHY_919_DATA 0x00000000 |
| 3885 | #define DDRSS1_PHY_920_DATA 0x00000000 |
| 3886 | #define DDRSS1_PHY_921_DATA 0x00000000 |
| 3887 | #define DDRSS1_PHY_922_DATA 0x00000000 |
| 3888 | #define DDRSS1_PHY_923_DATA 0x00000000 |
| 3889 | #define DDRSS1_PHY_924_DATA 0x00000000 |
| 3890 | #define DDRSS1_PHY_925_DATA 0x00000000 |
| 3891 | #define DDRSS1_PHY_926_DATA 0x00000000 |
| 3892 | #define DDRSS1_PHY_927_DATA 0x00000000 |
| 3893 | #define DDRSS1_PHY_928_DATA 0x00000000 |
| 3894 | #define DDRSS1_PHY_929_DATA 0x00000000 |
| 3895 | #define DDRSS1_PHY_930_DATA 0x00000000 |
| 3896 | #define DDRSS1_PHY_931_DATA 0x00000000 |
| 3897 | #define DDRSS1_PHY_932_DATA 0x00000000 |
| 3898 | #define DDRSS1_PHY_933_DATA 0x00000000 |
| 3899 | #define DDRSS1_PHY_934_DATA 0x00000000 |
| 3900 | #define DDRSS1_PHY_935_DATA 0x00000000 |
| 3901 | #define DDRSS1_PHY_936_DATA 0x00000000 |
| 3902 | #define DDRSS1_PHY_937_DATA 0x00000000 |
| 3903 | #define DDRSS1_PHY_938_DATA 0x00000000 |
| 3904 | #define DDRSS1_PHY_939_DATA 0x00000000 |
| 3905 | #define DDRSS1_PHY_940_DATA 0x00000000 |
| 3906 | #define DDRSS1_PHY_941_DATA 0x00000000 |
| 3907 | #define DDRSS1_PHY_942_DATA 0x00000000 |
| 3908 | #define DDRSS1_PHY_943_DATA 0x00000000 |
| 3909 | #define DDRSS1_PHY_944_DATA 0x00000000 |
| 3910 | #define DDRSS1_PHY_945_DATA 0x00000000 |
| 3911 | #define DDRSS1_PHY_946_DATA 0x00000000 |
| 3912 | #define DDRSS1_PHY_947_DATA 0x00000000 |
| 3913 | #define DDRSS1_PHY_948_DATA 0x00000000 |
| 3914 | #define DDRSS1_PHY_949_DATA 0x00000000 |
| 3915 | #define DDRSS1_PHY_950_DATA 0x00000000 |
| 3916 | #define DDRSS1_PHY_951_DATA 0x00000000 |
| 3917 | #define DDRSS1_PHY_952_DATA 0x00000000 |
| 3918 | #define DDRSS1_PHY_953_DATA 0x00000000 |
| 3919 | #define DDRSS1_PHY_954_DATA 0x00000000 |
| 3920 | #define DDRSS1_PHY_955_DATA 0x00000000 |
| 3921 | #define DDRSS1_PHY_956_DATA 0x00000000 |
| 3922 | #define DDRSS1_PHY_957_DATA 0x00000000 |
| 3923 | #define DDRSS1_PHY_958_DATA 0x00000000 |
| 3924 | #define DDRSS1_PHY_959_DATA 0x00000000 |
| 3925 | #define DDRSS1_PHY_960_DATA 0x00000000 |
| 3926 | #define DDRSS1_PHY_961_DATA 0x00000000 |
| 3927 | #define DDRSS1_PHY_962_DATA 0x00000000 |
| 3928 | #define DDRSS1_PHY_963_DATA 0x00000000 |
| 3929 | #define DDRSS1_PHY_964_DATA 0x00000000 |
| 3930 | #define DDRSS1_PHY_965_DATA 0x00000000 |
| 3931 | #define DDRSS1_PHY_966_DATA 0x00000000 |
| 3932 | #define DDRSS1_PHY_967_DATA 0x00000000 |
| 3933 | #define DDRSS1_PHY_968_DATA 0x00000000 |
| 3934 | #define DDRSS1_PHY_969_DATA 0x00000000 |
| 3935 | #define DDRSS1_PHY_970_DATA 0x00000000 |
| 3936 | #define DDRSS1_PHY_971_DATA 0x00000000 |
| 3937 | #define DDRSS1_PHY_972_DATA 0x00000000 |
| 3938 | #define DDRSS1_PHY_973_DATA 0x00000000 |
| 3939 | #define DDRSS1_PHY_974_DATA 0x00000000 |
| 3940 | #define DDRSS1_PHY_975_DATA 0x00000000 |
| 3941 | #define DDRSS1_PHY_976_DATA 0x00000000 |
| 3942 | #define DDRSS1_PHY_977_DATA 0x00000000 |
| 3943 | #define DDRSS1_PHY_978_DATA 0x00000000 |
| 3944 | #define DDRSS1_PHY_979_DATA 0x00000000 |
| 3945 | #define DDRSS1_PHY_980_DATA 0x00000000 |
| 3946 | #define DDRSS1_PHY_981_DATA 0x00000000 |
| 3947 | #define DDRSS1_PHY_982_DATA 0x00000000 |
| 3948 | #define DDRSS1_PHY_983_DATA 0x00000000 |
| 3949 | #define DDRSS1_PHY_984_DATA 0x00000000 |
| 3950 | #define DDRSS1_PHY_985_DATA 0x00000000 |
| 3951 | #define DDRSS1_PHY_986_DATA 0x00000000 |
| 3952 | #define DDRSS1_PHY_987_DATA 0x00000000 |
| 3953 | #define DDRSS1_PHY_988_DATA 0x00000000 |
| 3954 | #define DDRSS1_PHY_989_DATA 0x00000000 |
| 3955 | #define DDRSS1_PHY_990_DATA 0x00000000 |
| 3956 | #define DDRSS1_PHY_991_DATA 0x00000000 |
| 3957 | #define DDRSS1_PHY_992_DATA 0x00000000 |
| 3958 | #define DDRSS1_PHY_993_DATA 0x00000000 |
| 3959 | #define DDRSS1_PHY_994_DATA 0x00000000 |
| 3960 | #define DDRSS1_PHY_995_DATA 0x00000000 |
| 3961 | #define DDRSS1_PHY_996_DATA 0x00000000 |
| 3962 | #define DDRSS1_PHY_997_DATA 0x00000000 |
| 3963 | #define DDRSS1_PHY_998_DATA 0x00000000 |
| 3964 | #define DDRSS1_PHY_999_DATA 0x00000000 |
| 3965 | #define DDRSS1_PHY_1000_DATA 0x00000000 |
| 3966 | #define DDRSS1_PHY_1001_DATA 0x00000000 |
| 3967 | #define DDRSS1_PHY_1002_DATA 0x00000000 |
| 3968 | #define DDRSS1_PHY_1003_DATA 0x00000000 |
| 3969 | #define DDRSS1_PHY_1004_DATA 0x00000000 |
| 3970 | #define DDRSS1_PHY_1005_DATA 0x00000000 |
| 3971 | #define DDRSS1_PHY_1006_DATA 0x00000000 |
| 3972 | #define DDRSS1_PHY_1007_DATA 0x00000000 |
| 3973 | #define DDRSS1_PHY_1008_DATA 0x00000000 |
| 3974 | #define DDRSS1_PHY_1009_DATA 0x00000000 |
| 3975 | #define DDRSS1_PHY_1010_DATA 0x00000000 |
| 3976 | #define DDRSS1_PHY_1011_DATA 0x00000000 |
| 3977 | #define DDRSS1_PHY_1012_DATA 0x00000000 |
| 3978 | #define DDRSS1_PHY_1013_DATA 0x00000000 |
| 3979 | #define DDRSS1_PHY_1014_DATA 0x00000000 |
| 3980 | #define DDRSS1_PHY_1015_DATA 0x00000000 |
| 3981 | #define DDRSS1_PHY_1016_DATA 0x00000000 |
| 3982 | #define DDRSS1_PHY_1017_DATA 0x00000000 |
| 3983 | #define DDRSS1_PHY_1018_DATA 0x00000000 |
| 3984 | #define DDRSS1_PHY_1019_DATA 0x00000000 |
| 3985 | #define DDRSS1_PHY_1020_DATA 0x00000000 |
| 3986 | #define DDRSS1_PHY_1021_DATA 0x00000000 |
| 3987 | #define DDRSS1_PHY_1022_DATA 0x00000000 |
| 3988 | #define DDRSS1_PHY_1023_DATA 0x00000000 |
| 3989 | #define DDRSS1_PHY_1024_DATA 0x00000000 |
| 3990 | #define DDRSS1_PHY_1025_DATA 0x00000000 |
| 3991 | #define DDRSS1_PHY_1026_DATA 0x00000000 |
| 3992 | #define DDRSS1_PHY_1027_DATA 0x00000000 |
| 3993 | #define DDRSS1_PHY_1028_DATA 0x00000000 |
| 3994 | #define DDRSS1_PHY_1029_DATA 0x00000100 |
| 3995 | #define DDRSS1_PHY_1030_DATA 0x00000200 |
| 3996 | #define DDRSS1_PHY_1031_DATA 0x00000000 |
| 3997 | #define DDRSS1_PHY_1032_DATA 0x00000000 |
| 3998 | #define DDRSS1_PHY_1033_DATA 0x00000000 |
| 3999 | #define DDRSS1_PHY_1034_DATA 0x00000000 |
| 4000 | #define DDRSS1_PHY_1035_DATA 0x00400000 |
| 4001 | #define DDRSS1_PHY_1036_DATA 0x00000080 |
| 4002 | #define DDRSS1_PHY_1037_DATA 0x00DCBA98 |
| 4003 | #define DDRSS1_PHY_1038_DATA 0x03000000 |
| 4004 | #define DDRSS1_PHY_1039_DATA 0x00200000 |
| 4005 | #define DDRSS1_PHY_1040_DATA 0x00000000 |
| 4006 | #define DDRSS1_PHY_1041_DATA 0x00000000 |
| 4007 | #define DDRSS1_PHY_1042_DATA 0x00000000 |
| 4008 | #define DDRSS1_PHY_1043_DATA 0x00000000 |
| 4009 | #define DDRSS1_PHY_1044_DATA 0x00000000 |
| 4010 | #define DDRSS1_PHY_1045_DATA 0x0000002A |
| 4011 | #define DDRSS1_PHY_1046_DATA 0x00000015 |
| 4012 | #define DDRSS1_PHY_1047_DATA 0x00000015 |
| 4013 | #define DDRSS1_PHY_1048_DATA 0x0000002A |
| 4014 | #define DDRSS1_PHY_1049_DATA 0x00000033 |
| 4015 | #define DDRSS1_PHY_1050_DATA 0x0000000C |
| 4016 | #define DDRSS1_PHY_1051_DATA 0x0000000C |
| 4017 | #define DDRSS1_PHY_1052_DATA 0x00000033 |
| 4018 | #define DDRSS1_PHY_1053_DATA 0x00543210 |
| 4019 | #define DDRSS1_PHY_1054_DATA 0x003F0000 |
| 4020 | #define DDRSS1_PHY_1055_DATA 0x000F013F |
| 4021 | #define DDRSS1_PHY_1056_DATA 0x20202003 |
| 4022 | #define DDRSS1_PHY_1057_DATA 0x00202020 |
| 4023 | #define DDRSS1_PHY_1058_DATA 0x20008008 |
| 4024 | #define DDRSS1_PHY_1059_DATA 0x00000810 |
| 4025 | #define DDRSS1_PHY_1060_DATA 0x00000F00 |
| 4026 | #define DDRSS1_PHY_1061_DATA 0x00000000 |
| 4027 | #define DDRSS1_PHY_1062_DATA 0x00000000 |
| 4028 | #define DDRSS1_PHY_1063_DATA 0x00000000 |
| 4029 | #define DDRSS1_PHY_1064_DATA 0x000305CC |
| 4030 | #define DDRSS1_PHY_1065_DATA 0x00030000 |
| 4031 | #define DDRSS1_PHY_1066_DATA 0x00000300 |
| 4032 | #define DDRSS1_PHY_1067_DATA 0x00000300 |
| 4033 | #define DDRSS1_PHY_1068_DATA 0x00000300 |
| 4034 | #define DDRSS1_PHY_1069_DATA 0x00000300 |
| 4035 | #define DDRSS1_PHY_1070_DATA 0x00000300 |
| 4036 | #define DDRSS1_PHY_1071_DATA 0x42080010 |
| 4037 | #define DDRSS1_PHY_1072_DATA 0x0000803E |
| 4038 | #define DDRSS1_PHY_1073_DATA 0x00000001 |
| 4039 | #define DDRSS1_PHY_1074_DATA 0x01000102 |
| 4040 | #define DDRSS1_PHY_1075_DATA 0x00008000 |
| 4041 | #define DDRSS1_PHY_1076_DATA 0x00000000 |
| 4042 | #define DDRSS1_PHY_1077_DATA 0x00000000 |
| 4043 | #define DDRSS1_PHY_1078_DATA 0x00000000 |
| 4044 | #define DDRSS1_PHY_1079_DATA 0x00000000 |
| 4045 | #define DDRSS1_PHY_1080_DATA 0x00000000 |
| 4046 | #define DDRSS1_PHY_1081_DATA 0x00000000 |
| 4047 | #define DDRSS1_PHY_1082_DATA 0x00000000 |
| 4048 | #define DDRSS1_PHY_1083_DATA 0x00000000 |
| 4049 | #define DDRSS1_PHY_1084_DATA 0x00000000 |
| 4050 | #define DDRSS1_PHY_1085_DATA 0x00000000 |
| 4051 | #define DDRSS1_PHY_1086_DATA 0x00000000 |
| 4052 | #define DDRSS1_PHY_1087_DATA 0x00000000 |
| 4053 | #define DDRSS1_PHY_1088_DATA 0x00000000 |
| 4054 | #define DDRSS1_PHY_1089_DATA 0x00000000 |
| 4055 | #define DDRSS1_PHY_1090_DATA 0x00000000 |
| 4056 | #define DDRSS1_PHY_1091_DATA 0x00000000 |
| 4057 | #define DDRSS1_PHY_1092_DATA 0x00000000 |
| 4058 | #define DDRSS1_PHY_1093_DATA 0x00000000 |
| 4059 | #define DDRSS1_PHY_1094_DATA 0x00000000 |
| 4060 | #define DDRSS1_PHY_1095_DATA 0x00000000 |
| 4061 | #define DDRSS1_PHY_1096_DATA 0x00000000 |
| 4062 | #define DDRSS1_PHY_1097_DATA 0x00000000 |
| 4063 | #define DDRSS1_PHY_1098_DATA 0x00000000 |
| 4064 | #define DDRSS1_PHY_1099_DATA 0x00000000 |
| 4065 | #define DDRSS1_PHY_1100_DATA 0x00000000 |
| 4066 | #define DDRSS1_PHY_1101_DATA 0x00000000 |
| 4067 | #define DDRSS1_PHY_1102_DATA 0x00000000 |
| 4068 | #define DDRSS1_PHY_1103_DATA 0x00000000 |
| 4069 | #define DDRSS1_PHY_1104_DATA 0x00000000 |
| 4070 | #define DDRSS1_PHY_1105_DATA 0x00000000 |
| 4071 | #define DDRSS1_PHY_1106_DATA 0x00000000 |
| 4072 | #define DDRSS1_PHY_1107_DATA 0x00000000 |
| 4073 | #define DDRSS1_PHY_1108_DATA 0x00000000 |
| 4074 | #define DDRSS1_PHY_1109_DATA 0x00000000 |
| 4075 | #define DDRSS1_PHY_1110_DATA 0x00000000 |
| 4076 | #define DDRSS1_PHY_1111_DATA 0x00000000 |
| 4077 | #define DDRSS1_PHY_1112_DATA 0x00000000 |
| 4078 | #define DDRSS1_PHY_1113_DATA 0x00000000 |
| 4079 | #define DDRSS1_PHY_1114_DATA 0x00000000 |
| 4080 | #define DDRSS1_PHY_1115_DATA 0x00000000 |
| 4081 | #define DDRSS1_PHY_1116_DATA 0x00000000 |
| 4082 | #define DDRSS1_PHY_1117_DATA 0x00000000 |
| 4083 | #define DDRSS1_PHY_1118_DATA 0x00000000 |
| 4084 | #define DDRSS1_PHY_1119_DATA 0x00000000 |
| 4085 | #define DDRSS1_PHY_1120_DATA 0x00000000 |
| 4086 | #define DDRSS1_PHY_1121_DATA 0x00000000 |
| 4087 | #define DDRSS1_PHY_1122_DATA 0x00000000 |
| 4088 | #define DDRSS1_PHY_1123_DATA 0x00000000 |
| 4089 | #define DDRSS1_PHY_1124_DATA 0x00000000 |
| 4090 | #define DDRSS1_PHY_1125_DATA 0x00000000 |
| 4091 | #define DDRSS1_PHY_1126_DATA 0x00000000 |
| 4092 | #define DDRSS1_PHY_1127_DATA 0x00000000 |
| 4093 | #define DDRSS1_PHY_1128_DATA 0x00000000 |
| 4094 | #define DDRSS1_PHY_1129_DATA 0x00000000 |
| 4095 | #define DDRSS1_PHY_1130_DATA 0x00000000 |
| 4096 | #define DDRSS1_PHY_1131_DATA 0x00000000 |
| 4097 | #define DDRSS1_PHY_1132_DATA 0x00000000 |
| 4098 | #define DDRSS1_PHY_1133_DATA 0x00000000 |
| 4099 | #define DDRSS1_PHY_1134_DATA 0x00000000 |
| 4100 | #define DDRSS1_PHY_1135_DATA 0x00000000 |
| 4101 | #define DDRSS1_PHY_1136_DATA 0x00000000 |
| 4102 | #define DDRSS1_PHY_1137_DATA 0x00000000 |
| 4103 | #define DDRSS1_PHY_1138_DATA 0x00000000 |
| 4104 | #define DDRSS1_PHY_1139_DATA 0x00000000 |
| 4105 | #define DDRSS1_PHY_1140_DATA 0x00000000 |
| 4106 | #define DDRSS1_PHY_1141_DATA 0x00000000 |
| 4107 | #define DDRSS1_PHY_1142_DATA 0x00000000 |
| 4108 | #define DDRSS1_PHY_1143_DATA 0x00000000 |
| 4109 | #define DDRSS1_PHY_1144_DATA 0x00000000 |
| 4110 | #define DDRSS1_PHY_1145_DATA 0x00000000 |
| 4111 | #define DDRSS1_PHY_1146_DATA 0x00000000 |
| 4112 | #define DDRSS1_PHY_1147_DATA 0x00000000 |
| 4113 | #define DDRSS1_PHY_1148_DATA 0x00000000 |
| 4114 | #define DDRSS1_PHY_1149_DATA 0x00000000 |
| 4115 | #define DDRSS1_PHY_1150_DATA 0x00000000 |
| 4116 | #define DDRSS1_PHY_1151_DATA 0x00000000 |
| 4117 | #define DDRSS1_PHY_1152_DATA 0x00000000 |
| 4118 | #define DDRSS1_PHY_1153_DATA 0x00000000 |
| 4119 | #define DDRSS1_PHY_1154_DATA 0x00000000 |
| 4120 | #define DDRSS1_PHY_1155_DATA 0x00000000 |
| 4121 | #define DDRSS1_PHY_1156_DATA 0x00000000 |
| 4122 | #define DDRSS1_PHY_1157_DATA 0x00000000 |
| 4123 | #define DDRSS1_PHY_1158_DATA 0x00000000 |
| 4124 | #define DDRSS1_PHY_1159_DATA 0x00000000 |
| 4125 | #define DDRSS1_PHY_1160_DATA 0x00000000 |
| 4126 | #define DDRSS1_PHY_1161_DATA 0x00000000 |
| 4127 | #define DDRSS1_PHY_1162_DATA 0x00000000 |
| 4128 | #define DDRSS1_PHY_1163_DATA 0x00000000 |
| 4129 | #define DDRSS1_PHY_1164_DATA 0x00000000 |
| 4130 | #define DDRSS1_PHY_1165_DATA 0x00000000 |
| 4131 | #define DDRSS1_PHY_1166_DATA 0x00000000 |
| 4132 | #define DDRSS1_PHY_1167_DATA 0x00000000 |
| 4133 | #define DDRSS1_PHY_1168_DATA 0x00000000 |
| 4134 | #define DDRSS1_PHY_1169_DATA 0x00000000 |
| 4135 | #define DDRSS1_PHY_1170_DATA 0x00000000 |
| 4136 | #define DDRSS1_PHY_1171_DATA 0x00000000 |
| 4137 | #define DDRSS1_PHY_1172_DATA 0x00000000 |
| 4138 | #define DDRSS1_PHY_1173_DATA 0x00000000 |
| 4139 | #define DDRSS1_PHY_1174_DATA 0x00000000 |
| 4140 | #define DDRSS1_PHY_1175_DATA 0x00000000 |
| 4141 | #define DDRSS1_PHY_1176_DATA 0x00000000 |
| 4142 | #define DDRSS1_PHY_1177_DATA 0x00000000 |
| 4143 | #define DDRSS1_PHY_1178_DATA 0x00000000 |
| 4144 | #define DDRSS1_PHY_1179_DATA 0x00000000 |
| 4145 | #define DDRSS1_PHY_1180_DATA 0x00000000 |
| 4146 | #define DDRSS1_PHY_1181_DATA 0x00000000 |
| 4147 | #define DDRSS1_PHY_1182_DATA 0x00000000 |
| 4148 | #define DDRSS1_PHY_1183_DATA 0x00000000 |
| 4149 | #define DDRSS1_PHY_1184_DATA 0x00000000 |
| 4150 | #define DDRSS1_PHY_1185_DATA 0x00000000 |
| 4151 | #define DDRSS1_PHY_1186_DATA 0x00000000 |
| 4152 | #define DDRSS1_PHY_1187_DATA 0x00000000 |
| 4153 | #define DDRSS1_PHY_1188_DATA 0x00000000 |
| 4154 | #define DDRSS1_PHY_1189_DATA 0x00000000 |
| 4155 | #define DDRSS1_PHY_1190_DATA 0x00000000 |
| 4156 | #define DDRSS1_PHY_1191_DATA 0x00000000 |
| 4157 | #define DDRSS1_PHY_1192_DATA 0x00000000 |
| 4158 | #define DDRSS1_PHY_1193_DATA 0x00000000 |
| 4159 | #define DDRSS1_PHY_1194_DATA 0x00000000 |
| 4160 | #define DDRSS1_PHY_1195_DATA 0x00000000 |
| 4161 | #define DDRSS1_PHY_1196_DATA 0x00000000 |
| 4162 | #define DDRSS1_PHY_1197_DATA 0x00000000 |
| 4163 | #define DDRSS1_PHY_1198_DATA 0x00000000 |
| 4164 | #define DDRSS1_PHY_1199_DATA 0x00000000 |
| 4165 | #define DDRSS1_PHY_1200_DATA 0x00000000 |
| 4166 | #define DDRSS1_PHY_1201_DATA 0x00000000 |
| 4167 | #define DDRSS1_PHY_1202_DATA 0x00000000 |
| 4168 | #define DDRSS1_PHY_1203_DATA 0x00000000 |
| 4169 | #define DDRSS1_PHY_1204_DATA 0x00000000 |
| 4170 | #define DDRSS1_PHY_1205_DATA 0x00000000 |
| 4171 | #define DDRSS1_PHY_1206_DATA 0x00000000 |
| 4172 | #define DDRSS1_PHY_1207_DATA 0x00000000 |
| 4173 | #define DDRSS1_PHY_1208_DATA 0x00000000 |
| 4174 | #define DDRSS1_PHY_1209_DATA 0x00000000 |
| 4175 | #define DDRSS1_PHY_1210_DATA 0x00000000 |
| 4176 | #define DDRSS1_PHY_1211_DATA 0x00000000 |
| 4177 | #define DDRSS1_PHY_1212_DATA 0x00000000 |
| 4178 | #define DDRSS1_PHY_1213_DATA 0x00000000 |
| 4179 | #define DDRSS1_PHY_1214_DATA 0x00000000 |
| 4180 | #define DDRSS1_PHY_1215_DATA 0x00000000 |
| 4181 | #define DDRSS1_PHY_1216_DATA 0x00000000 |
| 4182 | #define DDRSS1_PHY_1217_DATA 0x00000000 |
| 4183 | #define DDRSS1_PHY_1218_DATA 0x00000000 |
| 4184 | #define DDRSS1_PHY_1219_DATA 0x00000000 |
| 4185 | #define DDRSS1_PHY_1220_DATA 0x00000000 |
| 4186 | #define DDRSS1_PHY_1221_DATA 0x00000000 |
| 4187 | #define DDRSS1_PHY_1222_DATA 0x00000000 |
| 4188 | #define DDRSS1_PHY_1223_DATA 0x00000000 |
| 4189 | #define DDRSS1_PHY_1224_DATA 0x00000000 |
| 4190 | #define DDRSS1_PHY_1225_DATA 0x00000000 |
| 4191 | #define DDRSS1_PHY_1226_DATA 0x00000000 |
| 4192 | #define DDRSS1_PHY_1227_DATA 0x00000000 |
| 4193 | #define DDRSS1_PHY_1228_DATA 0x00000000 |
| 4194 | #define DDRSS1_PHY_1229_DATA 0x00000000 |
| 4195 | #define DDRSS1_PHY_1230_DATA 0x00000000 |
| 4196 | #define DDRSS1_PHY_1231_DATA 0x00000000 |
| 4197 | #define DDRSS1_PHY_1232_DATA 0x00000000 |
| 4198 | #define DDRSS1_PHY_1233_DATA 0x00000000 |
| 4199 | #define DDRSS1_PHY_1234_DATA 0x00000000 |
| 4200 | #define DDRSS1_PHY_1235_DATA 0x00000000 |
| 4201 | #define DDRSS1_PHY_1236_DATA 0x00000000 |
| 4202 | #define DDRSS1_PHY_1237_DATA 0x00000000 |
| 4203 | #define DDRSS1_PHY_1238_DATA 0x00000000 |
| 4204 | #define DDRSS1_PHY_1239_DATA 0x00000000 |
| 4205 | #define DDRSS1_PHY_1240_DATA 0x00000000 |
| 4206 | #define DDRSS1_PHY_1241_DATA 0x00000000 |
| 4207 | #define DDRSS1_PHY_1242_DATA 0x00000000 |
| 4208 | #define DDRSS1_PHY_1243_DATA 0x00000000 |
| 4209 | #define DDRSS1_PHY_1244_DATA 0x00000000 |
| 4210 | #define DDRSS1_PHY_1245_DATA 0x00000000 |
| 4211 | #define DDRSS1_PHY_1246_DATA 0x00000000 |
| 4212 | #define DDRSS1_PHY_1247_DATA 0x00000000 |
| 4213 | #define DDRSS1_PHY_1248_DATA 0x00000000 |
| 4214 | #define DDRSS1_PHY_1249_DATA 0x00000000 |
| 4215 | #define DDRSS1_PHY_1250_DATA 0x00000000 |
| 4216 | #define DDRSS1_PHY_1251_DATA 0x00000000 |
| 4217 | #define DDRSS1_PHY_1252_DATA 0x00000000 |
| 4218 | #define DDRSS1_PHY_1253_DATA 0x00000000 |
| 4219 | #define DDRSS1_PHY_1254_DATA 0x00000000 |
| 4220 | #define DDRSS1_PHY_1255_DATA 0x00000000 |
| 4221 | #define DDRSS1_PHY_1256_DATA 0x00000000 |
| 4222 | #define DDRSS1_PHY_1257_DATA 0x00000000 |
| 4223 | #define DDRSS1_PHY_1258_DATA 0x00000000 |
| 4224 | #define DDRSS1_PHY_1259_DATA 0x00000000 |
| 4225 | #define DDRSS1_PHY_1260_DATA 0x00000000 |
| 4226 | #define DDRSS1_PHY_1261_DATA 0x00000000 |
| 4227 | #define DDRSS1_PHY_1262_DATA 0x00000000 |
| 4228 | #define DDRSS1_PHY_1263_DATA 0x00000000 |
| 4229 | #define DDRSS1_PHY_1264_DATA 0x00000000 |
| 4230 | #define DDRSS1_PHY_1265_DATA 0x00000000 |
| 4231 | #define DDRSS1_PHY_1266_DATA 0x00000000 |
| 4232 | #define DDRSS1_PHY_1267_DATA 0x00000000 |
| 4233 | #define DDRSS1_PHY_1268_DATA 0x00000000 |
| 4234 | #define DDRSS1_PHY_1269_DATA 0x00000000 |
| 4235 | #define DDRSS1_PHY_1270_DATA 0x00000000 |
| 4236 | #define DDRSS1_PHY_1271_DATA 0x00000000 |
| 4237 | #define DDRSS1_PHY_1272_DATA 0x00000000 |
| 4238 | #define DDRSS1_PHY_1273_DATA 0x00000000 |
| 4239 | #define DDRSS1_PHY_1274_DATA 0x00000000 |
| 4240 | #define DDRSS1_PHY_1275_DATA 0x00000000 |
| 4241 | #define DDRSS1_PHY_1276_DATA 0x00000000 |
| 4242 | #define DDRSS1_PHY_1277_DATA 0x00000000 |
| 4243 | #define DDRSS1_PHY_1278_DATA 0x00000000 |
| 4244 | #define DDRSS1_PHY_1279_DATA 0x00000000 |
| 4245 | #define DDRSS1_PHY_1280_DATA 0x00000000 |
| 4246 | #define DDRSS1_PHY_1281_DATA 0x00010100 |
| 4247 | #define DDRSS1_PHY_1282_DATA 0x00000000 |
| 4248 | #define DDRSS1_PHY_1283_DATA 0x00000000 |
| 4249 | #define DDRSS1_PHY_1284_DATA 0x00050000 |
| 4250 | #define DDRSS1_PHY_1285_DATA 0x04000000 |
| 4251 | #define DDRSS1_PHY_1286_DATA 0x00000055 |
| 4252 | #define DDRSS1_PHY_1287_DATA 0x00000000 |
| 4253 | #define DDRSS1_PHY_1288_DATA 0x00000000 |
| 4254 | #define DDRSS1_PHY_1289_DATA 0x00000000 |
| 4255 | #define DDRSS1_PHY_1290_DATA 0x00000000 |
| 4256 | #define DDRSS1_PHY_1291_DATA 0x00002001 |
| 4257 | #define DDRSS1_PHY_1292_DATA 0x0000400F |
| 4258 | #define DDRSS1_PHY_1293_DATA 0x50020028 |
| 4259 | #define DDRSS1_PHY_1294_DATA 0x01010000 |
| 4260 | #define DDRSS1_PHY_1295_DATA 0x80080001 |
| 4261 | #define DDRSS1_PHY_1296_DATA 0x10200000 |
| 4262 | #define DDRSS1_PHY_1297_DATA 0x00000008 |
| 4263 | #define DDRSS1_PHY_1298_DATA 0x00000000 |
| 4264 | #define DDRSS1_PHY_1299_DATA 0x01090E00 |
| 4265 | #define DDRSS1_PHY_1300_DATA 0x00040101 |
| 4266 | #define DDRSS1_PHY_1301_DATA 0x0000010F |
| 4267 | #define DDRSS1_PHY_1302_DATA 0x00000000 |
| 4268 | #define DDRSS1_PHY_1303_DATA 0x0000FFFF |
| 4269 | #define DDRSS1_PHY_1304_DATA 0x00000000 |
| 4270 | #define DDRSS1_PHY_1305_DATA 0x01010000 |
| 4271 | #define DDRSS1_PHY_1306_DATA 0x01080402 |
| 4272 | #define DDRSS1_PHY_1307_DATA 0x01200F02 |
| 4273 | #define DDRSS1_PHY_1308_DATA 0x00194280 |
| 4274 | #define DDRSS1_PHY_1309_DATA 0x00000004 |
| 4275 | #define DDRSS1_PHY_1310_DATA 0x00042000 |
| 4276 | #define DDRSS1_PHY_1311_DATA 0x00000000 |
| 4277 | #define DDRSS1_PHY_1312_DATA 0x00000000 |
| 4278 | #define DDRSS1_PHY_1313_DATA 0x00000000 |
| 4279 | #define DDRSS1_PHY_1314_DATA 0x00000000 |
| 4280 | #define DDRSS1_PHY_1315_DATA 0x00000000 |
| 4281 | #define DDRSS1_PHY_1316_DATA 0x00000000 |
| 4282 | #define DDRSS1_PHY_1317_DATA 0x01000000 |
| 4283 | #define DDRSS1_PHY_1318_DATA 0x00000705 |
| 4284 | #define DDRSS1_PHY_1319_DATA 0x00000054 |
| 4285 | #define DDRSS1_PHY_1320_DATA 0x00030820 |
| 4286 | #define DDRSS1_PHY_1321_DATA 0x00010820 |
| 4287 | #define DDRSS1_PHY_1322_DATA 0x00010820 |
| 4288 | #define DDRSS1_PHY_1323_DATA 0x00010820 |
| 4289 | #define DDRSS1_PHY_1324_DATA 0x00010820 |
| 4290 | #define DDRSS1_PHY_1325_DATA 0x00010820 |
| 4291 | #define DDRSS1_PHY_1326_DATA 0x00010820 |
| 4292 | #define DDRSS1_PHY_1327_DATA 0x00010820 |
| 4293 | #define DDRSS1_PHY_1328_DATA 0x00010820 |
| 4294 | #define DDRSS1_PHY_1329_DATA 0x00000000 |
| 4295 | #define DDRSS1_PHY_1330_DATA 0x00000074 |
| 4296 | #define DDRSS1_PHY_1331_DATA 0x00000400 |
| 4297 | #define DDRSS1_PHY_1332_DATA 0x00000108 |
| 4298 | #define DDRSS1_PHY_1333_DATA 0x00000000 |
| 4299 | #define DDRSS1_PHY_1334_DATA 0x00000000 |
| 4300 | #define DDRSS1_PHY_1335_DATA 0x00000000 |
| 4301 | #define DDRSS1_PHY_1336_DATA 0x00000000 |
| 4302 | #define DDRSS1_PHY_1337_DATA 0x00000000 |
| 4303 | #define DDRSS1_PHY_1338_DATA 0x03000000 |
| 4304 | #define DDRSS1_PHY_1339_DATA 0x00000000 |
| 4305 | #define DDRSS1_PHY_1340_DATA 0x00000000 |
| 4306 | #define DDRSS1_PHY_1341_DATA 0x00000000 |
| 4307 | #define DDRSS1_PHY_1342_DATA 0x04102006 |
| 4308 | #define DDRSS1_PHY_1343_DATA 0x00041020 |
| 4309 | #define DDRSS1_PHY_1344_DATA 0x01C98C98 |
| 4310 | #define DDRSS1_PHY_1345_DATA 0x3F400000 |
| 4311 | #define DDRSS1_PHY_1346_DATA 0x3F3F1F3F |
| 4312 | #define DDRSS1_PHY_1347_DATA 0x0000001F |
| 4313 | #define DDRSS1_PHY_1348_DATA 0x00000000 |
| 4314 | #define DDRSS1_PHY_1349_DATA 0x00000000 |
| 4315 | #define DDRSS1_PHY_1350_DATA 0x00000000 |
| 4316 | #define DDRSS1_PHY_1351_DATA 0x00010000 |
| 4317 | #define DDRSS1_PHY_1352_DATA 0x00000000 |
| 4318 | #define DDRSS1_PHY_1353_DATA 0x00000000 |
| 4319 | #define DDRSS1_PHY_1354_DATA 0x00000000 |
| 4320 | #define DDRSS1_PHY_1355_DATA 0x00000000 |
| 4321 | #define DDRSS1_PHY_1356_DATA 0x76543210 |
| 4322 | #define DDRSS1_PHY_1357_DATA 0x00010198 |
| 4323 | #define DDRSS1_PHY_1358_DATA 0x00000000 |
| 4324 | #define DDRSS1_PHY_1359_DATA 0x00000000 |
| 4325 | #define DDRSS1_PHY_1360_DATA 0x00000000 |
| 4326 | #define DDRSS1_PHY_1361_DATA 0x00040700 |
| 4327 | #define DDRSS1_PHY_1362_DATA 0x00000000 |
| 4328 | #define DDRSS1_PHY_1363_DATA 0x00000000 |
| 4329 | #define DDRSS1_PHY_1364_DATA 0x00000000 |
| 4330 | #define DDRSS1_PHY_1365_DATA 0x00000000 |
| 4331 | #define DDRSS1_PHY_1366_DATA 0x00000000 |
| 4332 | #define DDRSS1_PHY_1367_DATA 0x00000002 |
| 4333 | #define DDRSS1_PHY_1368_DATA 0x00000000 |
| 4334 | #define DDRSS1_PHY_1369_DATA 0x00000000 |
| 4335 | #define DDRSS1_PHY_1370_DATA 0x00000000 |
| 4336 | #define DDRSS1_PHY_1371_DATA 0x00000000 |
| 4337 | #define DDRSS1_PHY_1372_DATA 0x00000000 |
| 4338 | #define DDRSS1_PHY_1373_DATA 0x00000000 |
| 4339 | #define DDRSS1_PHY_1374_DATA 0x00080000 |
| 4340 | #define DDRSS1_PHY_1375_DATA 0x000007FF |
| 4341 | #define DDRSS1_PHY_1376_DATA 0x00000000 |
| 4342 | #define DDRSS1_PHY_1377_DATA 0x00000000 |
| 4343 | #define DDRSS1_PHY_1378_DATA 0x00000000 |
| 4344 | #define DDRSS1_PHY_1379_DATA 0x00000000 |
| 4345 | #define DDRSS1_PHY_1380_DATA 0x00000000 |
| 4346 | #define DDRSS1_PHY_1381_DATA 0x00000000 |
| 4347 | #define DDRSS1_PHY_1382_DATA 0x000FFFFF |
| 4348 | #define DDRSS1_PHY_1383_DATA 0x000FFFFF |
| 4349 | #define DDRSS1_PHY_1384_DATA 0x0000FFFF |
| 4350 | #define DDRSS1_PHY_1385_DATA 0xFFFFFFF0 |
| 4351 | #define DDRSS1_PHY_1386_DATA 0x030FFFFF |
| 4352 | #define DDRSS1_PHY_1387_DATA 0x01FFFFFF |
| 4353 | #define DDRSS1_PHY_1388_DATA 0x0000FFFF |
| 4354 | #define DDRSS1_PHY_1389_DATA 0x00000000 |
| 4355 | #define DDRSS1_PHY_1390_DATA 0x00000000 |
| 4356 | #define DDRSS1_PHY_1391_DATA 0x00000000 |
| 4357 | #define DDRSS1_PHY_1392_DATA 0x00000000 |
| 4358 | #define DDRSS1_PHY_1393_DATA 0x0001F7C0 |
| 4359 | #define DDRSS1_PHY_1394_DATA 0x00000003 |
| 4360 | #define DDRSS1_PHY_1395_DATA 0x00000000 |
| 4361 | #define DDRSS1_PHY_1396_DATA 0x00001142 |
| 4362 | #define DDRSS1_PHY_1397_DATA 0x010207AB |
| 4363 | #define DDRSS1_PHY_1398_DATA 0x01000080 |
| 4364 | #define DDRSS1_PHY_1399_DATA 0x03900390 |
| 4365 | #define DDRSS1_PHY_1400_DATA 0x03900390 |
| 4366 | #define DDRSS1_PHY_1401_DATA 0x00000390 |
| 4367 | #define DDRSS1_PHY_1402_DATA 0x00000390 |
| 4368 | #define DDRSS1_PHY_1403_DATA 0x00000390 |
| 4369 | #define DDRSS1_PHY_1404_DATA 0x00000390 |
| 4370 | #define DDRSS1_PHY_1405_DATA 0x00000005 |
| 4371 | #define DDRSS1_PHY_1406_DATA 0x01813FCC |
| 4372 | #define DDRSS1_PHY_1407_DATA 0x000000CC |
| 4373 | #define DDRSS1_PHY_1408_DATA 0x0C000DFF |
| 4374 | #define DDRSS1_PHY_1409_DATA 0x30000DFF |
| 4375 | #define DDRSS1_PHY_1410_DATA 0x3F0DFF11 |
| 4376 | #define DDRSS1_PHY_1411_DATA 0x000100F0 |
| 4377 | #define DDRSS1_PHY_1412_DATA 0x780DFFCC |
| 4378 | #define DDRSS1_PHY_1413_DATA 0x00007E31 |
| 4379 | #define DDRSS1_PHY_1414_DATA 0x000CBF11 |
| 4380 | #define DDRSS1_PHY_1415_DATA 0x01990010 |
| 4381 | #define DDRSS1_PHY_1416_DATA 0x000CBF11 |
| 4382 | #define DDRSS1_PHY_1417_DATA 0x01990010 |
| 4383 | #define DDRSS1_PHY_1418_DATA 0x3F0DFF11 |
| 4384 | #define DDRSS1_PHY_1419_DATA 0x00EF00F0 |
| 4385 | #define DDRSS1_PHY_1420_DATA 0x3F0DFF11 |
| 4386 | #define DDRSS1_PHY_1421_DATA 0x01FF00F0 |
| 4387 | #define DDRSS1_PHY_1422_DATA 0x20040006 |
| 4388 | |
| 4389 | #define DDRSS2_CTL_00_DATA 0x00000B00 |
| 4390 | #define DDRSS2_CTL_01_DATA 0x00000000 |
| 4391 | #define DDRSS2_CTL_02_DATA 0x00000000 |
| 4392 | #define DDRSS2_CTL_03_DATA 0x00000000 |
| 4393 | #define DDRSS2_CTL_04_DATA 0x00000000 |
| 4394 | #define DDRSS2_CTL_05_DATA 0x00000000 |
| 4395 | #define DDRSS2_CTL_06_DATA 0x00000000 |
| 4396 | #define DDRSS2_CTL_07_DATA 0x00002AF8 |
| 4397 | #define DDRSS2_CTL_08_DATA 0x0001ADAF |
| 4398 | #define DDRSS2_CTL_09_DATA 0x00000005 |
| 4399 | #define DDRSS2_CTL_10_DATA 0x0000006E |
| 4400 | #define DDRSS2_CTL_11_DATA 0x000681C8 |
| 4401 | #define DDRSS2_CTL_12_DATA 0x004111C9 |
| 4402 | #define DDRSS2_CTL_13_DATA 0x00000005 |
| 4403 | #define DDRSS2_CTL_14_DATA 0x000010A9 |
| 4404 | #define DDRSS2_CTL_15_DATA 0x000681C8 |
| 4405 | #define DDRSS2_CTL_16_DATA 0x004111C9 |
| 4406 | #define DDRSS2_CTL_17_DATA 0x00000005 |
| 4407 | #define DDRSS2_CTL_18_DATA 0x000010A9 |
| 4408 | #define DDRSS2_CTL_19_DATA 0x01010000 |
| 4409 | #define DDRSS2_CTL_20_DATA 0x02011001 |
| 4410 | #define DDRSS2_CTL_21_DATA 0x02010000 |
| 4411 | #define DDRSS2_CTL_22_DATA 0x00020100 |
| 4412 | #define DDRSS2_CTL_23_DATA 0x0000000B |
| 4413 | #define DDRSS2_CTL_24_DATA 0x0000001C |
| 4414 | #define DDRSS2_CTL_25_DATA 0x00000000 |
| 4415 | #define DDRSS2_CTL_26_DATA 0x00000000 |
| 4416 | #define DDRSS2_CTL_27_DATA 0x03020200 |
| 4417 | #define DDRSS2_CTL_28_DATA 0x00005656 |
| 4418 | #define DDRSS2_CTL_29_DATA 0x00100000 |
| 4419 | #define DDRSS2_CTL_30_DATA 0x00000000 |
| 4420 | #define DDRSS2_CTL_31_DATA 0x00000000 |
| 4421 | #define DDRSS2_CTL_32_DATA 0x00000000 |
| 4422 | #define DDRSS2_CTL_33_DATA 0x00000000 |
| 4423 | #define DDRSS2_CTL_34_DATA 0x040C0000 |
| 4424 | #define DDRSS2_CTL_35_DATA 0x12481248 |
| 4425 | #define DDRSS2_CTL_36_DATA 0x00050804 |
| 4426 | #define DDRSS2_CTL_37_DATA 0x09040008 |
| 4427 | #define DDRSS2_CTL_38_DATA 0x15000204 |
| 4428 | #define DDRSS2_CTL_39_DATA 0x1760008B |
| 4429 | #define DDRSS2_CTL_40_DATA 0x1500422B |
| 4430 | #define DDRSS2_CTL_41_DATA 0x1760008B |
| 4431 | #define DDRSS2_CTL_42_DATA 0x2000422B |
| 4432 | #define DDRSS2_CTL_43_DATA 0x000A0A09 |
| 4433 | #define DDRSS2_CTL_44_DATA 0x040003C5 |
| 4434 | #define DDRSS2_CTL_45_DATA 0x1E161104 |
| 4435 | #define DDRSS2_CTL_46_DATA 0x1000922C |
| 4436 | #define DDRSS2_CTL_47_DATA 0x1E161110 |
| 4437 | #define DDRSS2_CTL_48_DATA 0x1000922C |
| 4438 | #define DDRSS2_CTL_49_DATA 0x02030410 |
| 4439 | #define DDRSS2_CTL_50_DATA 0x2C040500 |
| 4440 | #define DDRSS2_CTL_51_DATA 0x08292C29 |
| 4441 | #define DDRSS2_CTL_52_DATA 0x14000E0A |
| 4442 | #define DDRSS2_CTL_53_DATA 0x04010A0A |
| 4443 | #define DDRSS2_CTL_54_DATA 0x01010004 |
| 4444 | #define DDRSS2_CTL_55_DATA 0x04545408 |
| 4445 | #define DDRSS2_CTL_56_DATA 0x04313104 |
| 4446 | #define DDRSS2_CTL_57_DATA 0x00003131 |
| 4447 | #define DDRSS2_CTL_58_DATA 0x00010100 |
| 4448 | #define DDRSS2_CTL_59_DATA 0x03010000 |
| 4449 | #define DDRSS2_CTL_60_DATA 0x00001508 |
| 4450 | #define DDRSS2_CTL_61_DATA 0x00000063 |
| 4451 | #define DDRSS2_CTL_62_DATA 0x0000032B |
| 4452 | #define DDRSS2_CTL_63_DATA 0x00001035 |
| 4453 | #define DDRSS2_CTL_64_DATA 0x0000032B |
| 4454 | #define DDRSS2_CTL_65_DATA 0x00001035 |
| 4455 | #define DDRSS2_CTL_66_DATA 0x00000005 |
| 4456 | #define DDRSS2_CTL_67_DATA 0x00050000 |
| 4457 | #define DDRSS2_CTL_68_DATA 0x00CB0012 |
| 4458 | #define DDRSS2_CTL_69_DATA 0x00CB0408 |
| 4459 | #define DDRSS2_CTL_70_DATA 0x00400408 |
| 4460 | #define DDRSS2_CTL_71_DATA 0x00120103 |
| 4461 | #define DDRSS2_CTL_72_DATA 0x00100005 |
| 4462 | #define DDRSS2_CTL_73_DATA 0x2F080010 |
| 4463 | #define DDRSS2_CTL_74_DATA 0x0505012F |
| 4464 | #define DDRSS2_CTL_75_DATA 0x0401030A |
| 4465 | #define DDRSS2_CTL_76_DATA 0x041E100B |
| 4466 | #define DDRSS2_CTL_77_DATA 0x100B0401 |
| 4467 | #define DDRSS2_CTL_78_DATA 0x0001041E |
| 4468 | #define DDRSS2_CTL_79_DATA 0x00160016 |
| 4469 | #define DDRSS2_CTL_80_DATA 0x033B033B |
| 4470 | #define DDRSS2_CTL_81_DATA 0x033B033B |
| 4471 | #define DDRSS2_CTL_82_DATA 0x03050505 |
| 4472 | #define DDRSS2_CTL_83_DATA 0x03010303 |
| 4473 | #define DDRSS2_CTL_84_DATA 0x200B100B |
| 4474 | #define DDRSS2_CTL_85_DATA 0x04041004 |
| 4475 | #define DDRSS2_CTL_86_DATA 0x200B100B |
| 4476 | #define DDRSS2_CTL_87_DATA 0x04041004 |
| 4477 | #define DDRSS2_CTL_88_DATA 0x03010000 |
| 4478 | #define DDRSS2_CTL_89_DATA 0x00010000 |
| 4479 | #define DDRSS2_CTL_90_DATA 0x00000000 |
| 4480 | #define DDRSS2_CTL_91_DATA 0x00000000 |
| 4481 | #define DDRSS2_CTL_92_DATA 0x01000000 |
| 4482 | #define DDRSS2_CTL_93_DATA 0x80104002 |
| 4483 | #define DDRSS2_CTL_94_DATA 0x00000000 |
| 4484 | #define DDRSS2_CTL_95_DATA 0x00040005 |
| 4485 | #define DDRSS2_CTL_96_DATA 0x00000000 |
| 4486 | #define DDRSS2_CTL_97_DATA 0x00050000 |
| 4487 | #define DDRSS2_CTL_98_DATA 0x00000004 |
| 4488 | #define DDRSS2_CTL_99_DATA 0x00000000 |
| 4489 | #define DDRSS2_CTL_100_DATA 0x00040005 |
| 4490 | #define DDRSS2_CTL_101_DATA 0x00000000 |
| 4491 | #define DDRSS2_CTL_102_DATA 0x000018C0 |
| 4492 | #define DDRSS2_CTL_103_DATA 0x000018C0 |
| 4493 | #define DDRSS2_CTL_104_DATA 0x000018C0 |
| 4494 | #define DDRSS2_CTL_105_DATA 0x000018C0 |
| 4495 | #define DDRSS2_CTL_106_DATA 0x000018C0 |
| 4496 | #define DDRSS2_CTL_107_DATA 0x00000000 |
| 4497 | #define DDRSS2_CTL_108_DATA 0x000002B5 |
| 4498 | #define DDRSS2_CTL_109_DATA 0x00040D40 |
| 4499 | #define DDRSS2_CTL_110_DATA 0x00040D40 |
| 4500 | #define DDRSS2_CTL_111_DATA 0x00040D40 |
| 4501 | #define DDRSS2_CTL_112_DATA 0x00040D40 |
| 4502 | #define DDRSS2_CTL_113_DATA 0x00040D40 |
| 4503 | #define DDRSS2_CTL_114_DATA 0x00000000 |
| 4504 | #define DDRSS2_CTL_115_DATA 0x00007173 |
| 4505 | #define DDRSS2_CTL_116_DATA 0x00040D40 |
| 4506 | #define DDRSS2_CTL_117_DATA 0x00040D40 |
| 4507 | #define DDRSS2_CTL_118_DATA 0x00040D40 |
| 4508 | #define DDRSS2_CTL_119_DATA 0x00040D40 |
| 4509 | #define DDRSS2_CTL_120_DATA 0x00040D40 |
| 4510 | #define DDRSS2_CTL_121_DATA 0x00000000 |
| 4511 | #define DDRSS2_CTL_122_DATA 0x00007173 |
| 4512 | #define DDRSS2_CTL_123_DATA 0x00000000 |
| 4513 | #define DDRSS2_CTL_124_DATA 0x00000000 |
| 4514 | #define DDRSS2_CTL_125_DATA 0x00000000 |
| 4515 | #define DDRSS2_CTL_126_DATA 0x00000000 |
| 4516 | #define DDRSS2_CTL_127_DATA 0x00000000 |
| 4517 | #define DDRSS2_CTL_128_DATA 0x00000000 |
| 4518 | #define DDRSS2_CTL_129_DATA 0x00000000 |
| 4519 | #define DDRSS2_CTL_130_DATA 0x00000000 |
| 4520 | #define DDRSS2_CTL_131_DATA 0x0B030500 |
| 4521 | #define DDRSS2_CTL_132_DATA 0x00040B04 |
| 4522 | #define DDRSS2_CTL_133_DATA 0x0A090000 |
| 4523 | #define DDRSS2_CTL_134_DATA 0x0A090701 |
| 4524 | #define DDRSS2_CTL_135_DATA 0x0900000E |
| 4525 | #define DDRSS2_CTL_136_DATA 0x0907010A |
| 4526 | #define DDRSS2_CTL_137_DATA 0x00000E0A |
| 4527 | #define DDRSS2_CTL_138_DATA 0x07010A09 |
| 4528 | #define DDRSS2_CTL_139_DATA 0x000E0A09 |
| 4529 | #define DDRSS2_CTL_140_DATA 0x07000401 |
| 4530 | #define DDRSS2_CTL_141_DATA 0x00000000 |
| 4531 | #define DDRSS2_CTL_142_DATA 0x00000000 |
| 4532 | #define DDRSS2_CTL_143_DATA 0x00000000 |
| 4533 | #define DDRSS2_CTL_144_DATA 0x00000000 |
| 4534 | #define DDRSS2_CTL_145_DATA 0x00000000 |
| 4535 | #define DDRSS2_CTL_146_DATA 0x00000000 |
| 4536 | #define DDRSS2_CTL_147_DATA 0x00000000 |
| 4537 | #define DDRSS2_CTL_148_DATA 0x08080000 |
| 4538 | #define DDRSS2_CTL_149_DATA 0x01000000 |
| 4539 | #define DDRSS2_CTL_150_DATA 0x800000C0 |
| 4540 | #define DDRSS2_CTL_151_DATA 0x800000C0 |
| 4541 | #define DDRSS2_CTL_152_DATA 0x800000C0 |
| 4542 | #define DDRSS2_CTL_153_DATA 0x00000000 |
| 4543 | #define DDRSS2_CTL_154_DATA 0x00001500 |
| 4544 | #define DDRSS2_CTL_155_DATA 0x00000000 |
| 4545 | #define DDRSS2_CTL_156_DATA 0x00000001 |
| 4546 | #define DDRSS2_CTL_157_DATA 0x00000002 |
| 4547 | #define DDRSS2_CTL_158_DATA 0x0000100E |
| 4548 | #define DDRSS2_CTL_159_DATA 0x00000000 |
| 4549 | #define DDRSS2_CTL_160_DATA 0x00000000 |
| 4550 | #define DDRSS2_CTL_161_DATA 0x00000000 |
| 4551 | #define DDRSS2_CTL_162_DATA 0x00000000 |
| 4552 | #define DDRSS2_CTL_163_DATA 0x00000000 |
| 4553 | #define DDRSS2_CTL_164_DATA 0x000B0000 |
| 4554 | #define DDRSS2_CTL_165_DATA 0x000E0006 |
| 4555 | #define DDRSS2_CTL_166_DATA 0x000E0404 |
| 4556 | #define DDRSS2_CTL_167_DATA 0x00D601AB |
| 4557 | #define DDRSS2_CTL_168_DATA 0x10100216 |
| 4558 | #define DDRSS2_CTL_169_DATA 0x01AB0216 |
| 4559 | #define DDRSS2_CTL_170_DATA 0x021600D6 |
| 4560 | #define DDRSS2_CTL_171_DATA 0x02161010 |
| 4561 | #define DDRSS2_CTL_172_DATA 0x00000000 |
| 4562 | #define DDRSS2_CTL_173_DATA 0x00000000 |
| 4563 | #define DDRSS2_CTL_174_DATA 0x00000000 |
| 4564 | #define DDRSS2_CTL_175_DATA 0x3FF40084 |
| 4565 | #define DDRSS2_CTL_176_DATA 0x33003FF4 |
| 4566 | #define DDRSS2_CTL_177_DATA 0x00003333 |
| 4567 | #define DDRSS2_CTL_178_DATA 0x35000000 |
| 4568 | #define DDRSS2_CTL_179_DATA 0x27270035 |
| 4569 | #define DDRSS2_CTL_180_DATA 0x0F0F0000 |
| 4570 | #define DDRSS2_CTL_181_DATA 0x16000000 |
| 4571 | #define DDRSS2_CTL_182_DATA 0x00841616 |
| 4572 | #define DDRSS2_CTL_183_DATA 0x3FF43FF4 |
| 4573 | #define DDRSS2_CTL_184_DATA 0x33333300 |
| 4574 | #define DDRSS2_CTL_185_DATA 0x00000000 |
| 4575 | #define DDRSS2_CTL_186_DATA 0x00353500 |
| 4576 | #define DDRSS2_CTL_187_DATA 0x00002727 |
| 4577 | #define DDRSS2_CTL_188_DATA 0x00000F0F |
| 4578 | #define DDRSS2_CTL_189_DATA 0x16161600 |
| 4579 | #define DDRSS2_CTL_190_DATA 0x00000020 |
| 4580 | #define DDRSS2_CTL_191_DATA 0x00000000 |
| 4581 | #define DDRSS2_CTL_192_DATA 0x00000001 |
| 4582 | #define DDRSS2_CTL_193_DATA 0x00000000 |
| 4583 | #define DDRSS2_CTL_194_DATA 0x01000000 |
| 4584 | #define DDRSS2_CTL_195_DATA 0x00000001 |
| 4585 | #define DDRSS2_CTL_196_DATA 0x00000000 |
| 4586 | #define DDRSS2_CTL_197_DATA 0x00000000 |
| 4587 | #define DDRSS2_CTL_198_DATA 0x00000000 |
| 4588 | #define DDRSS2_CTL_199_DATA 0x00000000 |
| 4589 | #define DDRSS2_CTL_200_DATA 0x00000000 |
| 4590 | #define DDRSS2_CTL_201_DATA 0x00000000 |
| 4591 | #define DDRSS2_CTL_202_DATA 0x00000000 |
| 4592 | #define DDRSS2_CTL_203_DATA 0x00000000 |
| 4593 | #define DDRSS2_CTL_204_DATA 0x00000000 |
| 4594 | #define DDRSS2_CTL_205_DATA 0x00000000 |
| 4595 | #define DDRSS2_CTL_206_DATA 0x02000000 |
| 4596 | #define DDRSS2_CTL_207_DATA 0x01080101 |
| 4597 | #define DDRSS2_CTL_208_DATA 0x00000000 |
| 4598 | #define DDRSS2_CTL_209_DATA 0x00000000 |
| 4599 | #define DDRSS2_CTL_210_DATA 0x00000000 |
| 4600 | #define DDRSS2_CTL_211_DATA 0x00000000 |
| 4601 | #define DDRSS2_CTL_212_DATA 0x00000000 |
| 4602 | #define DDRSS2_CTL_213_DATA 0x00000000 |
| 4603 | #define DDRSS2_CTL_214_DATA 0x00000000 |
| 4604 | #define DDRSS2_CTL_215_DATA 0x00000000 |
| 4605 | #define DDRSS2_CTL_216_DATA 0x00000000 |
| 4606 | #define DDRSS2_CTL_217_DATA 0x00000000 |
| 4607 | #define DDRSS2_CTL_218_DATA 0x00000000 |
| 4608 | #define DDRSS2_CTL_219_DATA 0x00000000 |
| 4609 | #define DDRSS2_CTL_220_DATA 0x00000000 |
| 4610 | #define DDRSS2_CTL_221_DATA 0x00000000 |
| 4611 | #define DDRSS2_CTL_222_DATA 0x00001000 |
| 4612 | #define DDRSS2_CTL_223_DATA 0x006403E8 |
| 4613 | #define DDRSS2_CTL_224_DATA 0x00000000 |
| 4614 | #define DDRSS2_CTL_225_DATA 0x00000000 |
| 4615 | #define DDRSS2_CTL_226_DATA 0x00000000 |
| 4616 | #define DDRSS2_CTL_227_DATA 0x15110000 |
| 4617 | #define DDRSS2_CTL_228_DATA 0x00040C18 |
| 4618 | #define DDRSS2_CTL_229_DATA 0xF000C000 |
| 4619 | #define DDRSS2_CTL_230_DATA 0x0000F000 |
| 4620 | #define DDRSS2_CTL_231_DATA 0x00000000 |
| 4621 | #define DDRSS2_CTL_232_DATA 0x00000000 |
| 4622 | #define DDRSS2_CTL_233_DATA 0xC0000000 |
| 4623 | #define DDRSS2_CTL_234_DATA 0xF000F000 |
| 4624 | #define DDRSS2_CTL_235_DATA 0x00000000 |
| 4625 | #define DDRSS2_CTL_236_DATA 0x00000000 |
| 4626 | #define DDRSS2_CTL_237_DATA 0x00000000 |
| 4627 | #define DDRSS2_CTL_238_DATA 0xF000C000 |
| 4628 | #define DDRSS2_CTL_239_DATA 0x0000F000 |
| 4629 | #define DDRSS2_CTL_240_DATA 0x00000000 |
| 4630 | #define DDRSS2_CTL_241_DATA 0x00000000 |
| 4631 | #define DDRSS2_CTL_242_DATA 0x00030000 |
| 4632 | #define DDRSS2_CTL_243_DATA 0x00000000 |
| 4633 | #define DDRSS2_CTL_244_DATA 0x00000000 |
| 4634 | #define DDRSS2_CTL_245_DATA 0x00000000 |
| 4635 | #define DDRSS2_CTL_246_DATA 0x00000000 |
| 4636 | #define DDRSS2_CTL_247_DATA 0x00000000 |
| 4637 | #define DDRSS2_CTL_248_DATA 0x00000000 |
| 4638 | #define DDRSS2_CTL_249_DATA 0x00000000 |
| 4639 | #define DDRSS2_CTL_250_DATA 0x00000000 |
| 4640 | #define DDRSS2_CTL_251_DATA 0x00000000 |
| 4641 | #define DDRSS2_CTL_252_DATA 0x00000000 |
| 4642 | #define DDRSS2_CTL_253_DATA 0x00000000 |
| 4643 | #define DDRSS2_CTL_254_DATA 0x00000000 |
| 4644 | #define DDRSS2_CTL_255_DATA 0x00000000 |
| 4645 | #define DDRSS2_CTL_256_DATA 0x00000000 |
| 4646 | #define DDRSS2_CTL_257_DATA 0x01000200 |
| 4647 | #define DDRSS2_CTL_258_DATA 0x00370040 |
| 4648 | #define DDRSS2_CTL_259_DATA 0x00020008 |
| 4649 | #define DDRSS2_CTL_260_DATA 0x00400100 |
| 4650 | #define DDRSS2_CTL_261_DATA 0x00400855 |
| 4651 | #define DDRSS2_CTL_262_DATA 0x01000200 |
| 4652 | #define DDRSS2_CTL_263_DATA 0x08550040 |
| 4653 | #define DDRSS2_CTL_264_DATA 0x00000040 |
| 4654 | #define DDRSS2_CTL_265_DATA 0x006B0003 |
| 4655 | #define DDRSS2_CTL_266_DATA 0x0100006B |
| 4656 | #define DDRSS2_CTL_267_DATA 0x03030303 |
| 4657 | #define DDRSS2_CTL_268_DATA 0x00000000 |
| 4658 | #define DDRSS2_CTL_269_DATA 0x00000202 |
| 4659 | #define DDRSS2_CTL_270_DATA 0x00001FFF |
| 4660 | #define DDRSS2_CTL_271_DATA 0x3FFF2000 |
| 4661 | #define DDRSS2_CTL_272_DATA 0x03FF0000 |
| 4662 | #define DDRSS2_CTL_273_DATA 0x000103FF |
| 4663 | #define DDRSS2_CTL_274_DATA 0x0FFF0B00 |
| 4664 | #define DDRSS2_CTL_275_DATA 0x01010001 |
| 4665 | #define DDRSS2_CTL_276_DATA 0x01010101 |
| 4666 | #define DDRSS2_CTL_277_DATA 0x01180101 |
| 4667 | #define DDRSS2_CTL_278_DATA 0x00030000 |
| 4668 | #define DDRSS2_CTL_279_DATA 0x00000000 |
| 4669 | #define DDRSS2_CTL_280_DATA 0x00000000 |
| 4670 | #define DDRSS2_CTL_281_DATA 0x00000000 |
| 4671 | #define DDRSS2_CTL_282_DATA 0x00000000 |
| 4672 | #define DDRSS2_CTL_283_DATA 0x00000000 |
| 4673 | #define DDRSS2_CTL_284_DATA 0x00000000 |
| 4674 | #define DDRSS2_CTL_285_DATA 0x00000000 |
| 4675 | #define DDRSS2_CTL_286_DATA 0x00040101 |
| 4676 | #define DDRSS2_CTL_287_DATA 0x04010100 |
| 4677 | #define DDRSS2_CTL_288_DATA 0x00000000 |
| 4678 | #define DDRSS2_CTL_289_DATA 0x00000000 |
| 4679 | #define DDRSS2_CTL_290_DATA 0x03030300 |
| 4680 | #define DDRSS2_CTL_291_DATA 0x00000001 |
| 4681 | #define DDRSS2_CTL_292_DATA 0x00000000 |
| 4682 | #define DDRSS2_CTL_293_DATA 0x00000000 |
| 4683 | #define DDRSS2_CTL_294_DATA 0x00000000 |
| 4684 | #define DDRSS2_CTL_295_DATA 0x00000000 |
| 4685 | #define DDRSS2_CTL_296_DATA 0x00000000 |
| 4686 | #define DDRSS2_CTL_297_DATA 0x00000000 |
| 4687 | #define DDRSS2_CTL_298_DATA 0x00000000 |
| 4688 | #define DDRSS2_CTL_299_DATA 0x00000000 |
| 4689 | #define DDRSS2_CTL_300_DATA 0x00000000 |
| 4690 | #define DDRSS2_CTL_301_DATA 0x00000000 |
| 4691 | #define DDRSS2_CTL_302_DATA 0x00000000 |
| 4692 | #define DDRSS2_CTL_303_DATA 0x00000000 |
| 4693 | #define DDRSS2_CTL_304_DATA 0x00000000 |
| 4694 | #define DDRSS2_CTL_305_DATA 0x00000000 |
| 4695 | #define DDRSS2_CTL_306_DATA 0x00000000 |
| 4696 | #define DDRSS2_CTL_307_DATA 0x00000000 |
| 4697 | #define DDRSS2_CTL_308_DATA 0x00000000 |
| 4698 | #define DDRSS2_CTL_309_DATA 0x00000000 |
| 4699 | #define DDRSS2_CTL_310_DATA 0x00000000 |
| 4700 | #define DDRSS2_CTL_311_DATA 0x00000000 |
| 4701 | #define DDRSS2_CTL_312_DATA 0x00000000 |
| 4702 | #define DDRSS2_CTL_313_DATA 0x01000000 |
| 4703 | #define DDRSS2_CTL_314_DATA 0x00020201 |
| 4704 | #define DDRSS2_CTL_315_DATA 0x01000101 |
| 4705 | #define DDRSS2_CTL_316_DATA 0x01010001 |
| 4706 | #define DDRSS2_CTL_317_DATA 0x00010101 |
| 4707 | #define DDRSS2_CTL_318_DATA 0x050A0A03 |
| 4708 | #define DDRSS2_CTL_319_DATA 0x10081F1F |
| 4709 | #define DDRSS2_CTL_320_DATA 0x00090310 |
| 4710 | #define DDRSS2_CTL_321_DATA 0x0B0C030F |
| 4711 | #define DDRSS2_CTL_322_DATA 0x0B0C0306 |
| 4712 | #define DDRSS2_CTL_323_DATA 0x0C090006 |
| 4713 | #define DDRSS2_CTL_324_DATA 0x0100000C |
| 4714 | #define DDRSS2_CTL_325_DATA 0x08040801 |
| 4715 | #define DDRSS2_CTL_326_DATA 0x00000004 |
| 4716 | #define DDRSS2_CTL_327_DATA 0x00000000 |
| 4717 | #define DDRSS2_CTL_328_DATA 0x00010000 |
| 4718 | #define DDRSS2_CTL_329_DATA 0x00280D00 |
| 4719 | #define DDRSS2_CTL_330_DATA 0x00000001 |
| 4720 | #define DDRSS2_CTL_331_DATA 0x00030001 |
| 4721 | #define DDRSS2_CTL_332_DATA 0x00000000 |
| 4722 | #define DDRSS2_CTL_333_DATA 0x00000000 |
| 4723 | #define DDRSS2_CTL_334_DATA 0x00000000 |
| 4724 | #define DDRSS2_CTL_335_DATA 0x00000000 |
| 4725 | #define DDRSS2_CTL_336_DATA 0x00000000 |
| 4726 | #define DDRSS2_CTL_337_DATA 0x00000000 |
| 4727 | #define DDRSS2_CTL_338_DATA 0x00000000 |
| 4728 | #define DDRSS2_CTL_339_DATA 0x00000000 |
| 4729 | #define DDRSS2_CTL_340_DATA 0x01000000 |
| 4730 | #define DDRSS2_CTL_341_DATA 0x00000001 |
| 4731 | #define DDRSS2_CTL_342_DATA 0x00010100 |
| 4732 | #define DDRSS2_CTL_343_DATA 0x03030000 |
| 4733 | #define DDRSS2_CTL_344_DATA 0x00000000 |
| 4734 | #define DDRSS2_CTL_345_DATA 0x00000000 |
| 4735 | #define DDRSS2_CTL_346_DATA 0x00000000 |
| 4736 | #define DDRSS2_CTL_347_DATA 0x00000000 |
| 4737 | #define DDRSS2_CTL_348_DATA 0x00000000 |
| 4738 | #define DDRSS2_CTL_349_DATA 0x00000000 |
| 4739 | #define DDRSS2_CTL_350_DATA 0x00000000 |
| 4740 | #define DDRSS2_CTL_351_DATA 0x00000000 |
| 4741 | #define DDRSS2_CTL_352_DATA 0x00000000 |
| 4742 | #define DDRSS2_CTL_353_DATA 0x00000000 |
| 4743 | #define DDRSS2_CTL_354_DATA 0x00000000 |
| 4744 | #define DDRSS2_CTL_355_DATA 0x00000000 |
| 4745 | #define DDRSS2_CTL_356_DATA 0x00000000 |
| 4746 | #define DDRSS2_CTL_357_DATA 0x00000000 |
| 4747 | #define DDRSS2_CTL_358_DATA 0x00000000 |
| 4748 | #define DDRSS2_CTL_359_DATA 0x00000000 |
| 4749 | #define DDRSS2_CTL_360_DATA 0x000556AA |
| 4750 | #define DDRSS2_CTL_361_DATA 0x000AAAAA |
| 4751 | #define DDRSS2_CTL_362_DATA 0x000AA955 |
| 4752 | #define DDRSS2_CTL_363_DATA 0x00055555 |
| 4753 | #define DDRSS2_CTL_364_DATA 0x000B3133 |
| 4754 | #define DDRSS2_CTL_365_DATA 0x0004CD33 |
| 4755 | #define DDRSS2_CTL_366_DATA 0x0004CECC |
| 4756 | #define DDRSS2_CTL_367_DATA 0x000B32CC |
| 4757 | #define DDRSS2_CTL_368_DATA 0x00010300 |
| 4758 | #define DDRSS2_CTL_369_DATA 0x03000100 |
| 4759 | #define DDRSS2_CTL_370_DATA 0x00000000 |
| 4760 | #define DDRSS2_CTL_371_DATA 0x00000000 |
| 4761 | #define DDRSS2_CTL_372_DATA 0x00000000 |
| 4762 | #define DDRSS2_CTL_373_DATA 0x00000000 |
| 4763 | #define DDRSS2_CTL_374_DATA 0x00000000 |
| 4764 | #define DDRSS2_CTL_375_DATA 0x00000000 |
| 4765 | #define DDRSS2_CTL_376_DATA 0x00000000 |
| 4766 | #define DDRSS2_CTL_377_DATA 0x00010000 |
| 4767 | #define DDRSS2_CTL_378_DATA 0x00000404 |
| 4768 | #define DDRSS2_CTL_379_DATA 0x00000000 |
| 4769 | #define DDRSS2_CTL_380_DATA 0x00000000 |
| 4770 | #define DDRSS2_CTL_381_DATA 0x00000000 |
| 4771 | #define DDRSS2_CTL_382_DATA 0x00000000 |
| 4772 | #define DDRSS2_CTL_383_DATA 0x00000000 |
| 4773 | #define DDRSS2_CTL_384_DATA 0x00000000 |
| 4774 | #define DDRSS2_CTL_385_DATA 0x00000000 |
| 4775 | #define DDRSS2_CTL_386_DATA 0x00000000 |
| 4776 | #define DDRSS2_CTL_387_DATA 0x3A3A1B00 |
| 4777 | #define DDRSS2_CTL_388_DATA 0x000A0000 |
| 4778 | #define DDRSS2_CTL_389_DATA 0x000000C6 |
| 4779 | #define DDRSS2_CTL_390_DATA 0x00000200 |
| 4780 | #define DDRSS2_CTL_391_DATA 0x00000200 |
| 4781 | #define DDRSS2_CTL_392_DATA 0x00000200 |
| 4782 | #define DDRSS2_CTL_393_DATA 0x00000200 |
| 4783 | #define DDRSS2_CTL_394_DATA 0x00000252 |
| 4784 | #define DDRSS2_CTL_395_DATA 0x000007BC |
| 4785 | #define DDRSS2_CTL_396_DATA 0x00000204 |
| 4786 | #define DDRSS2_CTL_397_DATA 0x0000206A |
| 4787 | #define DDRSS2_CTL_398_DATA 0x00000200 |
| 4788 | #define DDRSS2_CTL_399_DATA 0x00000200 |
| 4789 | #define DDRSS2_CTL_400_DATA 0x00000200 |
| 4790 | #define DDRSS2_CTL_401_DATA 0x00000200 |
| 4791 | #define DDRSS2_CTL_402_DATA 0x0000613E |
| 4792 | #define DDRSS2_CTL_403_DATA 0x00014424 |
| 4793 | #define DDRSS2_CTL_404_DATA 0x00000E15 |
| 4794 | #define DDRSS2_CTL_405_DATA 0x0000206A |
| 4795 | #define DDRSS2_CTL_406_DATA 0x00000200 |
| 4796 | #define DDRSS2_CTL_407_DATA 0x00000200 |
| 4797 | #define DDRSS2_CTL_408_DATA 0x00000200 |
| 4798 | #define DDRSS2_CTL_409_DATA 0x00000200 |
| 4799 | #define DDRSS2_CTL_410_DATA 0x0000613E |
| 4800 | #define DDRSS2_CTL_411_DATA 0x00014424 |
| 4801 | #define DDRSS2_CTL_412_DATA 0x02020E15 |
| 4802 | #define DDRSS2_CTL_413_DATA 0x03030202 |
| 4803 | #define DDRSS2_CTL_414_DATA 0x00000022 |
| 4804 | #define DDRSS2_CTL_415_DATA 0x00000000 |
| 4805 | #define DDRSS2_CTL_416_DATA 0x00000000 |
| 4806 | #define DDRSS2_CTL_417_DATA 0x00001403 |
| 4807 | #define DDRSS2_CTL_418_DATA 0x000007D0 |
| 4808 | #define DDRSS2_CTL_419_DATA 0x00000000 |
| 4809 | #define DDRSS2_CTL_420_DATA 0x00000000 |
| 4810 | #define DDRSS2_CTL_421_DATA 0x00030000 |
| 4811 | #define DDRSS2_CTL_422_DATA 0x0007001F |
| 4812 | #define DDRSS2_CTL_423_DATA 0x001B0033 |
| 4813 | #define DDRSS2_CTL_424_DATA 0x001B0033 |
| 4814 | #define DDRSS2_CTL_425_DATA 0x00000000 |
| 4815 | #define DDRSS2_CTL_426_DATA 0x00000000 |
| 4816 | #define DDRSS2_CTL_427_DATA 0x02000000 |
| 4817 | #define DDRSS2_CTL_428_DATA 0x01000404 |
| 4818 | #define DDRSS2_CTL_429_DATA 0x0B1E0B1E |
| 4819 | #define DDRSS2_CTL_430_DATA 0x00000105 |
| 4820 | #define DDRSS2_CTL_431_DATA 0x00010101 |
| 4821 | #define DDRSS2_CTL_432_DATA 0x00010101 |
| 4822 | #define DDRSS2_CTL_433_DATA 0x00010001 |
| 4823 | #define DDRSS2_CTL_434_DATA 0x00000101 |
| 4824 | #define DDRSS2_CTL_435_DATA 0x02000201 |
| 4825 | #define DDRSS2_CTL_436_DATA 0x02010000 |
| 4826 | #define DDRSS2_CTL_437_DATA 0x00000200 |
| 4827 | #define DDRSS2_CTL_438_DATA 0x28060000 |
| 4828 | #define DDRSS2_CTL_439_DATA 0x00000128 |
| 4829 | #define DDRSS2_CTL_440_DATA 0xFFFFFFFF |
| 4830 | #define DDRSS2_CTL_441_DATA 0xFFFFFFFF |
| 4831 | #define DDRSS2_CTL_442_DATA 0x00000000 |
| 4832 | #define DDRSS2_CTL_443_DATA 0x00000000 |
| 4833 | #define DDRSS2_CTL_444_DATA 0x00000000 |
| 4834 | #define DDRSS2_CTL_445_DATA 0x00000000 |
| 4835 | #define DDRSS2_CTL_446_DATA 0x00000000 |
| 4836 | #define DDRSS2_CTL_447_DATA 0x00000000 |
| 4837 | #define DDRSS2_CTL_448_DATA 0x00000000 |
| 4838 | #define DDRSS2_CTL_449_DATA 0x00000000 |
| 4839 | #define DDRSS2_CTL_450_DATA 0x00000000 |
| 4840 | #define DDRSS2_CTL_451_DATA 0x00000000 |
| 4841 | #define DDRSS2_CTL_452_DATA 0x00000000 |
| 4842 | #define DDRSS2_CTL_453_DATA 0x00000000 |
| 4843 | #define DDRSS2_CTL_454_DATA 0x00000000 |
| 4844 | #define DDRSS2_CTL_455_DATA 0x00000000 |
| 4845 | #define DDRSS2_CTL_456_DATA 0x00000000 |
| 4846 | #define DDRSS2_CTL_457_DATA 0x00000000 |
| 4847 | #define DDRSS2_CTL_458_DATA 0x00000000 |
| 4848 | |
| 4849 | #define DDRSS2_PI_00_DATA 0x00000B00 |
| 4850 | #define DDRSS2_PI_01_DATA 0x00000000 |
| 4851 | #define DDRSS2_PI_02_DATA 0x00000000 |
| 4852 | #define DDRSS2_PI_03_DATA 0x00000000 |
| 4853 | #define DDRSS2_PI_04_DATA 0x00000000 |
| 4854 | #define DDRSS2_PI_05_DATA 0x00000101 |
| 4855 | #define DDRSS2_PI_06_DATA 0x00640000 |
| 4856 | #define DDRSS2_PI_07_DATA 0x00000001 |
| 4857 | #define DDRSS2_PI_08_DATA 0x00000000 |
| 4858 | #define DDRSS2_PI_09_DATA 0x00000000 |
| 4859 | #define DDRSS2_PI_10_DATA 0x00000000 |
| 4860 | #define DDRSS2_PI_11_DATA 0x00000000 |
| 4861 | #define DDRSS2_PI_12_DATA 0x00000007 |
| 4862 | #define DDRSS2_PI_13_DATA 0x00010002 |
| 4863 | #define DDRSS2_PI_14_DATA 0x0800000F |
| 4864 | #define DDRSS2_PI_15_DATA 0x00000103 |
| 4865 | #define DDRSS2_PI_16_DATA 0x00000005 |
| 4866 | #define DDRSS2_PI_17_DATA 0x00000000 |
| 4867 | #define DDRSS2_PI_18_DATA 0x00000000 |
| 4868 | #define DDRSS2_PI_19_DATA 0x00000000 |
| 4869 | #define DDRSS2_PI_20_DATA 0x00000000 |
| 4870 | #define DDRSS2_PI_21_DATA 0x00000000 |
| 4871 | #define DDRSS2_PI_22_DATA 0x00000000 |
| 4872 | #define DDRSS2_PI_23_DATA 0x00000000 |
| 4873 | #define DDRSS2_PI_24_DATA 0x00000000 |
| 4874 | #define DDRSS2_PI_25_DATA 0x00000000 |
| 4875 | #define DDRSS2_PI_26_DATA 0x00010100 |
| 4876 | #define DDRSS2_PI_27_DATA 0x00280A00 |
| 4877 | #define DDRSS2_PI_28_DATA 0x00000000 |
| 4878 | #define DDRSS2_PI_29_DATA 0x0F000000 |
| 4879 | #define DDRSS2_PI_30_DATA 0x00003200 |
| 4880 | #define DDRSS2_PI_31_DATA 0x00000000 |
| 4881 | #define DDRSS2_PI_32_DATA 0x00000000 |
| 4882 | #define DDRSS2_PI_33_DATA 0x01010102 |
| 4883 | #define DDRSS2_PI_34_DATA 0x00000000 |
| 4884 | #define DDRSS2_PI_35_DATA 0x000000AA |
| 4885 | #define DDRSS2_PI_36_DATA 0x00000055 |
| 4886 | #define DDRSS2_PI_37_DATA 0x000000B5 |
| 4887 | #define DDRSS2_PI_38_DATA 0x0000004A |
| 4888 | #define DDRSS2_PI_39_DATA 0x00000056 |
| 4889 | #define DDRSS2_PI_40_DATA 0x000000A9 |
| 4890 | #define DDRSS2_PI_41_DATA 0x000000A9 |
| 4891 | #define DDRSS2_PI_42_DATA 0x000000B5 |
| 4892 | #define DDRSS2_PI_43_DATA 0x00000000 |
| 4893 | #define DDRSS2_PI_44_DATA 0x00000000 |
| 4894 | #define DDRSS2_PI_45_DATA 0x000F0F00 |
| 4895 | #define DDRSS2_PI_46_DATA 0x0000001B |
| 4896 | #define DDRSS2_PI_47_DATA 0x000007D0 |
| 4897 | #define DDRSS2_PI_48_DATA 0x00000300 |
| 4898 | #define DDRSS2_PI_49_DATA 0x00000000 |
| 4899 | #define DDRSS2_PI_50_DATA 0x00000000 |
| 4900 | #define DDRSS2_PI_51_DATA 0x01000000 |
| 4901 | #define DDRSS2_PI_52_DATA 0x00010101 |
| 4902 | #define DDRSS2_PI_53_DATA 0x00000000 |
| 4903 | #define DDRSS2_PI_54_DATA 0x00030000 |
| 4904 | #define DDRSS2_PI_55_DATA 0x0F000000 |
| 4905 | #define DDRSS2_PI_56_DATA 0x00000017 |
| 4906 | #define DDRSS2_PI_57_DATA 0x00000000 |
| 4907 | #define DDRSS2_PI_58_DATA 0x00000000 |
| 4908 | #define DDRSS2_PI_59_DATA 0x00000000 |
| 4909 | #define DDRSS2_PI_60_DATA 0x0A0A140A |
| 4910 | #define DDRSS2_PI_61_DATA 0x10020101 |
| 4911 | #define DDRSS2_PI_62_DATA 0x00020805 |
| 4912 | #define DDRSS2_PI_63_DATA 0x01000404 |
| 4913 | #define DDRSS2_PI_64_DATA 0x00000000 |
| 4914 | #define DDRSS2_PI_65_DATA 0x00000000 |
| 4915 | #define DDRSS2_PI_66_DATA 0x00000100 |
| 4916 | #define DDRSS2_PI_67_DATA 0x0001010F |
| 4917 | #define DDRSS2_PI_68_DATA 0x00340000 |
| 4918 | #define DDRSS2_PI_69_DATA 0x00000000 |
| 4919 | #define DDRSS2_PI_70_DATA 0x00000000 |
| 4920 | #define DDRSS2_PI_71_DATA 0x0000FFFF |
| 4921 | #define DDRSS2_PI_72_DATA 0x00000000 |
| 4922 | #define DDRSS2_PI_73_DATA 0x00080000 |
| 4923 | #define DDRSS2_PI_74_DATA 0x02000200 |
| 4924 | #define DDRSS2_PI_75_DATA 0x01000100 |
| 4925 | #define DDRSS2_PI_76_DATA 0x01000000 |
| 4926 | #define DDRSS2_PI_77_DATA 0x02000200 |
| 4927 | #define DDRSS2_PI_78_DATA 0x00000200 |
| 4928 | #define DDRSS2_PI_79_DATA 0x00000000 |
| 4929 | #define DDRSS2_PI_80_DATA 0x00000000 |
| 4930 | #define DDRSS2_PI_81_DATA 0x00000000 |
| 4931 | #define DDRSS2_PI_82_DATA 0x00000000 |
| 4932 | #define DDRSS2_PI_83_DATA 0x00000000 |
| 4933 | #define DDRSS2_PI_84_DATA 0x00000000 |
| 4934 | #define DDRSS2_PI_85_DATA 0x00000000 |
| 4935 | #define DDRSS2_PI_86_DATA 0x00000000 |
| 4936 | #define DDRSS2_PI_87_DATA 0x00000000 |
| 4937 | #define DDRSS2_PI_88_DATA 0x00000000 |
| 4938 | #define DDRSS2_PI_89_DATA 0x00000000 |
| 4939 | #define DDRSS2_PI_90_DATA 0x00000000 |
| 4940 | #define DDRSS2_PI_91_DATA 0x00000400 |
| 4941 | #define DDRSS2_PI_92_DATA 0x02010000 |
| 4942 | #define DDRSS2_PI_93_DATA 0x00080003 |
| 4943 | #define DDRSS2_PI_94_DATA 0x00080000 |
| 4944 | #define DDRSS2_PI_95_DATA 0x00000001 |
| 4945 | #define DDRSS2_PI_96_DATA 0x00000000 |
| 4946 | #define DDRSS2_PI_97_DATA 0x0000AA00 |
| 4947 | #define DDRSS2_PI_98_DATA 0x00000000 |
| 4948 | #define DDRSS2_PI_99_DATA 0x00000000 |
| 4949 | #define DDRSS2_PI_100_DATA 0x00010000 |
| 4950 | #define DDRSS2_PI_101_DATA 0x00000000 |
| 4951 | #define DDRSS2_PI_102_DATA 0x00000000 |
| 4952 | #define DDRSS2_PI_103_DATA 0x00000000 |
| 4953 | #define DDRSS2_PI_104_DATA 0x00000000 |
| 4954 | #define DDRSS2_PI_105_DATA 0x00000000 |
| 4955 | #define DDRSS2_PI_106_DATA 0x00000000 |
| 4956 | #define DDRSS2_PI_107_DATA 0x00000000 |
| 4957 | #define DDRSS2_PI_108_DATA 0x00000000 |
| 4958 | #define DDRSS2_PI_109_DATA 0x00000000 |
| 4959 | #define DDRSS2_PI_110_DATA 0x00000000 |
| 4960 | #define DDRSS2_PI_111_DATA 0x00000000 |
| 4961 | #define DDRSS2_PI_112_DATA 0x00000000 |
| 4962 | #define DDRSS2_PI_113_DATA 0x00000000 |
| 4963 | #define DDRSS2_PI_114_DATA 0x00000000 |
| 4964 | #define DDRSS2_PI_115_DATA 0x00000000 |
| 4965 | #define DDRSS2_PI_116_DATA 0x00000000 |
| 4966 | #define DDRSS2_PI_117_DATA 0x00000000 |
| 4967 | #define DDRSS2_PI_118_DATA 0x00000000 |
| 4968 | #define DDRSS2_PI_119_DATA 0x00000000 |
| 4969 | #define DDRSS2_PI_120_DATA 0x00000000 |
| 4970 | #define DDRSS2_PI_121_DATA 0x00000000 |
| 4971 | #define DDRSS2_PI_122_DATA 0x00000000 |
| 4972 | #define DDRSS2_PI_123_DATA 0x00000000 |
| 4973 | #define DDRSS2_PI_124_DATA 0x00000000 |
| 4974 | #define DDRSS2_PI_125_DATA 0x00000008 |
| 4975 | #define DDRSS2_PI_126_DATA 0x00000000 |
| 4976 | #define DDRSS2_PI_127_DATA 0x00000000 |
| 4977 | #define DDRSS2_PI_128_DATA 0x00000000 |
| 4978 | #define DDRSS2_PI_129_DATA 0x00000000 |
| 4979 | #define DDRSS2_PI_130_DATA 0x00000000 |
| 4980 | #define DDRSS2_PI_131_DATA 0x00000000 |
| 4981 | #define DDRSS2_PI_132_DATA 0x00000000 |
| 4982 | #define DDRSS2_PI_133_DATA 0x00000000 |
| 4983 | #define DDRSS2_PI_134_DATA 0x00000002 |
| 4984 | #define DDRSS2_PI_135_DATA 0x00000000 |
| 4985 | #define DDRSS2_PI_136_DATA 0x00000000 |
| 4986 | #define DDRSS2_PI_137_DATA 0x0000000A |
| 4987 | #define DDRSS2_PI_138_DATA 0x00000019 |
| 4988 | #define DDRSS2_PI_139_DATA 0x00000100 |
| 4989 | #define DDRSS2_PI_140_DATA 0x00000000 |
| 4990 | #define DDRSS2_PI_141_DATA 0x00000000 |
| 4991 | #define DDRSS2_PI_142_DATA 0x00000000 |
| 4992 | #define DDRSS2_PI_143_DATA 0x00000000 |
| 4993 | #define DDRSS2_PI_144_DATA 0x01000000 |
| 4994 | #define DDRSS2_PI_145_DATA 0x00010003 |
| 4995 | #define DDRSS2_PI_146_DATA 0x02000101 |
| 4996 | #define DDRSS2_PI_147_DATA 0x01030001 |
| 4997 | #define DDRSS2_PI_148_DATA 0x00010400 |
| 4998 | #define DDRSS2_PI_149_DATA 0x06000105 |
| 4999 | #define DDRSS2_PI_150_DATA 0x01070001 |
| 5000 | #define DDRSS2_PI_151_DATA 0x00000000 |
| 5001 | #define DDRSS2_PI_152_DATA 0x00000000 |
| 5002 | #define DDRSS2_PI_153_DATA 0x00000000 |
| 5003 | #define DDRSS2_PI_154_DATA 0x00010001 |
| 5004 | #define DDRSS2_PI_155_DATA 0x00000000 |
| 5005 | #define DDRSS2_PI_156_DATA 0x00000000 |
| 5006 | #define DDRSS2_PI_157_DATA 0x00000000 |
| 5007 | #define DDRSS2_PI_158_DATA 0x00000000 |
| 5008 | #define DDRSS2_PI_159_DATA 0x00000401 |
| 5009 | #define DDRSS2_PI_160_DATA 0x00000000 |
| 5010 | #define DDRSS2_PI_161_DATA 0x00010000 |
| 5011 | #define DDRSS2_PI_162_DATA 0x00000000 |
| 5012 | #define DDRSS2_PI_163_DATA 0x2B2B0200 |
| 5013 | #define DDRSS2_PI_164_DATA 0x00000034 |
| 5014 | #define DDRSS2_PI_165_DATA 0x00000064 |
| 5015 | #define DDRSS2_PI_166_DATA 0x00020064 |
| 5016 | #define DDRSS2_PI_167_DATA 0x02000200 |
| 5017 | #define DDRSS2_PI_168_DATA 0x48120C04 |
| 5018 | #define DDRSS2_PI_169_DATA 0x00154812 |
| 5019 | #define DDRSS2_PI_170_DATA 0x00000063 |
| 5020 | #define DDRSS2_PI_171_DATA 0x0000032B |
| 5021 | #define DDRSS2_PI_172_DATA 0x00001035 |
| 5022 | #define DDRSS2_PI_173_DATA 0x0000032B |
| 5023 | #define DDRSS2_PI_174_DATA 0x04001035 |
| 5024 | #define DDRSS2_PI_175_DATA 0x01010404 |
| 5025 | #define DDRSS2_PI_176_DATA 0x00001501 |
| 5026 | #define DDRSS2_PI_177_DATA 0x00150015 |
| 5027 | #define DDRSS2_PI_178_DATA 0x01000100 |
| 5028 | #define DDRSS2_PI_179_DATA 0x00000100 |
| 5029 | #define DDRSS2_PI_180_DATA 0x00000000 |
| 5030 | #define DDRSS2_PI_181_DATA 0x01010101 |
| 5031 | #define DDRSS2_PI_182_DATA 0x00000101 |
| 5032 | #define DDRSS2_PI_183_DATA 0x00000000 |
| 5033 | #define DDRSS2_PI_184_DATA 0x00000000 |
| 5034 | #define DDRSS2_PI_185_DATA 0x15040000 |
| 5035 | #define DDRSS2_PI_186_DATA 0x0E0E0215 |
| 5036 | #define DDRSS2_PI_187_DATA 0x00040402 |
| 5037 | #define DDRSS2_PI_188_DATA 0x000D0035 |
| 5038 | #define DDRSS2_PI_189_DATA 0x00218049 |
| 5039 | #define DDRSS2_PI_190_DATA 0x00218049 |
| 5040 | #define DDRSS2_PI_191_DATA 0x01010101 |
| 5041 | #define DDRSS2_PI_192_DATA 0x0004000E |
| 5042 | #define DDRSS2_PI_193_DATA 0x00040216 |
| 5043 | #define DDRSS2_PI_194_DATA 0x01000216 |
| 5044 | #define DDRSS2_PI_195_DATA 0x000F000F |
| 5045 | #define DDRSS2_PI_196_DATA 0x02170100 |
| 5046 | #define DDRSS2_PI_197_DATA 0x01000217 |
| 5047 | #define DDRSS2_PI_198_DATA 0x02170217 |
| 5048 | #define DDRSS2_PI_199_DATA 0x32103200 |
| 5049 | #define DDRSS2_PI_200_DATA 0x01013210 |
| 5050 | #define DDRSS2_PI_201_DATA 0x0A070601 |
| 5051 | #define DDRSS2_PI_202_DATA 0x1F130A0D |
| 5052 | #define DDRSS2_PI_203_DATA 0x1F130A14 |
| 5053 | #define DDRSS2_PI_204_DATA 0x0000C014 |
| 5054 | #define DDRSS2_PI_205_DATA 0x00C01000 |
| 5055 | #define DDRSS2_PI_206_DATA 0x00C01000 |
| 5056 | #define DDRSS2_PI_207_DATA 0x00021000 |
| 5057 | #define DDRSS2_PI_208_DATA 0x0024000E |
| 5058 | #define DDRSS2_PI_209_DATA 0x00240216 |
| 5059 | #define DDRSS2_PI_210_DATA 0x00110216 |
| 5060 | #define DDRSS2_PI_211_DATA 0x32000056 |
| 5061 | #define DDRSS2_PI_212_DATA 0x00000301 |
| 5062 | #define DDRSS2_PI_213_DATA 0x005B0036 |
| 5063 | #define DDRSS2_PI_214_DATA 0x03013212 |
| 5064 | #define DDRSS2_PI_215_DATA 0x00003600 |
| 5065 | #define DDRSS2_PI_216_DATA 0x3212005B |
| 5066 | #define DDRSS2_PI_217_DATA 0x09000301 |
| 5067 | #define DDRSS2_PI_218_DATA 0x04010504 |
| 5068 | #define DDRSS2_PI_219_DATA 0x04000364 |
| 5069 | #define DDRSS2_PI_220_DATA 0x0A032001 |
| 5070 | #define DDRSS2_PI_221_DATA 0x2C31110A |
| 5071 | #define DDRSS2_PI_222_DATA 0x00002918 |
| 5072 | #define DDRSS2_PI_223_DATA 0x6000838E |
| 5073 | #define DDRSS2_PI_224_DATA 0x1E202008 |
| 5074 | #define DDRSS2_PI_225_DATA 0x2C311116 |
| 5075 | #define DDRSS2_PI_226_DATA 0x00002918 |
| 5076 | #define DDRSS2_PI_227_DATA 0x6000838E |
| 5077 | #define DDRSS2_PI_228_DATA 0x1E202008 |
| 5078 | #define DDRSS2_PI_229_DATA 0x0000C616 |
| 5079 | #define DDRSS2_PI_230_DATA 0x000007BC |
| 5080 | #define DDRSS2_PI_231_DATA 0x0000206A |
| 5081 | #define DDRSS2_PI_232_DATA 0x00014424 |
| 5082 | #define DDRSS2_PI_233_DATA 0x0000206A |
| 5083 | #define DDRSS2_PI_234_DATA 0x00014424 |
| 5084 | #define DDRSS2_PI_235_DATA 0x033B0016 |
| 5085 | #define DDRSS2_PI_236_DATA 0x0303033B |
| 5086 | #define DDRSS2_PI_237_DATA 0x002AF803 |
| 5087 | #define DDRSS2_PI_238_DATA 0x0001ADAF |
| 5088 | #define DDRSS2_PI_239_DATA 0x00000005 |
| 5089 | #define DDRSS2_PI_240_DATA 0x0000006E |
| 5090 | #define DDRSS2_PI_241_DATA 0x00000016 |
| 5091 | #define DDRSS2_PI_242_DATA 0x000681C8 |
| 5092 | #define DDRSS2_PI_243_DATA 0x0001ADAF |
| 5093 | #define DDRSS2_PI_244_DATA 0x00000005 |
| 5094 | #define DDRSS2_PI_245_DATA 0x000010A9 |
| 5095 | #define DDRSS2_PI_246_DATA 0x0000033B |
| 5096 | #define DDRSS2_PI_247_DATA 0x000681C8 |
| 5097 | #define DDRSS2_PI_248_DATA 0x0001ADAF |
| 5098 | #define DDRSS2_PI_249_DATA 0x00000005 |
| 5099 | #define DDRSS2_PI_250_DATA 0x000010A9 |
| 5100 | #define DDRSS2_PI_251_DATA 0x0100033B |
| 5101 | #define DDRSS2_PI_252_DATA 0x00370040 |
| 5102 | #define DDRSS2_PI_253_DATA 0x00010008 |
| 5103 | #define DDRSS2_PI_254_DATA 0x08550040 |
| 5104 | #define DDRSS2_PI_255_DATA 0x00010040 |
| 5105 | #define DDRSS2_PI_256_DATA 0x08550040 |
| 5106 | #define DDRSS2_PI_257_DATA 0x00000340 |
| 5107 | #define DDRSS2_PI_258_DATA 0x006B006B |
| 5108 | #define DDRSS2_PI_259_DATA 0x08040404 |
| 5109 | #define DDRSS2_PI_260_DATA 0x00000055 |
| 5110 | #define DDRSS2_PI_261_DATA 0x55083C5A |
| 5111 | #define DDRSS2_PI_262_DATA 0x5A000000 |
| 5112 | #define DDRSS2_PI_263_DATA 0x0055083C |
| 5113 | #define DDRSS2_PI_264_DATA 0x3C5A0000 |
| 5114 | #define DDRSS2_PI_265_DATA 0x00005508 |
| 5115 | #define DDRSS2_PI_266_DATA 0x0C3C5A00 |
| 5116 | #define DDRSS2_PI_267_DATA 0x080F0E0D |
| 5117 | #define DDRSS2_PI_268_DATA 0x000B0A09 |
| 5118 | #define DDRSS2_PI_269_DATA 0x00030201 |
| 5119 | #define DDRSS2_PI_270_DATA 0x01000000 |
| 5120 | #define DDRSS2_PI_271_DATA 0x04020201 |
| 5121 | #define DDRSS2_PI_272_DATA 0x00080804 |
| 5122 | #define DDRSS2_PI_273_DATA 0x00000000 |
| 5123 | #define DDRSS2_PI_274_DATA 0x00000000 |
| 5124 | #define DDRSS2_PI_275_DATA 0x00330084 |
| 5125 | #define DDRSS2_PI_276_DATA 0x00160000 |
| 5126 | #define DDRSS2_PI_277_DATA 0x35333FF4 |
| 5127 | #define DDRSS2_PI_278_DATA 0x00160F27 |
| 5128 | #define DDRSS2_PI_279_DATA 0x35333FF4 |
| 5129 | #define DDRSS2_PI_280_DATA 0x00160F27 |
| 5130 | #define DDRSS2_PI_281_DATA 0x00330084 |
| 5131 | #define DDRSS2_PI_282_DATA 0x00160000 |
| 5132 | #define DDRSS2_PI_283_DATA 0x35333FF4 |
| 5133 | #define DDRSS2_PI_284_DATA 0x00160F27 |
| 5134 | #define DDRSS2_PI_285_DATA 0x35333FF4 |
| 5135 | #define DDRSS2_PI_286_DATA 0x00160F27 |
| 5136 | #define DDRSS2_PI_287_DATA 0x00330084 |
| 5137 | #define DDRSS2_PI_288_DATA 0x00160000 |
| 5138 | #define DDRSS2_PI_289_DATA 0x35333FF4 |
| 5139 | #define DDRSS2_PI_290_DATA 0x00160F27 |
| 5140 | #define DDRSS2_PI_291_DATA 0x35333FF4 |
| 5141 | #define DDRSS2_PI_292_DATA 0x00160F27 |
| 5142 | #define DDRSS2_PI_293_DATA 0x00330084 |
| 5143 | #define DDRSS2_PI_294_DATA 0x00160000 |
| 5144 | #define DDRSS2_PI_295_DATA 0x35333FF4 |
| 5145 | #define DDRSS2_PI_296_DATA 0x00160F27 |
| 5146 | #define DDRSS2_PI_297_DATA 0x35333FF4 |
| 5147 | #define DDRSS2_PI_298_DATA 0x00160F27 |
| 5148 | #define DDRSS2_PI_299_DATA 0x00000000 |
| 5149 | |
| 5150 | #define DDRSS2_PHY_00_DATA 0x000004F0 |
| 5151 | #define DDRSS2_PHY_01_DATA 0x00000000 |
| 5152 | #define DDRSS2_PHY_02_DATA 0x00030200 |
| 5153 | #define DDRSS2_PHY_03_DATA 0x00000000 |
| 5154 | #define DDRSS2_PHY_04_DATA 0x00000000 |
| 5155 | #define DDRSS2_PHY_05_DATA 0x01030000 |
| 5156 | #define DDRSS2_PHY_06_DATA 0x00010000 |
| 5157 | #define DDRSS2_PHY_07_DATA 0x01030004 |
| 5158 | #define DDRSS2_PHY_08_DATA 0x01000000 |
| 5159 | #define DDRSS2_PHY_09_DATA 0x00000000 |
| 5160 | #define DDRSS2_PHY_10_DATA 0x00000000 |
| 5161 | #define DDRSS2_PHY_11_DATA 0x01000001 |
| 5162 | #define DDRSS2_PHY_12_DATA 0x00000100 |
| 5163 | #define DDRSS2_PHY_13_DATA 0x000800C0 |
| 5164 | #define DDRSS2_PHY_14_DATA 0x060100CC |
| 5165 | #define DDRSS2_PHY_15_DATA 0x00030066 |
| 5166 | #define DDRSS2_PHY_16_DATA 0x00000000 |
| 5167 | #define DDRSS2_PHY_17_DATA 0x00000301 |
| 5168 | #define DDRSS2_PHY_18_DATA 0x0000AAAA |
| 5169 | #define DDRSS2_PHY_19_DATA 0x00005555 |
| 5170 | #define DDRSS2_PHY_20_DATA 0x0000B5B5 |
| 5171 | #define DDRSS2_PHY_21_DATA 0x00004A4A |
| 5172 | #define DDRSS2_PHY_22_DATA 0x00005656 |
| 5173 | #define DDRSS2_PHY_23_DATA 0x0000A9A9 |
| 5174 | #define DDRSS2_PHY_24_DATA 0x0000A9A9 |
| 5175 | #define DDRSS2_PHY_25_DATA 0x0000B5B5 |
| 5176 | #define DDRSS2_PHY_26_DATA 0x00000000 |
| 5177 | #define DDRSS2_PHY_27_DATA 0x00000000 |
| 5178 | #define DDRSS2_PHY_28_DATA 0x2A000000 |
| 5179 | #define DDRSS2_PHY_29_DATA 0x00000808 |
| 5180 | #define DDRSS2_PHY_30_DATA 0x0F000000 |
| 5181 | #define DDRSS2_PHY_31_DATA 0x00000F0F |
| 5182 | #define DDRSS2_PHY_32_DATA 0x10400000 |
| 5183 | #define DDRSS2_PHY_33_DATA 0x0C002006 |
| 5184 | #define DDRSS2_PHY_34_DATA 0x00000000 |
| 5185 | #define DDRSS2_PHY_35_DATA 0x00000000 |
| 5186 | #define DDRSS2_PHY_36_DATA 0x55555555 |
| 5187 | #define DDRSS2_PHY_37_DATA 0xAAAAAAAA |
| 5188 | #define DDRSS2_PHY_38_DATA 0x55555555 |
| 5189 | #define DDRSS2_PHY_39_DATA 0xAAAAAAAA |
| 5190 | #define DDRSS2_PHY_40_DATA 0x00005555 |
| 5191 | #define DDRSS2_PHY_41_DATA 0x01000100 |
| 5192 | #define DDRSS2_PHY_42_DATA 0x00800180 |
| 5193 | #define DDRSS2_PHY_43_DATA 0x00000001 |
| 5194 | #define DDRSS2_PHY_44_DATA 0x00000000 |
| 5195 | #define DDRSS2_PHY_45_DATA 0x00000000 |
| 5196 | #define DDRSS2_PHY_46_DATA 0x00000000 |
| 5197 | #define DDRSS2_PHY_47_DATA 0x00000000 |
| 5198 | #define DDRSS2_PHY_48_DATA 0x00000000 |
| 5199 | #define DDRSS2_PHY_49_DATA 0x00000000 |
| 5200 | #define DDRSS2_PHY_50_DATA 0x00000000 |
| 5201 | #define DDRSS2_PHY_51_DATA 0x00000000 |
| 5202 | #define DDRSS2_PHY_52_DATA 0x00000000 |
| 5203 | #define DDRSS2_PHY_53_DATA 0x00000000 |
| 5204 | #define DDRSS2_PHY_54_DATA 0x00000000 |
| 5205 | #define DDRSS2_PHY_55_DATA 0x00000000 |
| 5206 | #define DDRSS2_PHY_56_DATA 0x00000000 |
| 5207 | #define DDRSS2_PHY_57_DATA 0x00000000 |
| 5208 | #define DDRSS2_PHY_58_DATA 0x00000000 |
| 5209 | #define DDRSS2_PHY_59_DATA 0x00000000 |
| 5210 | #define DDRSS2_PHY_60_DATA 0x00000000 |
| 5211 | #define DDRSS2_PHY_61_DATA 0x00000000 |
| 5212 | #define DDRSS2_PHY_62_DATA 0x00000000 |
| 5213 | #define DDRSS2_PHY_63_DATA 0x00000000 |
| 5214 | #define DDRSS2_PHY_64_DATA 0x00000000 |
| 5215 | #define DDRSS2_PHY_65_DATA 0x00000000 |
| 5216 | #define DDRSS2_PHY_66_DATA 0x00000104 |
| 5217 | #define DDRSS2_PHY_67_DATA 0x00000120 |
| 5218 | #define DDRSS2_PHY_68_DATA 0x00000000 |
| 5219 | #define DDRSS2_PHY_69_DATA 0x00000000 |
| 5220 | #define DDRSS2_PHY_70_DATA 0x00000000 |
| 5221 | #define DDRSS2_PHY_71_DATA 0x00000000 |
| 5222 | #define DDRSS2_PHY_72_DATA 0x00000000 |
| 5223 | #define DDRSS2_PHY_73_DATA 0x00000000 |
| 5224 | #define DDRSS2_PHY_74_DATA 0x00000000 |
| 5225 | #define DDRSS2_PHY_75_DATA 0x00000001 |
| 5226 | #define DDRSS2_PHY_76_DATA 0x07FF0000 |
| 5227 | #define DDRSS2_PHY_77_DATA 0x0080081F |
| 5228 | #define DDRSS2_PHY_78_DATA 0x00081020 |
| 5229 | #define DDRSS2_PHY_79_DATA 0x04010000 |
| 5230 | #define DDRSS2_PHY_80_DATA 0x00000000 |
| 5231 | #define DDRSS2_PHY_81_DATA 0x00000000 |
| 5232 | #define DDRSS2_PHY_82_DATA 0x00000000 |
| 5233 | #define DDRSS2_PHY_83_DATA 0x00000100 |
| 5234 | #define DDRSS2_PHY_84_DATA 0x01CC0C01 |
| 5235 | #define DDRSS2_PHY_85_DATA 0x1003CC0C |
| 5236 | #define DDRSS2_PHY_86_DATA 0x20000140 |
| 5237 | #define DDRSS2_PHY_87_DATA 0x07FF0200 |
| 5238 | #define DDRSS2_PHY_88_DATA 0x0000DD01 |
| 5239 | #define DDRSS2_PHY_89_DATA 0x10100303 |
| 5240 | #define DDRSS2_PHY_90_DATA 0x10101010 |
| 5241 | #define DDRSS2_PHY_91_DATA 0x10101010 |
| 5242 | #define DDRSS2_PHY_92_DATA 0x00021010 |
| 5243 | #define DDRSS2_PHY_93_DATA 0x00100010 |
| 5244 | #define DDRSS2_PHY_94_DATA 0x00100010 |
| 5245 | #define DDRSS2_PHY_95_DATA 0x00100010 |
| 5246 | #define DDRSS2_PHY_96_DATA 0x00100010 |
| 5247 | #define DDRSS2_PHY_97_DATA 0x00050010 |
| 5248 | #define DDRSS2_PHY_98_DATA 0x51517041 |
| 5249 | #define DDRSS2_PHY_99_DATA 0x31C06001 |
| 5250 | #define DDRSS2_PHY_100_DATA 0x07AB0340 |
| 5251 | #define DDRSS2_PHY_101_DATA 0x00C0C001 |
| 5252 | #define DDRSS2_PHY_102_DATA 0x0E0D0001 |
| 5253 | #define DDRSS2_PHY_103_DATA 0x10001000 |
| 5254 | #define DDRSS2_PHY_104_DATA 0x0C083E42 |
| 5255 | #define DDRSS2_PHY_105_DATA 0x0F0C3701 |
| 5256 | #define DDRSS2_PHY_106_DATA 0x01000140 |
| 5257 | #define DDRSS2_PHY_107_DATA 0x0C000420 |
| 5258 | #define DDRSS2_PHY_108_DATA 0x00000198 |
| 5259 | #define DDRSS2_PHY_109_DATA 0x0A0000D0 |
| 5260 | #define DDRSS2_PHY_110_DATA 0x00030200 |
| 5261 | #define DDRSS2_PHY_111_DATA 0x02800000 |
| 5262 | #define DDRSS2_PHY_112_DATA 0x80800000 |
| 5263 | #define DDRSS2_PHY_113_DATA 0x000E2010 |
| 5264 | #define DDRSS2_PHY_114_DATA 0x76543210 |
| 5265 | #define DDRSS2_PHY_115_DATA 0x00000008 |
| 5266 | #define DDRSS2_PHY_116_DATA 0x02800280 |
| 5267 | #define DDRSS2_PHY_117_DATA 0x02800280 |
| 5268 | #define DDRSS2_PHY_118_DATA 0x02800280 |
| 5269 | #define DDRSS2_PHY_119_DATA 0x02800280 |
| 5270 | #define DDRSS2_PHY_120_DATA 0x00000280 |
| 5271 | #define DDRSS2_PHY_121_DATA 0x0000A000 |
| 5272 | #define DDRSS2_PHY_122_DATA 0x00A000A0 |
| 5273 | #define DDRSS2_PHY_123_DATA 0x00A000A0 |
| 5274 | #define DDRSS2_PHY_124_DATA 0x00A000A0 |
| 5275 | #define DDRSS2_PHY_125_DATA 0x00A000A0 |
| 5276 | #define DDRSS2_PHY_126_DATA 0x00A000A0 |
| 5277 | #define DDRSS2_PHY_127_DATA 0x00A000A0 |
| 5278 | #define DDRSS2_PHY_128_DATA 0x00A000A0 |
| 5279 | #define DDRSS2_PHY_129_DATA 0x00A000A0 |
| 5280 | #define DDRSS2_PHY_130_DATA 0x01C200A0 |
| 5281 | #define DDRSS2_PHY_131_DATA 0x01A00005 |
| 5282 | #define DDRSS2_PHY_132_DATA 0x00000000 |
| 5283 | #define DDRSS2_PHY_133_DATA 0x00000000 |
| 5284 | #define DDRSS2_PHY_134_DATA 0x00080200 |
| 5285 | #define DDRSS2_PHY_135_DATA 0x00000000 |
| 5286 | #define DDRSS2_PHY_136_DATA 0x20202000 |
| 5287 | #define DDRSS2_PHY_137_DATA 0x20202020 |
| 5288 | #define DDRSS2_PHY_138_DATA 0xF0F02020 |
| 5289 | #define DDRSS2_PHY_139_DATA 0x00000000 |
| 5290 | #define DDRSS2_PHY_140_DATA 0x00000000 |
| 5291 | #define DDRSS2_PHY_141_DATA 0x00000000 |
| 5292 | #define DDRSS2_PHY_142_DATA 0x00000000 |
| 5293 | #define DDRSS2_PHY_143_DATA 0x00000000 |
| 5294 | #define DDRSS2_PHY_144_DATA 0x00000000 |
| 5295 | #define DDRSS2_PHY_145_DATA 0x00000000 |
| 5296 | #define DDRSS2_PHY_146_DATA 0x00000000 |
| 5297 | #define DDRSS2_PHY_147_DATA 0x00000000 |
| 5298 | #define DDRSS2_PHY_148_DATA 0x00000000 |
| 5299 | #define DDRSS2_PHY_149_DATA 0x00000000 |
| 5300 | #define DDRSS2_PHY_150_DATA 0x00000000 |
| 5301 | #define DDRSS2_PHY_151_DATA 0x00000000 |
| 5302 | #define DDRSS2_PHY_152_DATA 0x00000000 |
| 5303 | #define DDRSS2_PHY_153_DATA 0x00000000 |
| 5304 | #define DDRSS2_PHY_154_DATA 0x00000000 |
| 5305 | #define DDRSS2_PHY_155_DATA 0x00000000 |
| 5306 | #define DDRSS2_PHY_156_DATA 0x00000000 |
| 5307 | #define DDRSS2_PHY_157_DATA 0x00000000 |
| 5308 | #define DDRSS2_PHY_158_DATA 0x00000000 |
| 5309 | #define DDRSS2_PHY_159_DATA 0x00000000 |
| 5310 | #define DDRSS2_PHY_160_DATA 0x00000000 |
| 5311 | #define DDRSS2_PHY_161_DATA 0x00000000 |
| 5312 | #define DDRSS2_PHY_162_DATA 0x00000000 |
| 5313 | #define DDRSS2_PHY_163_DATA 0x00000000 |
| 5314 | #define DDRSS2_PHY_164_DATA 0x00000000 |
| 5315 | #define DDRSS2_PHY_165_DATA 0x00000000 |
| 5316 | #define DDRSS2_PHY_166_DATA 0x00000000 |
| 5317 | #define DDRSS2_PHY_167_DATA 0x00000000 |
| 5318 | #define DDRSS2_PHY_168_DATA 0x00000000 |
| 5319 | #define DDRSS2_PHY_169_DATA 0x00000000 |
| 5320 | #define DDRSS2_PHY_170_DATA 0x00000000 |
| 5321 | #define DDRSS2_PHY_171_DATA 0x00000000 |
| 5322 | #define DDRSS2_PHY_172_DATA 0x00000000 |
| 5323 | #define DDRSS2_PHY_173_DATA 0x00000000 |
| 5324 | #define DDRSS2_PHY_174_DATA 0x00000000 |
| 5325 | #define DDRSS2_PHY_175_DATA 0x00000000 |
| 5326 | #define DDRSS2_PHY_176_DATA 0x00000000 |
| 5327 | #define DDRSS2_PHY_177_DATA 0x00000000 |
| 5328 | #define DDRSS2_PHY_178_DATA 0x00000000 |
| 5329 | #define DDRSS2_PHY_179_DATA 0x00000000 |
| 5330 | #define DDRSS2_PHY_180_DATA 0x00000000 |
| 5331 | #define DDRSS2_PHY_181_DATA 0x00000000 |
| 5332 | #define DDRSS2_PHY_182_DATA 0x00000000 |
| 5333 | #define DDRSS2_PHY_183_DATA 0x00000000 |
| 5334 | #define DDRSS2_PHY_184_DATA 0x00000000 |
| 5335 | #define DDRSS2_PHY_185_DATA 0x00000000 |
| 5336 | #define DDRSS2_PHY_186_DATA 0x00000000 |
| 5337 | #define DDRSS2_PHY_187_DATA 0x00000000 |
| 5338 | #define DDRSS2_PHY_188_DATA 0x00000000 |
| 5339 | #define DDRSS2_PHY_189_DATA 0x00000000 |
| 5340 | #define DDRSS2_PHY_190_DATA 0x00000000 |
| 5341 | #define DDRSS2_PHY_191_DATA 0x00000000 |
| 5342 | #define DDRSS2_PHY_192_DATA 0x00000000 |
| 5343 | #define DDRSS2_PHY_193_DATA 0x00000000 |
| 5344 | #define DDRSS2_PHY_194_DATA 0x00000000 |
| 5345 | #define DDRSS2_PHY_195_DATA 0x00000000 |
| 5346 | #define DDRSS2_PHY_196_DATA 0x00000000 |
| 5347 | #define DDRSS2_PHY_197_DATA 0x00000000 |
| 5348 | #define DDRSS2_PHY_198_DATA 0x00000000 |
| 5349 | #define DDRSS2_PHY_199_DATA 0x00000000 |
| 5350 | #define DDRSS2_PHY_200_DATA 0x00000000 |
| 5351 | #define DDRSS2_PHY_201_DATA 0x00000000 |
| 5352 | #define DDRSS2_PHY_202_DATA 0x00000000 |
| 5353 | #define DDRSS2_PHY_203_DATA 0x00000000 |
| 5354 | #define DDRSS2_PHY_204_DATA 0x00000000 |
| 5355 | #define DDRSS2_PHY_205_DATA 0x00000000 |
| 5356 | #define DDRSS2_PHY_206_DATA 0x00000000 |
| 5357 | #define DDRSS2_PHY_207_DATA 0x00000000 |
| 5358 | #define DDRSS2_PHY_208_DATA 0x00000000 |
| 5359 | #define DDRSS2_PHY_209_DATA 0x00000000 |
| 5360 | #define DDRSS2_PHY_210_DATA 0x00000000 |
| 5361 | #define DDRSS2_PHY_211_DATA 0x00000000 |
| 5362 | #define DDRSS2_PHY_212_DATA 0x00000000 |
| 5363 | #define DDRSS2_PHY_213_DATA 0x00000000 |
| 5364 | #define DDRSS2_PHY_214_DATA 0x00000000 |
| 5365 | #define DDRSS2_PHY_215_DATA 0x00000000 |
| 5366 | #define DDRSS2_PHY_216_DATA 0x00000000 |
| 5367 | #define DDRSS2_PHY_217_DATA 0x00000000 |
| 5368 | #define DDRSS2_PHY_218_DATA 0x00000000 |
| 5369 | #define DDRSS2_PHY_219_DATA 0x00000000 |
| 5370 | #define DDRSS2_PHY_220_DATA 0x00000000 |
| 5371 | #define DDRSS2_PHY_221_DATA 0x00000000 |
| 5372 | #define DDRSS2_PHY_222_DATA 0x00000000 |
| 5373 | #define DDRSS2_PHY_223_DATA 0x00000000 |
| 5374 | #define DDRSS2_PHY_224_DATA 0x00000000 |
| 5375 | #define DDRSS2_PHY_225_DATA 0x00000000 |
| 5376 | #define DDRSS2_PHY_226_DATA 0x00000000 |
| 5377 | #define DDRSS2_PHY_227_DATA 0x00000000 |
| 5378 | #define DDRSS2_PHY_228_DATA 0x00000000 |
| 5379 | #define DDRSS2_PHY_229_DATA 0x00000000 |
| 5380 | #define DDRSS2_PHY_230_DATA 0x00000000 |
| 5381 | #define DDRSS2_PHY_231_DATA 0x00000000 |
| 5382 | #define DDRSS2_PHY_232_DATA 0x00000000 |
| 5383 | #define DDRSS2_PHY_233_DATA 0x00000000 |
| 5384 | #define DDRSS2_PHY_234_DATA 0x00000000 |
| 5385 | #define DDRSS2_PHY_235_DATA 0x00000000 |
| 5386 | #define DDRSS2_PHY_236_DATA 0x00000000 |
| 5387 | #define DDRSS2_PHY_237_DATA 0x00000000 |
| 5388 | #define DDRSS2_PHY_238_DATA 0x00000000 |
| 5389 | #define DDRSS2_PHY_239_DATA 0x00000000 |
| 5390 | #define DDRSS2_PHY_240_DATA 0x00000000 |
| 5391 | #define DDRSS2_PHY_241_DATA 0x00000000 |
| 5392 | #define DDRSS2_PHY_242_DATA 0x00000000 |
| 5393 | #define DDRSS2_PHY_243_DATA 0x00000000 |
| 5394 | #define DDRSS2_PHY_244_DATA 0x00000000 |
| 5395 | #define DDRSS2_PHY_245_DATA 0x00000000 |
| 5396 | #define DDRSS2_PHY_246_DATA 0x00000000 |
| 5397 | #define DDRSS2_PHY_247_DATA 0x00000000 |
| 5398 | #define DDRSS2_PHY_248_DATA 0x00000000 |
| 5399 | #define DDRSS2_PHY_249_DATA 0x00000000 |
| 5400 | #define DDRSS2_PHY_250_DATA 0x00000000 |
| 5401 | #define DDRSS2_PHY_251_DATA 0x00000000 |
| 5402 | #define DDRSS2_PHY_252_DATA 0x00000000 |
| 5403 | #define DDRSS2_PHY_253_DATA 0x00000000 |
| 5404 | #define DDRSS2_PHY_254_DATA 0x00000000 |
| 5405 | #define DDRSS2_PHY_255_DATA 0x00000000 |
| 5406 | #define DDRSS2_PHY_256_DATA 0x000004F0 |
| 5407 | #define DDRSS2_PHY_257_DATA 0x00000000 |
| 5408 | #define DDRSS2_PHY_258_DATA 0x00030200 |
| 5409 | #define DDRSS2_PHY_259_DATA 0x00000000 |
| 5410 | #define DDRSS2_PHY_260_DATA 0x00000000 |
| 5411 | #define DDRSS2_PHY_261_DATA 0x01030000 |
| 5412 | #define DDRSS2_PHY_262_DATA 0x00010000 |
| 5413 | #define DDRSS2_PHY_263_DATA 0x01030004 |
| 5414 | #define DDRSS2_PHY_264_DATA 0x01000000 |
| 5415 | #define DDRSS2_PHY_265_DATA 0x00000000 |
| 5416 | #define DDRSS2_PHY_266_DATA 0x00000000 |
| 5417 | #define DDRSS2_PHY_267_DATA 0x01000001 |
| 5418 | #define DDRSS2_PHY_268_DATA 0x00000100 |
| 5419 | #define DDRSS2_PHY_269_DATA 0x000800C0 |
| 5420 | #define DDRSS2_PHY_270_DATA 0x060100CC |
| 5421 | #define DDRSS2_PHY_271_DATA 0x00030066 |
| 5422 | #define DDRSS2_PHY_272_DATA 0x00000000 |
| 5423 | #define DDRSS2_PHY_273_DATA 0x00000301 |
| 5424 | #define DDRSS2_PHY_274_DATA 0x0000AAAA |
| 5425 | #define DDRSS2_PHY_275_DATA 0x00005555 |
| 5426 | #define DDRSS2_PHY_276_DATA 0x0000B5B5 |
| 5427 | #define DDRSS2_PHY_277_DATA 0x00004A4A |
| 5428 | #define DDRSS2_PHY_278_DATA 0x00005656 |
| 5429 | #define DDRSS2_PHY_279_DATA 0x0000A9A9 |
| 5430 | #define DDRSS2_PHY_280_DATA 0x0000A9A9 |
| 5431 | #define DDRSS2_PHY_281_DATA 0x0000B5B5 |
| 5432 | #define DDRSS2_PHY_282_DATA 0x00000000 |
| 5433 | #define DDRSS2_PHY_283_DATA 0x00000000 |
| 5434 | #define DDRSS2_PHY_284_DATA 0x2A000000 |
| 5435 | #define DDRSS2_PHY_285_DATA 0x00000808 |
| 5436 | #define DDRSS2_PHY_286_DATA 0x0F000000 |
| 5437 | #define DDRSS2_PHY_287_DATA 0x00000F0F |
| 5438 | #define DDRSS2_PHY_288_DATA 0x10400000 |
| 5439 | #define DDRSS2_PHY_289_DATA 0x0C002006 |
| 5440 | #define DDRSS2_PHY_290_DATA 0x00000000 |
| 5441 | #define DDRSS2_PHY_291_DATA 0x00000000 |
| 5442 | #define DDRSS2_PHY_292_DATA 0x55555555 |
| 5443 | #define DDRSS2_PHY_293_DATA 0xAAAAAAAA |
| 5444 | #define DDRSS2_PHY_294_DATA 0x55555555 |
| 5445 | #define DDRSS2_PHY_295_DATA 0xAAAAAAAA |
| 5446 | #define DDRSS2_PHY_296_DATA 0x00005555 |
| 5447 | #define DDRSS2_PHY_297_DATA 0x01000100 |
| 5448 | #define DDRSS2_PHY_298_DATA 0x00800180 |
| 5449 | #define DDRSS2_PHY_299_DATA 0x00000000 |
| 5450 | #define DDRSS2_PHY_300_DATA 0x00000000 |
| 5451 | #define DDRSS2_PHY_301_DATA 0x00000000 |
| 5452 | #define DDRSS2_PHY_302_DATA 0x00000000 |
| 5453 | #define DDRSS2_PHY_303_DATA 0x00000000 |
| 5454 | #define DDRSS2_PHY_304_DATA 0x00000000 |
| 5455 | #define DDRSS2_PHY_305_DATA 0x00000000 |
| 5456 | #define DDRSS2_PHY_306_DATA 0x00000000 |
| 5457 | #define DDRSS2_PHY_307_DATA 0x00000000 |
| 5458 | #define DDRSS2_PHY_308_DATA 0x00000000 |
| 5459 | #define DDRSS2_PHY_309_DATA 0x00000000 |
| 5460 | #define DDRSS2_PHY_310_DATA 0x00000000 |
| 5461 | #define DDRSS2_PHY_311_DATA 0x00000000 |
| 5462 | #define DDRSS2_PHY_312_DATA 0x00000000 |
| 5463 | #define DDRSS2_PHY_313_DATA 0x00000000 |
| 5464 | #define DDRSS2_PHY_314_DATA 0x00000000 |
| 5465 | #define DDRSS2_PHY_315_DATA 0x00000000 |
| 5466 | #define DDRSS2_PHY_316_DATA 0x00000000 |
| 5467 | #define DDRSS2_PHY_317_DATA 0x00000000 |
| 5468 | #define DDRSS2_PHY_318_DATA 0x00000000 |
| 5469 | #define DDRSS2_PHY_319_DATA 0x00000000 |
| 5470 | #define DDRSS2_PHY_320_DATA 0x00000000 |
| 5471 | #define DDRSS2_PHY_321_DATA 0x00000000 |
| 5472 | #define DDRSS2_PHY_322_DATA 0x00000104 |
| 5473 | #define DDRSS2_PHY_323_DATA 0x00000120 |
| 5474 | #define DDRSS2_PHY_324_DATA 0x00000000 |
| 5475 | #define DDRSS2_PHY_325_DATA 0x00000000 |
| 5476 | #define DDRSS2_PHY_326_DATA 0x00000000 |
| 5477 | #define DDRSS2_PHY_327_DATA 0x00000000 |
| 5478 | #define DDRSS2_PHY_328_DATA 0x00000000 |
| 5479 | #define DDRSS2_PHY_329_DATA 0x00000000 |
| 5480 | #define DDRSS2_PHY_330_DATA 0x00000000 |
| 5481 | #define DDRSS2_PHY_331_DATA 0x00000001 |
| 5482 | #define DDRSS2_PHY_332_DATA 0x07FF0000 |
| 5483 | #define DDRSS2_PHY_333_DATA 0x0080081F |
| 5484 | #define DDRSS2_PHY_334_DATA 0x00081020 |
| 5485 | #define DDRSS2_PHY_335_DATA 0x04010000 |
| 5486 | #define DDRSS2_PHY_336_DATA 0x00000000 |
| 5487 | #define DDRSS2_PHY_337_DATA 0x00000000 |
| 5488 | #define DDRSS2_PHY_338_DATA 0x00000000 |
| 5489 | #define DDRSS2_PHY_339_DATA 0x00000100 |
| 5490 | #define DDRSS2_PHY_340_DATA 0x01CC0C01 |
| 5491 | #define DDRSS2_PHY_341_DATA 0x1003CC0C |
| 5492 | #define DDRSS2_PHY_342_DATA 0x20000140 |
| 5493 | #define DDRSS2_PHY_343_DATA 0x07FF0200 |
| 5494 | #define DDRSS2_PHY_344_DATA 0x0000DD01 |
| 5495 | #define DDRSS2_PHY_345_DATA 0x10100303 |
| 5496 | #define DDRSS2_PHY_346_DATA 0x10101010 |
| 5497 | #define DDRSS2_PHY_347_DATA 0x10101010 |
| 5498 | #define DDRSS2_PHY_348_DATA 0x00021010 |
| 5499 | #define DDRSS2_PHY_349_DATA 0x00100010 |
| 5500 | #define DDRSS2_PHY_350_DATA 0x00100010 |
| 5501 | #define DDRSS2_PHY_351_DATA 0x00100010 |
| 5502 | #define DDRSS2_PHY_352_DATA 0x00100010 |
| 5503 | #define DDRSS2_PHY_353_DATA 0x00050010 |
| 5504 | #define DDRSS2_PHY_354_DATA 0x51517041 |
| 5505 | #define DDRSS2_PHY_355_DATA 0x31C06001 |
| 5506 | #define DDRSS2_PHY_356_DATA 0x07AB0340 |
| 5507 | #define DDRSS2_PHY_357_DATA 0x00C0C001 |
| 5508 | #define DDRSS2_PHY_358_DATA 0x0E0D0001 |
| 5509 | #define DDRSS2_PHY_359_DATA 0x10001000 |
| 5510 | #define DDRSS2_PHY_360_DATA 0x0C083E42 |
| 5511 | #define DDRSS2_PHY_361_DATA 0x0F0C3701 |
| 5512 | #define DDRSS2_PHY_362_DATA 0x01000140 |
| 5513 | #define DDRSS2_PHY_363_DATA 0x0C000420 |
| 5514 | #define DDRSS2_PHY_364_DATA 0x00000198 |
| 5515 | #define DDRSS2_PHY_365_DATA 0x0A0000D0 |
| 5516 | #define DDRSS2_PHY_366_DATA 0x00030200 |
| 5517 | #define DDRSS2_PHY_367_DATA 0x02800000 |
| 5518 | #define DDRSS2_PHY_368_DATA 0x80800000 |
| 5519 | #define DDRSS2_PHY_369_DATA 0x000E2010 |
| 5520 | #define DDRSS2_PHY_370_DATA 0x76543210 |
| 5521 | #define DDRSS2_PHY_371_DATA 0x00000008 |
| 5522 | #define DDRSS2_PHY_372_DATA 0x02800280 |
| 5523 | #define DDRSS2_PHY_373_DATA 0x02800280 |
| 5524 | #define DDRSS2_PHY_374_DATA 0x02800280 |
| 5525 | #define DDRSS2_PHY_375_DATA 0x02800280 |
| 5526 | #define DDRSS2_PHY_376_DATA 0x00000280 |
| 5527 | #define DDRSS2_PHY_377_DATA 0x0000A000 |
| 5528 | #define DDRSS2_PHY_378_DATA 0x00A000A0 |
| 5529 | #define DDRSS2_PHY_379_DATA 0x00A000A0 |
| 5530 | #define DDRSS2_PHY_380_DATA 0x00A000A0 |
| 5531 | #define DDRSS2_PHY_381_DATA 0x00A000A0 |
| 5532 | #define DDRSS2_PHY_382_DATA 0x00A000A0 |
| 5533 | #define DDRSS2_PHY_383_DATA 0x00A000A0 |
| 5534 | #define DDRSS2_PHY_384_DATA 0x00A000A0 |
| 5535 | #define DDRSS2_PHY_385_DATA 0x00A000A0 |
| 5536 | #define DDRSS2_PHY_386_DATA 0x01C200A0 |
| 5537 | #define DDRSS2_PHY_387_DATA 0x01A00005 |
| 5538 | #define DDRSS2_PHY_388_DATA 0x00000000 |
| 5539 | #define DDRSS2_PHY_389_DATA 0x00000000 |
| 5540 | #define DDRSS2_PHY_390_DATA 0x00080200 |
| 5541 | #define DDRSS2_PHY_391_DATA 0x00000000 |
| 5542 | #define DDRSS2_PHY_392_DATA 0x20202000 |
| 5543 | #define DDRSS2_PHY_393_DATA 0x20202020 |
| 5544 | #define DDRSS2_PHY_394_DATA 0xF0F02020 |
| 5545 | #define DDRSS2_PHY_395_DATA 0x00000000 |
| 5546 | #define DDRSS2_PHY_396_DATA 0x00000000 |
| 5547 | #define DDRSS2_PHY_397_DATA 0x00000000 |
| 5548 | #define DDRSS2_PHY_398_DATA 0x00000000 |
| 5549 | #define DDRSS2_PHY_399_DATA 0x00000000 |
| 5550 | #define DDRSS2_PHY_400_DATA 0x00000000 |
| 5551 | #define DDRSS2_PHY_401_DATA 0x00000000 |
| 5552 | #define DDRSS2_PHY_402_DATA 0x00000000 |
| 5553 | #define DDRSS2_PHY_403_DATA 0x00000000 |
| 5554 | #define DDRSS2_PHY_404_DATA 0x00000000 |
| 5555 | #define DDRSS2_PHY_405_DATA 0x00000000 |
| 5556 | #define DDRSS2_PHY_406_DATA 0x00000000 |
| 5557 | #define DDRSS2_PHY_407_DATA 0x00000000 |
| 5558 | #define DDRSS2_PHY_408_DATA 0x00000000 |
| 5559 | #define DDRSS2_PHY_409_DATA 0x00000000 |
| 5560 | #define DDRSS2_PHY_410_DATA 0x00000000 |
| 5561 | #define DDRSS2_PHY_411_DATA 0x00000000 |
| 5562 | #define DDRSS2_PHY_412_DATA 0x00000000 |
| 5563 | #define DDRSS2_PHY_413_DATA 0x00000000 |
| 5564 | #define DDRSS2_PHY_414_DATA 0x00000000 |
| 5565 | #define DDRSS2_PHY_415_DATA 0x00000000 |
| 5566 | #define DDRSS2_PHY_416_DATA 0x00000000 |
| 5567 | #define DDRSS2_PHY_417_DATA 0x00000000 |
| 5568 | #define DDRSS2_PHY_418_DATA 0x00000000 |
| 5569 | #define DDRSS2_PHY_419_DATA 0x00000000 |
| 5570 | #define DDRSS2_PHY_420_DATA 0x00000000 |
| 5571 | #define DDRSS2_PHY_421_DATA 0x00000000 |
| 5572 | #define DDRSS2_PHY_422_DATA 0x00000000 |
| 5573 | #define DDRSS2_PHY_423_DATA 0x00000000 |
| 5574 | #define DDRSS2_PHY_424_DATA 0x00000000 |
| 5575 | #define DDRSS2_PHY_425_DATA 0x00000000 |
| 5576 | #define DDRSS2_PHY_426_DATA 0x00000000 |
| 5577 | #define DDRSS2_PHY_427_DATA 0x00000000 |
| 5578 | #define DDRSS2_PHY_428_DATA 0x00000000 |
| 5579 | #define DDRSS2_PHY_429_DATA 0x00000000 |
| 5580 | #define DDRSS2_PHY_430_DATA 0x00000000 |
| 5581 | #define DDRSS2_PHY_431_DATA 0x00000000 |
| 5582 | #define DDRSS2_PHY_432_DATA 0x00000000 |
| 5583 | #define DDRSS2_PHY_433_DATA 0x00000000 |
| 5584 | #define DDRSS2_PHY_434_DATA 0x00000000 |
| 5585 | #define DDRSS2_PHY_435_DATA 0x00000000 |
| 5586 | #define DDRSS2_PHY_436_DATA 0x00000000 |
| 5587 | #define DDRSS2_PHY_437_DATA 0x00000000 |
| 5588 | #define DDRSS2_PHY_438_DATA 0x00000000 |
| 5589 | #define DDRSS2_PHY_439_DATA 0x00000000 |
| 5590 | #define DDRSS2_PHY_440_DATA 0x00000000 |
| 5591 | #define DDRSS2_PHY_441_DATA 0x00000000 |
| 5592 | #define DDRSS2_PHY_442_DATA 0x00000000 |
| 5593 | #define DDRSS2_PHY_443_DATA 0x00000000 |
| 5594 | #define DDRSS2_PHY_444_DATA 0x00000000 |
| 5595 | #define DDRSS2_PHY_445_DATA 0x00000000 |
| 5596 | #define DDRSS2_PHY_446_DATA 0x00000000 |
| 5597 | #define DDRSS2_PHY_447_DATA 0x00000000 |
| 5598 | #define DDRSS2_PHY_448_DATA 0x00000000 |
| 5599 | #define DDRSS2_PHY_449_DATA 0x00000000 |
| 5600 | #define DDRSS2_PHY_450_DATA 0x00000000 |
| 5601 | #define DDRSS2_PHY_451_DATA 0x00000000 |
| 5602 | #define DDRSS2_PHY_452_DATA 0x00000000 |
| 5603 | #define DDRSS2_PHY_453_DATA 0x00000000 |
| 5604 | #define DDRSS2_PHY_454_DATA 0x00000000 |
| 5605 | #define DDRSS2_PHY_455_DATA 0x00000000 |
| 5606 | #define DDRSS2_PHY_456_DATA 0x00000000 |
| 5607 | #define DDRSS2_PHY_457_DATA 0x00000000 |
| 5608 | #define DDRSS2_PHY_458_DATA 0x00000000 |
| 5609 | #define DDRSS2_PHY_459_DATA 0x00000000 |
| 5610 | #define DDRSS2_PHY_460_DATA 0x00000000 |
| 5611 | #define DDRSS2_PHY_461_DATA 0x00000000 |
| 5612 | #define DDRSS2_PHY_462_DATA 0x00000000 |
| 5613 | #define DDRSS2_PHY_463_DATA 0x00000000 |
| 5614 | #define DDRSS2_PHY_464_DATA 0x00000000 |
| 5615 | #define DDRSS2_PHY_465_DATA 0x00000000 |
| 5616 | #define DDRSS2_PHY_466_DATA 0x00000000 |
| 5617 | #define DDRSS2_PHY_467_DATA 0x00000000 |
| 5618 | #define DDRSS2_PHY_468_DATA 0x00000000 |
| 5619 | #define DDRSS2_PHY_469_DATA 0x00000000 |
| 5620 | #define DDRSS2_PHY_470_DATA 0x00000000 |
| 5621 | #define DDRSS2_PHY_471_DATA 0x00000000 |
| 5622 | #define DDRSS2_PHY_472_DATA 0x00000000 |
| 5623 | #define DDRSS2_PHY_473_DATA 0x00000000 |
| 5624 | #define DDRSS2_PHY_474_DATA 0x00000000 |
| 5625 | #define DDRSS2_PHY_475_DATA 0x00000000 |
| 5626 | #define DDRSS2_PHY_476_DATA 0x00000000 |
| 5627 | #define DDRSS2_PHY_477_DATA 0x00000000 |
| 5628 | #define DDRSS2_PHY_478_DATA 0x00000000 |
| 5629 | #define DDRSS2_PHY_479_DATA 0x00000000 |
| 5630 | #define DDRSS2_PHY_480_DATA 0x00000000 |
| 5631 | #define DDRSS2_PHY_481_DATA 0x00000000 |
| 5632 | #define DDRSS2_PHY_482_DATA 0x00000000 |
| 5633 | #define DDRSS2_PHY_483_DATA 0x00000000 |
| 5634 | #define DDRSS2_PHY_484_DATA 0x00000000 |
| 5635 | #define DDRSS2_PHY_485_DATA 0x00000000 |
| 5636 | #define DDRSS2_PHY_486_DATA 0x00000000 |
| 5637 | #define DDRSS2_PHY_487_DATA 0x00000000 |
| 5638 | #define DDRSS2_PHY_488_DATA 0x00000000 |
| 5639 | #define DDRSS2_PHY_489_DATA 0x00000000 |
| 5640 | #define DDRSS2_PHY_490_DATA 0x00000000 |
| 5641 | #define DDRSS2_PHY_491_DATA 0x00000000 |
| 5642 | #define DDRSS2_PHY_492_DATA 0x00000000 |
| 5643 | #define DDRSS2_PHY_493_DATA 0x00000000 |
| 5644 | #define DDRSS2_PHY_494_DATA 0x00000000 |
| 5645 | #define DDRSS2_PHY_495_DATA 0x00000000 |
| 5646 | #define DDRSS2_PHY_496_DATA 0x00000000 |
| 5647 | #define DDRSS2_PHY_497_DATA 0x00000000 |
| 5648 | #define DDRSS2_PHY_498_DATA 0x00000000 |
| 5649 | #define DDRSS2_PHY_499_DATA 0x00000000 |
| 5650 | #define DDRSS2_PHY_500_DATA 0x00000000 |
| 5651 | #define DDRSS2_PHY_501_DATA 0x00000000 |
| 5652 | #define DDRSS2_PHY_502_DATA 0x00000000 |
| 5653 | #define DDRSS2_PHY_503_DATA 0x00000000 |
| 5654 | #define DDRSS2_PHY_504_DATA 0x00000000 |
| 5655 | #define DDRSS2_PHY_505_DATA 0x00000000 |
| 5656 | #define DDRSS2_PHY_506_DATA 0x00000000 |
| 5657 | #define DDRSS2_PHY_507_DATA 0x00000000 |
| 5658 | #define DDRSS2_PHY_508_DATA 0x00000000 |
| 5659 | #define DDRSS2_PHY_509_DATA 0x00000000 |
| 5660 | #define DDRSS2_PHY_510_DATA 0x00000000 |
| 5661 | #define DDRSS2_PHY_511_DATA 0x00000000 |
| 5662 | #define DDRSS2_PHY_512_DATA 0x000004F0 |
| 5663 | #define DDRSS2_PHY_513_DATA 0x00000000 |
| 5664 | #define DDRSS2_PHY_514_DATA 0x00030200 |
| 5665 | #define DDRSS2_PHY_515_DATA 0x00000000 |
| 5666 | #define DDRSS2_PHY_516_DATA 0x00000000 |
| 5667 | #define DDRSS2_PHY_517_DATA 0x01030000 |
| 5668 | #define DDRSS2_PHY_518_DATA 0x00010000 |
| 5669 | #define DDRSS2_PHY_519_DATA 0x01030004 |
| 5670 | #define DDRSS2_PHY_520_DATA 0x01000000 |
| 5671 | #define DDRSS2_PHY_521_DATA 0x00000000 |
| 5672 | #define DDRSS2_PHY_522_DATA 0x00000000 |
| 5673 | #define DDRSS2_PHY_523_DATA 0x01000001 |
| 5674 | #define DDRSS2_PHY_524_DATA 0x00000100 |
| 5675 | #define DDRSS2_PHY_525_DATA 0x000800C0 |
| 5676 | #define DDRSS2_PHY_526_DATA 0x060100CC |
| 5677 | #define DDRSS2_PHY_527_DATA 0x00030066 |
| 5678 | #define DDRSS2_PHY_528_DATA 0x00000000 |
| 5679 | #define DDRSS2_PHY_529_DATA 0x00000301 |
| 5680 | #define DDRSS2_PHY_530_DATA 0x0000AAAA |
| 5681 | #define DDRSS2_PHY_531_DATA 0x00005555 |
| 5682 | #define DDRSS2_PHY_532_DATA 0x0000B5B5 |
| 5683 | #define DDRSS2_PHY_533_DATA 0x00004A4A |
| 5684 | #define DDRSS2_PHY_534_DATA 0x00005656 |
| 5685 | #define DDRSS2_PHY_535_DATA 0x0000A9A9 |
| 5686 | #define DDRSS2_PHY_536_DATA 0x0000A9A9 |
| 5687 | #define DDRSS2_PHY_537_DATA 0x0000B5B5 |
| 5688 | #define DDRSS2_PHY_538_DATA 0x00000000 |
| 5689 | #define DDRSS2_PHY_539_DATA 0x00000000 |
| 5690 | #define DDRSS2_PHY_540_DATA 0x2A000000 |
| 5691 | #define DDRSS2_PHY_541_DATA 0x00000808 |
| 5692 | #define DDRSS2_PHY_542_DATA 0x0F000000 |
| 5693 | #define DDRSS2_PHY_543_DATA 0x00000F0F |
| 5694 | #define DDRSS2_PHY_544_DATA 0x10400000 |
| 5695 | #define DDRSS2_PHY_545_DATA 0x0C002006 |
| 5696 | #define DDRSS2_PHY_546_DATA 0x00000000 |
| 5697 | #define DDRSS2_PHY_547_DATA 0x00000000 |
| 5698 | #define DDRSS2_PHY_548_DATA 0x55555555 |
| 5699 | #define DDRSS2_PHY_549_DATA 0xAAAAAAAA |
| 5700 | #define DDRSS2_PHY_550_DATA 0x55555555 |
| 5701 | #define DDRSS2_PHY_551_DATA 0xAAAAAAAA |
| 5702 | #define DDRSS2_PHY_552_DATA 0x00005555 |
| 5703 | #define DDRSS2_PHY_553_DATA 0x01000100 |
| 5704 | #define DDRSS2_PHY_554_DATA 0x00800180 |
| 5705 | #define DDRSS2_PHY_555_DATA 0x00000001 |
| 5706 | #define DDRSS2_PHY_556_DATA 0x00000000 |
| 5707 | #define DDRSS2_PHY_557_DATA 0x00000000 |
| 5708 | #define DDRSS2_PHY_558_DATA 0x00000000 |
| 5709 | #define DDRSS2_PHY_559_DATA 0x00000000 |
| 5710 | #define DDRSS2_PHY_560_DATA 0x00000000 |
| 5711 | #define DDRSS2_PHY_561_DATA 0x00000000 |
| 5712 | #define DDRSS2_PHY_562_DATA 0x00000000 |
| 5713 | #define DDRSS2_PHY_563_DATA 0x00000000 |
| 5714 | #define DDRSS2_PHY_564_DATA 0x00000000 |
| 5715 | #define DDRSS2_PHY_565_DATA 0x00000000 |
| 5716 | #define DDRSS2_PHY_566_DATA 0x00000000 |
| 5717 | #define DDRSS2_PHY_567_DATA 0x00000000 |
| 5718 | #define DDRSS2_PHY_568_DATA 0x00000000 |
| 5719 | #define DDRSS2_PHY_569_DATA 0x00000000 |
| 5720 | #define DDRSS2_PHY_570_DATA 0x00000000 |
| 5721 | #define DDRSS2_PHY_571_DATA 0x00000000 |
| 5722 | #define DDRSS2_PHY_572_DATA 0x00000000 |
| 5723 | #define DDRSS2_PHY_573_DATA 0x00000000 |
| 5724 | #define DDRSS2_PHY_574_DATA 0x00000000 |
| 5725 | #define DDRSS2_PHY_575_DATA 0x00000000 |
| 5726 | #define DDRSS2_PHY_576_DATA 0x00000000 |
| 5727 | #define DDRSS2_PHY_577_DATA 0x00000000 |
| 5728 | #define DDRSS2_PHY_578_DATA 0x00000104 |
| 5729 | #define DDRSS2_PHY_579_DATA 0x00000120 |
| 5730 | #define DDRSS2_PHY_580_DATA 0x00000000 |
| 5731 | #define DDRSS2_PHY_581_DATA 0x00000000 |
| 5732 | #define DDRSS2_PHY_582_DATA 0x00000000 |
| 5733 | #define DDRSS2_PHY_583_DATA 0x00000000 |
| 5734 | #define DDRSS2_PHY_584_DATA 0x00000000 |
| 5735 | #define DDRSS2_PHY_585_DATA 0x00000000 |
| 5736 | #define DDRSS2_PHY_586_DATA 0x00000000 |
| 5737 | #define DDRSS2_PHY_587_DATA 0x00000001 |
| 5738 | #define DDRSS2_PHY_588_DATA 0x07FF0000 |
| 5739 | #define DDRSS2_PHY_589_DATA 0x0080081F |
| 5740 | #define DDRSS2_PHY_590_DATA 0x00081020 |
| 5741 | #define DDRSS2_PHY_591_DATA 0x04010000 |
| 5742 | #define DDRSS2_PHY_592_DATA 0x00000000 |
| 5743 | #define DDRSS2_PHY_593_DATA 0x00000000 |
| 5744 | #define DDRSS2_PHY_594_DATA 0x00000000 |
| 5745 | #define DDRSS2_PHY_595_DATA 0x00000100 |
| 5746 | #define DDRSS2_PHY_596_DATA 0x01CC0C01 |
| 5747 | #define DDRSS2_PHY_597_DATA 0x1003CC0C |
| 5748 | #define DDRSS2_PHY_598_DATA 0x20000140 |
| 5749 | #define DDRSS2_PHY_599_DATA 0x07FF0200 |
| 5750 | #define DDRSS2_PHY_600_DATA 0x0000DD01 |
| 5751 | #define DDRSS2_PHY_601_DATA 0x10100303 |
| 5752 | #define DDRSS2_PHY_602_DATA 0x10101010 |
| 5753 | #define DDRSS2_PHY_603_DATA 0x10101010 |
| 5754 | #define DDRSS2_PHY_604_DATA 0x00021010 |
| 5755 | #define DDRSS2_PHY_605_DATA 0x00100010 |
| 5756 | #define DDRSS2_PHY_606_DATA 0x00100010 |
| 5757 | #define DDRSS2_PHY_607_DATA 0x00100010 |
| 5758 | #define DDRSS2_PHY_608_DATA 0x00100010 |
| 5759 | #define DDRSS2_PHY_609_DATA 0x00050010 |
| 5760 | #define DDRSS2_PHY_610_DATA 0x51517041 |
| 5761 | #define DDRSS2_PHY_611_DATA 0x31C06001 |
| 5762 | #define DDRSS2_PHY_612_DATA 0x07AB0340 |
| 5763 | #define DDRSS2_PHY_613_DATA 0x00C0C001 |
| 5764 | #define DDRSS2_PHY_614_DATA 0x0E0D0001 |
| 5765 | #define DDRSS2_PHY_615_DATA 0x10001000 |
| 5766 | #define DDRSS2_PHY_616_DATA 0x0C083E42 |
| 5767 | #define DDRSS2_PHY_617_DATA 0x0F0C3701 |
| 5768 | #define DDRSS2_PHY_618_DATA 0x01000140 |
| 5769 | #define DDRSS2_PHY_619_DATA 0x0C000420 |
| 5770 | #define DDRSS2_PHY_620_DATA 0x00000198 |
| 5771 | #define DDRSS2_PHY_621_DATA 0x0A0000D0 |
| 5772 | #define DDRSS2_PHY_622_DATA 0x00030200 |
| 5773 | #define DDRSS2_PHY_623_DATA 0x02800000 |
| 5774 | #define DDRSS2_PHY_624_DATA 0x80800000 |
| 5775 | #define DDRSS2_PHY_625_DATA 0x000E2010 |
| 5776 | #define DDRSS2_PHY_626_DATA 0x76543210 |
| 5777 | #define DDRSS2_PHY_627_DATA 0x00000008 |
| 5778 | #define DDRSS2_PHY_628_DATA 0x02800280 |
| 5779 | #define DDRSS2_PHY_629_DATA 0x02800280 |
| 5780 | #define DDRSS2_PHY_630_DATA 0x02800280 |
| 5781 | #define DDRSS2_PHY_631_DATA 0x02800280 |
| 5782 | #define DDRSS2_PHY_632_DATA 0x00000280 |
| 5783 | #define DDRSS2_PHY_633_DATA 0x0000A000 |
| 5784 | #define DDRSS2_PHY_634_DATA 0x00A000A0 |
| 5785 | #define DDRSS2_PHY_635_DATA 0x00A000A0 |
| 5786 | #define DDRSS2_PHY_636_DATA 0x00A000A0 |
| 5787 | #define DDRSS2_PHY_637_DATA 0x00A000A0 |
| 5788 | #define DDRSS2_PHY_638_DATA 0x00A000A0 |
| 5789 | #define DDRSS2_PHY_639_DATA 0x00A000A0 |
| 5790 | #define DDRSS2_PHY_640_DATA 0x00A000A0 |
| 5791 | #define DDRSS2_PHY_641_DATA 0x00A000A0 |
| 5792 | #define DDRSS2_PHY_642_DATA 0x01C200A0 |
| 5793 | #define DDRSS2_PHY_643_DATA 0x01A00005 |
| 5794 | #define DDRSS2_PHY_644_DATA 0x00000000 |
| 5795 | #define DDRSS2_PHY_645_DATA 0x00000000 |
| 5796 | #define DDRSS2_PHY_646_DATA 0x00080200 |
| 5797 | #define DDRSS2_PHY_647_DATA 0x00000000 |
| 5798 | #define DDRSS2_PHY_648_DATA 0x20202000 |
| 5799 | #define DDRSS2_PHY_649_DATA 0x20202020 |
| 5800 | #define DDRSS2_PHY_650_DATA 0xF0F02020 |
| 5801 | #define DDRSS2_PHY_651_DATA 0x00000000 |
| 5802 | #define DDRSS2_PHY_652_DATA 0x00000000 |
| 5803 | #define DDRSS2_PHY_653_DATA 0x00000000 |
| 5804 | #define DDRSS2_PHY_654_DATA 0x00000000 |
| 5805 | #define DDRSS2_PHY_655_DATA 0x00000000 |
| 5806 | #define DDRSS2_PHY_656_DATA 0x00000000 |
| 5807 | #define DDRSS2_PHY_657_DATA 0x00000000 |
| 5808 | #define DDRSS2_PHY_658_DATA 0x00000000 |
| 5809 | #define DDRSS2_PHY_659_DATA 0x00000000 |
| 5810 | #define DDRSS2_PHY_660_DATA 0x00000000 |
| 5811 | #define DDRSS2_PHY_661_DATA 0x00000000 |
| 5812 | #define DDRSS2_PHY_662_DATA 0x00000000 |
| 5813 | #define DDRSS2_PHY_663_DATA 0x00000000 |
| 5814 | #define DDRSS2_PHY_664_DATA 0x00000000 |
| 5815 | #define DDRSS2_PHY_665_DATA 0x00000000 |
| 5816 | #define DDRSS2_PHY_666_DATA 0x00000000 |
| 5817 | #define DDRSS2_PHY_667_DATA 0x00000000 |
| 5818 | #define DDRSS2_PHY_668_DATA 0x00000000 |
| 5819 | #define DDRSS2_PHY_669_DATA 0x00000000 |
| 5820 | #define DDRSS2_PHY_670_DATA 0x00000000 |
| 5821 | #define DDRSS2_PHY_671_DATA 0x00000000 |
| 5822 | #define DDRSS2_PHY_672_DATA 0x00000000 |
| 5823 | #define DDRSS2_PHY_673_DATA 0x00000000 |
| 5824 | #define DDRSS2_PHY_674_DATA 0x00000000 |
| 5825 | #define DDRSS2_PHY_675_DATA 0x00000000 |
| 5826 | #define DDRSS2_PHY_676_DATA 0x00000000 |
| 5827 | #define DDRSS2_PHY_677_DATA 0x00000000 |
| 5828 | #define DDRSS2_PHY_678_DATA 0x00000000 |
| 5829 | #define DDRSS2_PHY_679_DATA 0x00000000 |
| 5830 | #define DDRSS2_PHY_680_DATA 0x00000000 |
| 5831 | #define DDRSS2_PHY_681_DATA 0x00000000 |
| 5832 | #define DDRSS2_PHY_682_DATA 0x00000000 |
| 5833 | #define DDRSS2_PHY_683_DATA 0x00000000 |
| 5834 | #define DDRSS2_PHY_684_DATA 0x00000000 |
| 5835 | #define DDRSS2_PHY_685_DATA 0x00000000 |
| 5836 | #define DDRSS2_PHY_686_DATA 0x00000000 |
| 5837 | #define DDRSS2_PHY_687_DATA 0x00000000 |
| 5838 | #define DDRSS2_PHY_688_DATA 0x00000000 |
| 5839 | #define DDRSS2_PHY_689_DATA 0x00000000 |
| 5840 | #define DDRSS2_PHY_690_DATA 0x00000000 |
| 5841 | #define DDRSS2_PHY_691_DATA 0x00000000 |
| 5842 | #define DDRSS2_PHY_692_DATA 0x00000000 |
| 5843 | #define DDRSS2_PHY_693_DATA 0x00000000 |
| 5844 | #define DDRSS2_PHY_694_DATA 0x00000000 |
| 5845 | #define DDRSS2_PHY_695_DATA 0x00000000 |
| 5846 | #define DDRSS2_PHY_696_DATA 0x00000000 |
| 5847 | #define DDRSS2_PHY_697_DATA 0x00000000 |
| 5848 | #define DDRSS2_PHY_698_DATA 0x00000000 |
| 5849 | #define DDRSS2_PHY_699_DATA 0x00000000 |
| 5850 | #define DDRSS2_PHY_700_DATA 0x00000000 |
| 5851 | #define DDRSS2_PHY_701_DATA 0x00000000 |
| 5852 | #define DDRSS2_PHY_702_DATA 0x00000000 |
| 5853 | #define DDRSS2_PHY_703_DATA 0x00000000 |
| 5854 | #define DDRSS2_PHY_704_DATA 0x00000000 |
| 5855 | #define DDRSS2_PHY_705_DATA 0x00000000 |
| 5856 | #define DDRSS2_PHY_706_DATA 0x00000000 |
| 5857 | #define DDRSS2_PHY_707_DATA 0x00000000 |
| 5858 | #define DDRSS2_PHY_708_DATA 0x00000000 |
| 5859 | #define DDRSS2_PHY_709_DATA 0x00000000 |
| 5860 | #define DDRSS2_PHY_710_DATA 0x00000000 |
| 5861 | #define DDRSS2_PHY_711_DATA 0x00000000 |
| 5862 | #define DDRSS2_PHY_712_DATA 0x00000000 |
| 5863 | #define DDRSS2_PHY_713_DATA 0x00000000 |
| 5864 | #define DDRSS2_PHY_714_DATA 0x00000000 |
| 5865 | #define DDRSS2_PHY_715_DATA 0x00000000 |
| 5866 | #define DDRSS2_PHY_716_DATA 0x00000000 |
| 5867 | #define DDRSS2_PHY_717_DATA 0x00000000 |
| 5868 | #define DDRSS2_PHY_718_DATA 0x00000000 |
| 5869 | #define DDRSS2_PHY_719_DATA 0x00000000 |
| 5870 | #define DDRSS2_PHY_720_DATA 0x00000000 |
| 5871 | #define DDRSS2_PHY_721_DATA 0x00000000 |
| 5872 | #define DDRSS2_PHY_722_DATA 0x00000000 |
| 5873 | #define DDRSS2_PHY_723_DATA 0x00000000 |
| 5874 | #define DDRSS2_PHY_724_DATA 0x00000000 |
| 5875 | #define DDRSS2_PHY_725_DATA 0x00000000 |
| 5876 | #define DDRSS2_PHY_726_DATA 0x00000000 |
| 5877 | #define DDRSS2_PHY_727_DATA 0x00000000 |
| 5878 | #define DDRSS2_PHY_728_DATA 0x00000000 |
| 5879 | #define DDRSS2_PHY_729_DATA 0x00000000 |
| 5880 | #define DDRSS2_PHY_730_DATA 0x00000000 |
| 5881 | #define DDRSS2_PHY_731_DATA 0x00000000 |
| 5882 | #define DDRSS2_PHY_732_DATA 0x00000000 |
| 5883 | #define DDRSS2_PHY_733_DATA 0x00000000 |
| 5884 | #define DDRSS2_PHY_734_DATA 0x00000000 |
| 5885 | #define DDRSS2_PHY_735_DATA 0x00000000 |
| 5886 | #define DDRSS2_PHY_736_DATA 0x00000000 |
| 5887 | #define DDRSS2_PHY_737_DATA 0x00000000 |
| 5888 | #define DDRSS2_PHY_738_DATA 0x00000000 |
| 5889 | #define DDRSS2_PHY_739_DATA 0x00000000 |
| 5890 | #define DDRSS2_PHY_740_DATA 0x00000000 |
| 5891 | #define DDRSS2_PHY_741_DATA 0x00000000 |
| 5892 | #define DDRSS2_PHY_742_DATA 0x00000000 |
| 5893 | #define DDRSS2_PHY_743_DATA 0x00000000 |
| 5894 | #define DDRSS2_PHY_744_DATA 0x00000000 |
| 5895 | #define DDRSS2_PHY_745_DATA 0x00000000 |
| 5896 | #define DDRSS2_PHY_746_DATA 0x00000000 |
| 5897 | #define DDRSS2_PHY_747_DATA 0x00000000 |
| 5898 | #define DDRSS2_PHY_748_DATA 0x00000000 |
| 5899 | #define DDRSS2_PHY_749_DATA 0x00000000 |
| 5900 | #define DDRSS2_PHY_750_DATA 0x00000000 |
| 5901 | #define DDRSS2_PHY_751_DATA 0x00000000 |
| 5902 | #define DDRSS2_PHY_752_DATA 0x00000000 |
| 5903 | #define DDRSS2_PHY_753_DATA 0x00000000 |
| 5904 | #define DDRSS2_PHY_754_DATA 0x00000000 |
| 5905 | #define DDRSS2_PHY_755_DATA 0x00000000 |
| 5906 | #define DDRSS2_PHY_756_DATA 0x00000000 |
| 5907 | #define DDRSS2_PHY_757_DATA 0x00000000 |
| 5908 | #define DDRSS2_PHY_758_DATA 0x00000000 |
| 5909 | #define DDRSS2_PHY_759_DATA 0x00000000 |
| 5910 | #define DDRSS2_PHY_760_DATA 0x00000000 |
| 5911 | #define DDRSS2_PHY_761_DATA 0x00000000 |
| 5912 | #define DDRSS2_PHY_762_DATA 0x00000000 |
| 5913 | #define DDRSS2_PHY_763_DATA 0x00000000 |
| 5914 | #define DDRSS2_PHY_764_DATA 0x00000000 |
| 5915 | #define DDRSS2_PHY_765_DATA 0x00000000 |
| 5916 | #define DDRSS2_PHY_766_DATA 0x00000000 |
| 5917 | #define DDRSS2_PHY_767_DATA 0x00000000 |
| 5918 | #define DDRSS2_PHY_768_DATA 0x000004F0 |
| 5919 | #define DDRSS2_PHY_769_DATA 0x00000000 |
| 5920 | #define DDRSS2_PHY_770_DATA 0x00030200 |
| 5921 | #define DDRSS2_PHY_771_DATA 0x00000000 |
| 5922 | #define DDRSS2_PHY_772_DATA 0x00000000 |
| 5923 | #define DDRSS2_PHY_773_DATA 0x01030000 |
| 5924 | #define DDRSS2_PHY_774_DATA 0x00010000 |
| 5925 | #define DDRSS2_PHY_775_DATA 0x01030004 |
| 5926 | #define DDRSS2_PHY_776_DATA 0x01000000 |
| 5927 | #define DDRSS2_PHY_777_DATA 0x00000000 |
| 5928 | #define DDRSS2_PHY_778_DATA 0x00000000 |
| 5929 | #define DDRSS2_PHY_779_DATA 0x01000001 |
| 5930 | #define DDRSS2_PHY_780_DATA 0x00000100 |
| 5931 | #define DDRSS2_PHY_781_DATA 0x000800C0 |
| 5932 | #define DDRSS2_PHY_782_DATA 0x060100CC |
| 5933 | #define DDRSS2_PHY_783_DATA 0x00030066 |
| 5934 | #define DDRSS2_PHY_784_DATA 0x00000000 |
| 5935 | #define DDRSS2_PHY_785_DATA 0x00000301 |
| 5936 | #define DDRSS2_PHY_786_DATA 0x0000AAAA |
| 5937 | #define DDRSS2_PHY_787_DATA 0x00005555 |
| 5938 | #define DDRSS2_PHY_788_DATA 0x0000B5B5 |
| 5939 | #define DDRSS2_PHY_789_DATA 0x00004A4A |
| 5940 | #define DDRSS2_PHY_790_DATA 0x00005656 |
| 5941 | #define DDRSS2_PHY_791_DATA 0x0000A9A9 |
| 5942 | #define DDRSS2_PHY_792_DATA 0x0000A9A9 |
| 5943 | #define DDRSS2_PHY_793_DATA 0x0000B5B5 |
| 5944 | #define DDRSS2_PHY_794_DATA 0x00000000 |
| 5945 | #define DDRSS2_PHY_795_DATA 0x00000000 |
| 5946 | #define DDRSS2_PHY_796_DATA 0x2A000000 |
| 5947 | #define DDRSS2_PHY_797_DATA 0x00000808 |
| 5948 | #define DDRSS2_PHY_798_DATA 0x0F000000 |
| 5949 | #define DDRSS2_PHY_799_DATA 0x00000F0F |
| 5950 | #define DDRSS2_PHY_800_DATA 0x10400000 |
| 5951 | #define DDRSS2_PHY_801_DATA 0x0C002006 |
| 5952 | #define DDRSS2_PHY_802_DATA 0x00000000 |
| 5953 | #define DDRSS2_PHY_803_DATA 0x00000000 |
| 5954 | #define DDRSS2_PHY_804_DATA 0x55555555 |
| 5955 | #define DDRSS2_PHY_805_DATA 0xAAAAAAAA |
| 5956 | #define DDRSS2_PHY_806_DATA 0x55555555 |
| 5957 | #define DDRSS2_PHY_807_DATA 0xAAAAAAAA |
| 5958 | #define DDRSS2_PHY_808_DATA 0x00005555 |
| 5959 | #define DDRSS2_PHY_809_DATA 0x01000100 |
| 5960 | #define DDRSS2_PHY_810_DATA 0x00800180 |
| 5961 | #define DDRSS2_PHY_811_DATA 0x00000000 |
| 5962 | #define DDRSS2_PHY_812_DATA 0x00000000 |
| 5963 | #define DDRSS2_PHY_813_DATA 0x00000000 |
| 5964 | #define DDRSS2_PHY_814_DATA 0x00000000 |
| 5965 | #define DDRSS2_PHY_815_DATA 0x00000000 |
| 5966 | #define DDRSS2_PHY_816_DATA 0x00000000 |
| 5967 | #define DDRSS2_PHY_817_DATA 0x00000000 |
| 5968 | #define DDRSS2_PHY_818_DATA 0x00000000 |
| 5969 | #define DDRSS2_PHY_819_DATA 0x00000000 |
| 5970 | #define DDRSS2_PHY_820_DATA 0x00000000 |
| 5971 | #define DDRSS2_PHY_821_DATA 0x00000000 |
| 5972 | #define DDRSS2_PHY_822_DATA 0x00000000 |
| 5973 | #define DDRSS2_PHY_823_DATA 0x00000000 |
| 5974 | #define DDRSS2_PHY_824_DATA 0x00000000 |
| 5975 | #define DDRSS2_PHY_825_DATA 0x00000000 |
| 5976 | #define DDRSS2_PHY_826_DATA 0x00000000 |
| 5977 | #define DDRSS2_PHY_827_DATA 0x00000000 |
| 5978 | #define DDRSS2_PHY_828_DATA 0x00000000 |
| 5979 | #define DDRSS2_PHY_829_DATA 0x00000000 |
| 5980 | #define DDRSS2_PHY_830_DATA 0x00000000 |
| 5981 | #define DDRSS2_PHY_831_DATA 0x00000000 |
| 5982 | #define DDRSS2_PHY_832_DATA 0x00000000 |
| 5983 | #define DDRSS2_PHY_833_DATA 0x00000000 |
| 5984 | #define DDRSS2_PHY_834_DATA 0x00000104 |
| 5985 | #define DDRSS2_PHY_835_DATA 0x00000120 |
| 5986 | #define DDRSS2_PHY_836_DATA 0x00000000 |
| 5987 | #define DDRSS2_PHY_837_DATA 0x00000000 |
| 5988 | #define DDRSS2_PHY_838_DATA 0x00000000 |
| 5989 | #define DDRSS2_PHY_839_DATA 0x00000000 |
| 5990 | #define DDRSS2_PHY_840_DATA 0x00000000 |
| 5991 | #define DDRSS2_PHY_841_DATA 0x00000000 |
| 5992 | #define DDRSS2_PHY_842_DATA 0x00000000 |
| 5993 | #define DDRSS2_PHY_843_DATA 0x00000001 |
| 5994 | #define DDRSS2_PHY_844_DATA 0x07FF0000 |
| 5995 | #define DDRSS2_PHY_845_DATA 0x0080081F |
| 5996 | #define DDRSS2_PHY_846_DATA 0x00081020 |
| 5997 | #define DDRSS2_PHY_847_DATA 0x04010000 |
| 5998 | #define DDRSS2_PHY_848_DATA 0x00000000 |
| 5999 | #define DDRSS2_PHY_849_DATA 0x00000000 |
| 6000 | #define DDRSS2_PHY_850_DATA 0x00000000 |
| 6001 | #define DDRSS2_PHY_851_DATA 0x00000100 |
| 6002 | #define DDRSS2_PHY_852_DATA 0x01CC0C01 |
| 6003 | #define DDRSS2_PHY_853_DATA 0x1003CC0C |
| 6004 | #define DDRSS2_PHY_854_DATA 0x20000140 |
| 6005 | #define DDRSS2_PHY_855_DATA 0x07FF0200 |
| 6006 | #define DDRSS2_PHY_856_DATA 0x0000DD01 |
| 6007 | #define DDRSS2_PHY_857_DATA 0x10100303 |
| 6008 | #define DDRSS2_PHY_858_DATA 0x10101010 |
| 6009 | #define DDRSS2_PHY_859_DATA 0x10101010 |
| 6010 | #define DDRSS2_PHY_860_DATA 0x00021010 |
| 6011 | #define DDRSS2_PHY_861_DATA 0x00100010 |
| 6012 | #define DDRSS2_PHY_862_DATA 0x00100010 |
| 6013 | #define DDRSS2_PHY_863_DATA 0x00100010 |
| 6014 | #define DDRSS2_PHY_864_DATA 0x00100010 |
| 6015 | #define DDRSS2_PHY_865_DATA 0x00050010 |
| 6016 | #define DDRSS2_PHY_866_DATA 0x51517041 |
| 6017 | #define DDRSS2_PHY_867_DATA 0x31C06001 |
| 6018 | #define DDRSS2_PHY_868_DATA 0x07AB0340 |
| 6019 | #define DDRSS2_PHY_869_DATA 0x00C0C001 |
| 6020 | #define DDRSS2_PHY_870_DATA 0x0E0D0001 |
| 6021 | #define DDRSS2_PHY_871_DATA 0x10001000 |
| 6022 | #define DDRSS2_PHY_872_DATA 0x0C083E42 |
| 6023 | #define DDRSS2_PHY_873_DATA 0x0F0C3701 |
| 6024 | #define DDRSS2_PHY_874_DATA 0x01000140 |
| 6025 | #define DDRSS2_PHY_875_DATA 0x0C000420 |
| 6026 | #define DDRSS2_PHY_876_DATA 0x00000198 |
| 6027 | #define DDRSS2_PHY_877_DATA 0x0A0000D0 |
| 6028 | #define DDRSS2_PHY_878_DATA 0x00030200 |
| 6029 | #define DDRSS2_PHY_879_DATA 0x02800000 |
| 6030 | #define DDRSS2_PHY_880_DATA 0x80800000 |
| 6031 | #define DDRSS2_PHY_881_DATA 0x000E2010 |
| 6032 | #define DDRSS2_PHY_882_DATA 0x76543210 |
| 6033 | #define DDRSS2_PHY_883_DATA 0x00000008 |
| 6034 | #define DDRSS2_PHY_884_DATA 0x02800280 |
| 6035 | #define DDRSS2_PHY_885_DATA 0x02800280 |
| 6036 | #define DDRSS2_PHY_886_DATA 0x02800280 |
| 6037 | #define DDRSS2_PHY_887_DATA 0x02800280 |
| 6038 | #define DDRSS2_PHY_888_DATA 0x00000280 |
| 6039 | #define DDRSS2_PHY_889_DATA 0x0000A000 |
| 6040 | #define DDRSS2_PHY_890_DATA 0x00A000A0 |
| 6041 | #define DDRSS2_PHY_891_DATA 0x00A000A0 |
| 6042 | #define DDRSS2_PHY_892_DATA 0x00A000A0 |
| 6043 | #define DDRSS2_PHY_893_DATA 0x00A000A0 |
| 6044 | #define DDRSS2_PHY_894_DATA 0x00A000A0 |
| 6045 | #define DDRSS2_PHY_895_DATA 0x00A000A0 |
| 6046 | #define DDRSS2_PHY_896_DATA 0x00A000A0 |
| 6047 | #define DDRSS2_PHY_897_DATA 0x00A000A0 |
| 6048 | #define DDRSS2_PHY_898_DATA 0x01C200A0 |
| 6049 | #define DDRSS2_PHY_899_DATA 0x01A00005 |
| 6050 | #define DDRSS2_PHY_900_DATA 0x00000000 |
| 6051 | #define DDRSS2_PHY_901_DATA 0x00000000 |
| 6052 | #define DDRSS2_PHY_902_DATA 0x00080200 |
| 6053 | #define DDRSS2_PHY_903_DATA 0x00000000 |
| 6054 | #define DDRSS2_PHY_904_DATA 0x20202000 |
| 6055 | #define DDRSS2_PHY_905_DATA 0x20202020 |
| 6056 | #define DDRSS2_PHY_906_DATA 0xF0F02020 |
| 6057 | #define DDRSS2_PHY_907_DATA 0x00000000 |
| 6058 | #define DDRSS2_PHY_908_DATA 0x00000000 |
| 6059 | #define DDRSS2_PHY_909_DATA 0x00000000 |
| 6060 | #define DDRSS2_PHY_910_DATA 0x00000000 |
| 6061 | #define DDRSS2_PHY_911_DATA 0x00000000 |
| 6062 | #define DDRSS2_PHY_912_DATA 0x00000000 |
| 6063 | #define DDRSS2_PHY_913_DATA 0x00000000 |
| 6064 | #define DDRSS2_PHY_914_DATA 0x00000000 |
| 6065 | #define DDRSS2_PHY_915_DATA 0x00000000 |
| 6066 | #define DDRSS2_PHY_916_DATA 0x00000000 |
| 6067 | #define DDRSS2_PHY_917_DATA 0x00000000 |
| 6068 | #define DDRSS2_PHY_918_DATA 0x00000000 |
| 6069 | #define DDRSS2_PHY_919_DATA 0x00000000 |
| 6070 | #define DDRSS2_PHY_920_DATA 0x00000000 |
| 6071 | #define DDRSS2_PHY_921_DATA 0x00000000 |
| 6072 | #define DDRSS2_PHY_922_DATA 0x00000000 |
| 6073 | #define DDRSS2_PHY_923_DATA 0x00000000 |
| 6074 | #define DDRSS2_PHY_924_DATA 0x00000000 |
| 6075 | #define DDRSS2_PHY_925_DATA 0x00000000 |
| 6076 | #define DDRSS2_PHY_926_DATA 0x00000000 |
| 6077 | #define DDRSS2_PHY_927_DATA 0x00000000 |
| 6078 | #define DDRSS2_PHY_928_DATA 0x00000000 |
| 6079 | #define DDRSS2_PHY_929_DATA 0x00000000 |
| 6080 | #define DDRSS2_PHY_930_DATA 0x00000000 |
| 6081 | #define DDRSS2_PHY_931_DATA 0x00000000 |
| 6082 | #define DDRSS2_PHY_932_DATA 0x00000000 |
| 6083 | #define DDRSS2_PHY_933_DATA 0x00000000 |
| 6084 | #define DDRSS2_PHY_934_DATA 0x00000000 |
| 6085 | #define DDRSS2_PHY_935_DATA 0x00000000 |
| 6086 | #define DDRSS2_PHY_936_DATA 0x00000000 |
| 6087 | #define DDRSS2_PHY_937_DATA 0x00000000 |
| 6088 | #define DDRSS2_PHY_938_DATA 0x00000000 |
| 6089 | #define DDRSS2_PHY_939_DATA 0x00000000 |
| 6090 | #define DDRSS2_PHY_940_DATA 0x00000000 |
| 6091 | #define DDRSS2_PHY_941_DATA 0x00000000 |
| 6092 | #define DDRSS2_PHY_942_DATA 0x00000000 |
| 6093 | #define DDRSS2_PHY_943_DATA 0x00000000 |
| 6094 | #define DDRSS2_PHY_944_DATA 0x00000000 |
| 6095 | #define DDRSS2_PHY_945_DATA 0x00000000 |
| 6096 | #define DDRSS2_PHY_946_DATA 0x00000000 |
| 6097 | #define DDRSS2_PHY_947_DATA 0x00000000 |
| 6098 | #define DDRSS2_PHY_948_DATA 0x00000000 |
| 6099 | #define DDRSS2_PHY_949_DATA 0x00000000 |
| 6100 | #define DDRSS2_PHY_950_DATA 0x00000000 |
| 6101 | #define DDRSS2_PHY_951_DATA 0x00000000 |
| 6102 | #define DDRSS2_PHY_952_DATA 0x00000000 |
| 6103 | #define DDRSS2_PHY_953_DATA 0x00000000 |
| 6104 | #define DDRSS2_PHY_954_DATA 0x00000000 |
| 6105 | #define DDRSS2_PHY_955_DATA 0x00000000 |
| 6106 | #define DDRSS2_PHY_956_DATA 0x00000000 |
| 6107 | #define DDRSS2_PHY_957_DATA 0x00000000 |
| 6108 | #define DDRSS2_PHY_958_DATA 0x00000000 |
| 6109 | #define DDRSS2_PHY_959_DATA 0x00000000 |
| 6110 | #define DDRSS2_PHY_960_DATA 0x00000000 |
| 6111 | #define DDRSS2_PHY_961_DATA 0x00000000 |
| 6112 | #define DDRSS2_PHY_962_DATA 0x00000000 |
| 6113 | #define DDRSS2_PHY_963_DATA 0x00000000 |
| 6114 | #define DDRSS2_PHY_964_DATA 0x00000000 |
| 6115 | #define DDRSS2_PHY_965_DATA 0x00000000 |
| 6116 | #define DDRSS2_PHY_966_DATA 0x00000000 |
| 6117 | #define DDRSS2_PHY_967_DATA 0x00000000 |
| 6118 | #define DDRSS2_PHY_968_DATA 0x00000000 |
| 6119 | #define DDRSS2_PHY_969_DATA 0x00000000 |
| 6120 | #define DDRSS2_PHY_970_DATA 0x00000000 |
| 6121 | #define DDRSS2_PHY_971_DATA 0x00000000 |
| 6122 | #define DDRSS2_PHY_972_DATA 0x00000000 |
| 6123 | #define DDRSS2_PHY_973_DATA 0x00000000 |
| 6124 | #define DDRSS2_PHY_974_DATA 0x00000000 |
| 6125 | #define DDRSS2_PHY_975_DATA 0x00000000 |
| 6126 | #define DDRSS2_PHY_976_DATA 0x00000000 |
| 6127 | #define DDRSS2_PHY_977_DATA 0x00000000 |
| 6128 | #define DDRSS2_PHY_978_DATA 0x00000000 |
| 6129 | #define DDRSS2_PHY_979_DATA 0x00000000 |
| 6130 | #define DDRSS2_PHY_980_DATA 0x00000000 |
| 6131 | #define DDRSS2_PHY_981_DATA 0x00000000 |
| 6132 | #define DDRSS2_PHY_982_DATA 0x00000000 |
| 6133 | #define DDRSS2_PHY_983_DATA 0x00000000 |
| 6134 | #define DDRSS2_PHY_984_DATA 0x00000000 |
| 6135 | #define DDRSS2_PHY_985_DATA 0x00000000 |
| 6136 | #define DDRSS2_PHY_986_DATA 0x00000000 |
| 6137 | #define DDRSS2_PHY_987_DATA 0x00000000 |
| 6138 | #define DDRSS2_PHY_988_DATA 0x00000000 |
| 6139 | #define DDRSS2_PHY_989_DATA 0x00000000 |
| 6140 | #define DDRSS2_PHY_990_DATA 0x00000000 |
| 6141 | #define DDRSS2_PHY_991_DATA 0x00000000 |
| 6142 | #define DDRSS2_PHY_992_DATA 0x00000000 |
| 6143 | #define DDRSS2_PHY_993_DATA 0x00000000 |
| 6144 | #define DDRSS2_PHY_994_DATA 0x00000000 |
| 6145 | #define DDRSS2_PHY_995_DATA 0x00000000 |
| 6146 | #define DDRSS2_PHY_996_DATA 0x00000000 |
| 6147 | #define DDRSS2_PHY_997_DATA 0x00000000 |
| 6148 | #define DDRSS2_PHY_998_DATA 0x00000000 |
| 6149 | #define DDRSS2_PHY_999_DATA 0x00000000 |
| 6150 | #define DDRSS2_PHY_1000_DATA 0x00000000 |
| 6151 | #define DDRSS2_PHY_1001_DATA 0x00000000 |
| 6152 | #define DDRSS2_PHY_1002_DATA 0x00000000 |
| 6153 | #define DDRSS2_PHY_1003_DATA 0x00000000 |
| 6154 | #define DDRSS2_PHY_1004_DATA 0x00000000 |
| 6155 | #define DDRSS2_PHY_1005_DATA 0x00000000 |
| 6156 | #define DDRSS2_PHY_1006_DATA 0x00000000 |
| 6157 | #define DDRSS2_PHY_1007_DATA 0x00000000 |
| 6158 | #define DDRSS2_PHY_1008_DATA 0x00000000 |
| 6159 | #define DDRSS2_PHY_1009_DATA 0x00000000 |
| 6160 | #define DDRSS2_PHY_1010_DATA 0x00000000 |
| 6161 | #define DDRSS2_PHY_1011_DATA 0x00000000 |
| 6162 | #define DDRSS2_PHY_1012_DATA 0x00000000 |
| 6163 | #define DDRSS2_PHY_1013_DATA 0x00000000 |
| 6164 | #define DDRSS2_PHY_1014_DATA 0x00000000 |
| 6165 | #define DDRSS2_PHY_1015_DATA 0x00000000 |
| 6166 | #define DDRSS2_PHY_1016_DATA 0x00000000 |
| 6167 | #define DDRSS2_PHY_1017_DATA 0x00000000 |
| 6168 | #define DDRSS2_PHY_1018_DATA 0x00000000 |
| 6169 | #define DDRSS2_PHY_1019_DATA 0x00000000 |
| 6170 | #define DDRSS2_PHY_1020_DATA 0x00000000 |
| 6171 | #define DDRSS2_PHY_1021_DATA 0x00000000 |
| 6172 | #define DDRSS2_PHY_1022_DATA 0x00000000 |
| 6173 | #define DDRSS2_PHY_1023_DATA 0x00000000 |
| 6174 | #define DDRSS2_PHY_1024_DATA 0x00000000 |
| 6175 | #define DDRSS2_PHY_1025_DATA 0x00000000 |
| 6176 | #define DDRSS2_PHY_1026_DATA 0x00000000 |
| 6177 | #define DDRSS2_PHY_1027_DATA 0x00000000 |
| 6178 | #define DDRSS2_PHY_1028_DATA 0x00000000 |
| 6179 | #define DDRSS2_PHY_1029_DATA 0x00000100 |
| 6180 | #define DDRSS2_PHY_1030_DATA 0x00000200 |
| 6181 | #define DDRSS2_PHY_1031_DATA 0x00000000 |
| 6182 | #define DDRSS2_PHY_1032_DATA 0x00000000 |
| 6183 | #define DDRSS2_PHY_1033_DATA 0x00000000 |
| 6184 | #define DDRSS2_PHY_1034_DATA 0x00000000 |
| 6185 | #define DDRSS2_PHY_1035_DATA 0x00400000 |
| 6186 | #define DDRSS2_PHY_1036_DATA 0x00000080 |
| 6187 | #define DDRSS2_PHY_1037_DATA 0x00DCBA98 |
| 6188 | #define DDRSS2_PHY_1038_DATA 0x03000000 |
| 6189 | #define DDRSS2_PHY_1039_DATA 0x00200000 |
| 6190 | #define DDRSS2_PHY_1040_DATA 0x00000000 |
| 6191 | #define DDRSS2_PHY_1041_DATA 0x00000000 |
| 6192 | #define DDRSS2_PHY_1042_DATA 0x00000000 |
| 6193 | #define DDRSS2_PHY_1043_DATA 0x00000000 |
| 6194 | #define DDRSS2_PHY_1044_DATA 0x00000000 |
| 6195 | #define DDRSS2_PHY_1045_DATA 0x0000002A |
| 6196 | #define DDRSS2_PHY_1046_DATA 0x00000015 |
| 6197 | #define DDRSS2_PHY_1047_DATA 0x00000015 |
| 6198 | #define DDRSS2_PHY_1048_DATA 0x0000002A |
| 6199 | #define DDRSS2_PHY_1049_DATA 0x00000033 |
| 6200 | #define DDRSS2_PHY_1050_DATA 0x0000000C |
| 6201 | #define DDRSS2_PHY_1051_DATA 0x0000000C |
| 6202 | #define DDRSS2_PHY_1052_DATA 0x00000033 |
| 6203 | #define DDRSS2_PHY_1053_DATA 0x00543210 |
| 6204 | #define DDRSS2_PHY_1054_DATA 0x003F0000 |
| 6205 | #define DDRSS2_PHY_1055_DATA 0x000F013F |
| 6206 | #define DDRSS2_PHY_1056_DATA 0x20202003 |
| 6207 | #define DDRSS2_PHY_1057_DATA 0x00202020 |
| 6208 | #define DDRSS2_PHY_1058_DATA 0x20008008 |
| 6209 | #define DDRSS2_PHY_1059_DATA 0x00000810 |
| 6210 | #define DDRSS2_PHY_1060_DATA 0x00000F00 |
| 6211 | #define DDRSS2_PHY_1061_DATA 0x00000000 |
| 6212 | #define DDRSS2_PHY_1062_DATA 0x00000000 |
| 6213 | #define DDRSS2_PHY_1063_DATA 0x00000000 |
| 6214 | #define DDRSS2_PHY_1064_DATA 0x000305CC |
| 6215 | #define DDRSS2_PHY_1065_DATA 0x00030000 |
| 6216 | #define DDRSS2_PHY_1066_DATA 0x00000300 |
| 6217 | #define DDRSS2_PHY_1067_DATA 0x00000300 |
| 6218 | #define DDRSS2_PHY_1068_DATA 0x00000300 |
| 6219 | #define DDRSS2_PHY_1069_DATA 0x00000300 |
| 6220 | #define DDRSS2_PHY_1070_DATA 0x00000300 |
| 6221 | #define DDRSS2_PHY_1071_DATA 0x42080010 |
| 6222 | #define DDRSS2_PHY_1072_DATA 0x0000803E |
| 6223 | #define DDRSS2_PHY_1073_DATA 0x00000001 |
| 6224 | #define DDRSS2_PHY_1074_DATA 0x01000102 |
| 6225 | #define DDRSS2_PHY_1075_DATA 0x00008000 |
| 6226 | #define DDRSS2_PHY_1076_DATA 0x00000000 |
| 6227 | #define DDRSS2_PHY_1077_DATA 0x00000000 |
| 6228 | #define DDRSS2_PHY_1078_DATA 0x00000000 |
| 6229 | #define DDRSS2_PHY_1079_DATA 0x00000000 |
| 6230 | #define DDRSS2_PHY_1080_DATA 0x00000000 |
| 6231 | #define DDRSS2_PHY_1081_DATA 0x00000000 |
| 6232 | #define DDRSS2_PHY_1082_DATA 0x00000000 |
| 6233 | #define DDRSS2_PHY_1083_DATA 0x00000000 |
| 6234 | #define DDRSS2_PHY_1084_DATA 0x00000000 |
| 6235 | #define DDRSS2_PHY_1085_DATA 0x00000000 |
| 6236 | #define DDRSS2_PHY_1086_DATA 0x00000000 |
| 6237 | #define DDRSS2_PHY_1087_DATA 0x00000000 |
| 6238 | #define DDRSS2_PHY_1088_DATA 0x00000000 |
| 6239 | #define DDRSS2_PHY_1089_DATA 0x00000000 |
| 6240 | #define DDRSS2_PHY_1090_DATA 0x00000000 |
| 6241 | #define DDRSS2_PHY_1091_DATA 0x00000000 |
| 6242 | #define DDRSS2_PHY_1092_DATA 0x00000000 |
| 6243 | #define DDRSS2_PHY_1093_DATA 0x00000000 |
| 6244 | #define DDRSS2_PHY_1094_DATA 0x00000000 |
| 6245 | #define DDRSS2_PHY_1095_DATA 0x00000000 |
| 6246 | #define DDRSS2_PHY_1096_DATA 0x00000000 |
| 6247 | #define DDRSS2_PHY_1097_DATA 0x00000000 |
| 6248 | #define DDRSS2_PHY_1098_DATA 0x00000000 |
| 6249 | #define DDRSS2_PHY_1099_DATA 0x00000000 |
| 6250 | #define DDRSS2_PHY_1100_DATA 0x00000000 |
| 6251 | #define DDRSS2_PHY_1101_DATA 0x00000000 |
| 6252 | #define DDRSS2_PHY_1102_DATA 0x00000000 |
| 6253 | #define DDRSS2_PHY_1103_DATA 0x00000000 |
| 6254 | #define DDRSS2_PHY_1104_DATA 0x00000000 |
| 6255 | #define DDRSS2_PHY_1105_DATA 0x00000000 |
| 6256 | #define DDRSS2_PHY_1106_DATA 0x00000000 |
| 6257 | #define DDRSS2_PHY_1107_DATA 0x00000000 |
| 6258 | #define DDRSS2_PHY_1108_DATA 0x00000000 |
| 6259 | #define DDRSS2_PHY_1109_DATA 0x00000000 |
| 6260 | #define DDRSS2_PHY_1110_DATA 0x00000000 |
| 6261 | #define DDRSS2_PHY_1111_DATA 0x00000000 |
| 6262 | #define DDRSS2_PHY_1112_DATA 0x00000000 |
| 6263 | #define DDRSS2_PHY_1113_DATA 0x00000000 |
| 6264 | #define DDRSS2_PHY_1114_DATA 0x00000000 |
| 6265 | #define DDRSS2_PHY_1115_DATA 0x00000000 |
| 6266 | #define DDRSS2_PHY_1116_DATA 0x00000000 |
| 6267 | #define DDRSS2_PHY_1117_DATA 0x00000000 |
| 6268 | #define DDRSS2_PHY_1118_DATA 0x00000000 |
| 6269 | #define DDRSS2_PHY_1119_DATA 0x00000000 |
| 6270 | #define DDRSS2_PHY_1120_DATA 0x00000000 |
| 6271 | #define DDRSS2_PHY_1121_DATA 0x00000000 |
| 6272 | #define DDRSS2_PHY_1122_DATA 0x00000000 |
| 6273 | #define DDRSS2_PHY_1123_DATA 0x00000000 |
| 6274 | #define DDRSS2_PHY_1124_DATA 0x00000000 |
| 6275 | #define DDRSS2_PHY_1125_DATA 0x00000000 |
| 6276 | #define DDRSS2_PHY_1126_DATA 0x00000000 |
| 6277 | #define DDRSS2_PHY_1127_DATA 0x00000000 |
| 6278 | #define DDRSS2_PHY_1128_DATA 0x00000000 |
| 6279 | #define DDRSS2_PHY_1129_DATA 0x00000000 |
| 6280 | #define DDRSS2_PHY_1130_DATA 0x00000000 |
| 6281 | #define DDRSS2_PHY_1131_DATA 0x00000000 |
| 6282 | #define DDRSS2_PHY_1132_DATA 0x00000000 |
| 6283 | #define DDRSS2_PHY_1133_DATA 0x00000000 |
| 6284 | #define DDRSS2_PHY_1134_DATA 0x00000000 |
| 6285 | #define DDRSS2_PHY_1135_DATA 0x00000000 |
| 6286 | #define DDRSS2_PHY_1136_DATA 0x00000000 |
| 6287 | #define DDRSS2_PHY_1137_DATA 0x00000000 |
| 6288 | #define DDRSS2_PHY_1138_DATA 0x00000000 |
| 6289 | #define DDRSS2_PHY_1139_DATA 0x00000000 |
| 6290 | #define DDRSS2_PHY_1140_DATA 0x00000000 |
| 6291 | #define DDRSS2_PHY_1141_DATA 0x00000000 |
| 6292 | #define DDRSS2_PHY_1142_DATA 0x00000000 |
| 6293 | #define DDRSS2_PHY_1143_DATA 0x00000000 |
| 6294 | #define DDRSS2_PHY_1144_DATA 0x00000000 |
| 6295 | #define DDRSS2_PHY_1145_DATA 0x00000000 |
| 6296 | #define DDRSS2_PHY_1146_DATA 0x00000000 |
| 6297 | #define DDRSS2_PHY_1147_DATA 0x00000000 |
| 6298 | #define DDRSS2_PHY_1148_DATA 0x00000000 |
| 6299 | #define DDRSS2_PHY_1149_DATA 0x00000000 |
| 6300 | #define DDRSS2_PHY_1150_DATA 0x00000000 |
| 6301 | #define DDRSS2_PHY_1151_DATA 0x00000000 |
| 6302 | #define DDRSS2_PHY_1152_DATA 0x00000000 |
| 6303 | #define DDRSS2_PHY_1153_DATA 0x00000000 |
| 6304 | #define DDRSS2_PHY_1154_DATA 0x00000000 |
| 6305 | #define DDRSS2_PHY_1155_DATA 0x00000000 |
| 6306 | #define DDRSS2_PHY_1156_DATA 0x00000000 |
| 6307 | #define DDRSS2_PHY_1157_DATA 0x00000000 |
| 6308 | #define DDRSS2_PHY_1158_DATA 0x00000000 |
| 6309 | #define DDRSS2_PHY_1159_DATA 0x00000000 |
| 6310 | #define DDRSS2_PHY_1160_DATA 0x00000000 |
| 6311 | #define DDRSS2_PHY_1161_DATA 0x00000000 |
| 6312 | #define DDRSS2_PHY_1162_DATA 0x00000000 |
| 6313 | #define DDRSS2_PHY_1163_DATA 0x00000000 |
| 6314 | #define DDRSS2_PHY_1164_DATA 0x00000000 |
| 6315 | #define DDRSS2_PHY_1165_DATA 0x00000000 |
| 6316 | #define DDRSS2_PHY_1166_DATA 0x00000000 |
| 6317 | #define DDRSS2_PHY_1167_DATA 0x00000000 |
| 6318 | #define DDRSS2_PHY_1168_DATA 0x00000000 |
| 6319 | #define DDRSS2_PHY_1169_DATA 0x00000000 |
| 6320 | #define DDRSS2_PHY_1170_DATA 0x00000000 |
| 6321 | #define DDRSS2_PHY_1171_DATA 0x00000000 |
| 6322 | #define DDRSS2_PHY_1172_DATA 0x00000000 |
| 6323 | #define DDRSS2_PHY_1173_DATA 0x00000000 |
| 6324 | #define DDRSS2_PHY_1174_DATA 0x00000000 |
| 6325 | #define DDRSS2_PHY_1175_DATA 0x00000000 |
| 6326 | #define DDRSS2_PHY_1176_DATA 0x00000000 |
| 6327 | #define DDRSS2_PHY_1177_DATA 0x00000000 |
| 6328 | #define DDRSS2_PHY_1178_DATA 0x00000000 |
| 6329 | #define DDRSS2_PHY_1179_DATA 0x00000000 |
| 6330 | #define DDRSS2_PHY_1180_DATA 0x00000000 |
| 6331 | #define DDRSS2_PHY_1181_DATA 0x00000000 |
| 6332 | #define DDRSS2_PHY_1182_DATA 0x00000000 |
| 6333 | #define DDRSS2_PHY_1183_DATA 0x00000000 |
| 6334 | #define DDRSS2_PHY_1184_DATA 0x00000000 |
| 6335 | #define DDRSS2_PHY_1185_DATA 0x00000000 |
| 6336 | #define DDRSS2_PHY_1186_DATA 0x00000000 |
| 6337 | #define DDRSS2_PHY_1187_DATA 0x00000000 |
| 6338 | #define DDRSS2_PHY_1188_DATA 0x00000000 |
| 6339 | #define DDRSS2_PHY_1189_DATA 0x00000000 |
| 6340 | #define DDRSS2_PHY_1190_DATA 0x00000000 |
| 6341 | #define DDRSS2_PHY_1191_DATA 0x00000000 |
| 6342 | #define DDRSS2_PHY_1192_DATA 0x00000000 |
| 6343 | #define DDRSS2_PHY_1193_DATA 0x00000000 |
| 6344 | #define DDRSS2_PHY_1194_DATA 0x00000000 |
| 6345 | #define DDRSS2_PHY_1195_DATA 0x00000000 |
| 6346 | #define DDRSS2_PHY_1196_DATA 0x00000000 |
| 6347 | #define DDRSS2_PHY_1197_DATA 0x00000000 |
| 6348 | #define DDRSS2_PHY_1198_DATA 0x00000000 |
| 6349 | #define DDRSS2_PHY_1199_DATA 0x00000000 |
| 6350 | #define DDRSS2_PHY_1200_DATA 0x00000000 |
| 6351 | #define DDRSS2_PHY_1201_DATA 0x00000000 |
| 6352 | #define DDRSS2_PHY_1202_DATA 0x00000000 |
| 6353 | #define DDRSS2_PHY_1203_DATA 0x00000000 |
| 6354 | #define DDRSS2_PHY_1204_DATA 0x00000000 |
| 6355 | #define DDRSS2_PHY_1205_DATA 0x00000000 |
| 6356 | #define DDRSS2_PHY_1206_DATA 0x00000000 |
| 6357 | #define DDRSS2_PHY_1207_DATA 0x00000000 |
| 6358 | #define DDRSS2_PHY_1208_DATA 0x00000000 |
| 6359 | #define DDRSS2_PHY_1209_DATA 0x00000000 |
| 6360 | #define DDRSS2_PHY_1210_DATA 0x00000000 |
| 6361 | #define DDRSS2_PHY_1211_DATA 0x00000000 |
| 6362 | #define DDRSS2_PHY_1212_DATA 0x00000000 |
| 6363 | #define DDRSS2_PHY_1213_DATA 0x00000000 |
| 6364 | #define DDRSS2_PHY_1214_DATA 0x00000000 |
| 6365 | #define DDRSS2_PHY_1215_DATA 0x00000000 |
| 6366 | #define DDRSS2_PHY_1216_DATA 0x00000000 |
| 6367 | #define DDRSS2_PHY_1217_DATA 0x00000000 |
| 6368 | #define DDRSS2_PHY_1218_DATA 0x00000000 |
| 6369 | #define DDRSS2_PHY_1219_DATA 0x00000000 |
| 6370 | #define DDRSS2_PHY_1220_DATA 0x00000000 |
| 6371 | #define DDRSS2_PHY_1221_DATA 0x00000000 |
| 6372 | #define DDRSS2_PHY_1222_DATA 0x00000000 |
| 6373 | #define DDRSS2_PHY_1223_DATA 0x00000000 |
| 6374 | #define DDRSS2_PHY_1224_DATA 0x00000000 |
| 6375 | #define DDRSS2_PHY_1225_DATA 0x00000000 |
| 6376 | #define DDRSS2_PHY_1226_DATA 0x00000000 |
| 6377 | #define DDRSS2_PHY_1227_DATA 0x00000000 |
| 6378 | #define DDRSS2_PHY_1228_DATA 0x00000000 |
| 6379 | #define DDRSS2_PHY_1229_DATA 0x00000000 |
| 6380 | #define DDRSS2_PHY_1230_DATA 0x00000000 |
| 6381 | #define DDRSS2_PHY_1231_DATA 0x00000000 |
| 6382 | #define DDRSS2_PHY_1232_DATA 0x00000000 |
| 6383 | #define DDRSS2_PHY_1233_DATA 0x00000000 |
| 6384 | #define DDRSS2_PHY_1234_DATA 0x00000000 |
| 6385 | #define DDRSS2_PHY_1235_DATA 0x00000000 |
| 6386 | #define DDRSS2_PHY_1236_DATA 0x00000000 |
| 6387 | #define DDRSS2_PHY_1237_DATA 0x00000000 |
| 6388 | #define DDRSS2_PHY_1238_DATA 0x00000000 |
| 6389 | #define DDRSS2_PHY_1239_DATA 0x00000000 |
| 6390 | #define DDRSS2_PHY_1240_DATA 0x00000000 |
| 6391 | #define DDRSS2_PHY_1241_DATA 0x00000000 |
| 6392 | #define DDRSS2_PHY_1242_DATA 0x00000000 |
| 6393 | #define DDRSS2_PHY_1243_DATA 0x00000000 |
| 6394 | #define DDRSS2_PHY_1244_DATA 0x00000000 |
| 6395 | #define DDRSS2_PHY_1245_DATA 0x00000000 |
| 6396 | #define DDRSS2_PHY_1246_DATA 0x00000000 |
| 6397 | #define DDRSS2_PHY_1247_DATA 0x00000000 |
| 6398 | #define DDRSS2_PHY_1248_DATA 0x00000000 |
| 6399 | #define DDRSS2_PHY_1249_DATA 0x00000000 |
| 6400 | #define DDRSS2_PHY_1250_DATA 0x00000000 |
| 6401 | #define DDRSS2_PHY_1251_DATA 0x00000000 |
| 6402 | #define DDRSS2_PHY_1252_DATA 0x00000000 |
| 6403 | #define DDRSS2_PHY_1253_DATA 0x00000000 |
| 6404 | #define DDRSS2_PHY_1254_DATA 0x00000000 |
| 6405 | #define DDRSS2_PHY_1255_DATA 0x00000000 |
| 6406 | #define DDRSS2_PHY_1256_DATA 0x00000000 |
| 6407 | #define DDRSS2_PHY_1257_DATA 0x00000000 |
| 6408 | #define DDRSS2_PHY_1258_DATA 0x00000000 |
| 6409 | #define DDRSS2_PHY_1259_DATA 0x00000000 |
| 6410 | #define DDRSS2_PHY_1260_DATA 0x00000000 |
| 6411 | #define DDRSS2_PHY_1261_DATA 0x00000000 |
| 6412 | #define DDRSS2_PHY_1262_DATA 0x00000000 |
| 6413 | #define DDRSS2_PHY_1263_DATA 0x00000000 |
| 6414 | #define DDRSS2_PHY_1264_DATA 0x00000000 |
| 6415 | #define DDRSS2_PHY_1265_DATA 0x00000000 |
| 6416 | #define DDRSS2_PHY_1266_DATA 0x00000000 |
| 6417 | #define DDRSS2_PHY_1267_DATA 0x00000000 |
| 6418 | #define DDRSS2_PHY_1268_DATA 0x00000000 |
| 6419 | #define DDRSS2_PHY_1269_DATA 0x00000000 |
| 6420 | #define DDRSS2_PHY_1270_DATA 0x00000000 |
| 6421 | #define DDRSS2_PHY_1271_DATA 0x00000000 |
| 6422 | #define DDRSS2_PHY_1272_DATA 0x00000000 |
| 6423 | #define DDRSS2_PHY_1273_DATA 0x00000000 |
| 6424 | #define DDRSS2_PHY_1274_DATA 0x00000000 |
| 6425 | #define DDRSS2_PHY_1275_DATA 0x00000000 |
| 6426 | #define DDRSS2_PHY_1276_DATA 0x00000000 |
| 6427 | #define DDRSS2_PHY_1277_DATA 0x00000000 |
| 6428 | #define DDRSS2_PHY_1278_DATA 0x00000000 |
| 6429 | #define DDRSS2_PHY_1279_DATA 0x00000000 |
| 6430 | #define DDRSS2_PHY_1280_DATA 0x00000000 |
| 6431 | #define DDRSS2_PHY_1281_DATA 0x00010100 |
| 6432 | #define DDRSS2_PHY_1282_DATA 0x00000000 |
| 6433 | #define DDRSS2_PHY_1283_DATA 0x00000000 |
| 6434 | #define DDRSS2_PHY_1284_DATA 0x00050000 |
| 6435 | #define DDRSS2_PHY_1285_DATA 0x04000000 |
| 6436 | #define DDRSS2_PHY_1286_DATA 0x00000055 |
| 6437 | #define DDRSS2_PHY_1287_DATA 0x00000000 |
| 6438 | #define DDRSS2_PHY_1288_DATA 0x00000000 |
| 6439 | #define DDRSS2_PHY_1289_DATA 0x00000000 |
| 6440 | #define DDRSS2_PHY_1290_DATA 0x00000000 |
| 6441 | #define DDRSS2_PHY_1291_DATA 0x00002001 |
| 6442 | #define DDRSS2_PHY_1292_DATA 0x0000400F |
| 6443 | #define DDRSS2_PHY_1293_DATA 0x50020028 |
| 6444 | #define DDRSS2_PHY_1294_DATA 0x01010000 |
| 6445 | #define DDRSS2_PHY_1295_DATA 0x80080001 |
| 6446 | #define DDRSS2_PHY_1296_DATA 0x10200000 |
| 6447 | #define DDRSS2_PHY_1297_DATA 0x00000008 |
| 6448 | #define DDRSS2_PHY_1298_DATA 0x00000000 |
| 6449 | #define DDRSS2_PHY_1299_DATA 0x01090E00 |
| 6450 | #define DDRSS2_PHY_1300_DATA 0x00040101 |
| 6451 | #define DDRSS2_PHY_1301_DATA 0x0000010F |
| 6452 | #define DDRSS2_PHY_1302_DATA 0x00000000 |
| 6453 | #define DDRSS2_PHY_1303_DATA 0x0000FFFF |
| 6454 | #define DDRSS2_PHY_1304_DATA 0x00000000 |
| 6455 | #define DDRSS2_PHY_1305_DATA 0x01010000 |
| 6456 | #define DDRSS2_PHY_1306_DATA 0x01080402 |
| 6457 | #define DDRSS2_PHY_1307_DATA 0x01200F02 |
| 6458 | #define DDRSS2_PHY_1308_DATA 0x00194280 |
| 6459 | #define DDRSS2_PHY_1309_DATA 0x00000004 |
| 6460 | #define DDRSS2_PHY_1310_DATA 0x00042000 |
| 6461 | #define DDRSS2_PHY_1311_DATA 0x00000000 |
| 6462 | #define DDRSS2_PHY_1312_DATA 0x00000000 |
| 6463 | #define DDRSS2_PHY_1313_DATA 0x00000000 |
| 6464 | #define DDRSS2_PHY_1314_DATA 0x00000000 |
| 6465 | #define DDRSS2_PHY_1315_DATA 0x00000000 |
| 6466 | #define DDRSS2_PHY_1316_DATA 0x00000000 |
| 6467 | #define DDRSS2_PHY_1317_DATA 0x01000000 |
| 6468 | #define DDRSS2_PHY_1318_DATA 0x00000705 |
| 6469 | #define DDRSS2_PHY_1319_DATA 0x00000054 |
| 6470 | #define DDRSS2_PHY_1320_DATA 0x00030820 |
| 6471 | #define DDRSS2_PHY_1321_DATA 0x00010820 |
| 6472 | #define DDRSS2_PHY_1322_DATA 0x00010820 |
| 6473 | #define DDRSS2_PHY_1323_DATA 0x00010820 |
| 6474 | #define DDRSS2_PHY_1324_DATA 0x00010820 |
| 6475 | #define DDRSS2_PHY_1325_DATA 0x00010820 |
| 6476 | #define DDRSS2_PHY_1326_DATA 0x00010820 |
| 6477 | #define DDRSS2_PHY_1327_DATA 0x00010820 |
| 6478 | #define DDRSS2_PHY_1328_DATA 0x00010820 |
| 6479 | #define DDRSS2_PHY_1329_DATA 0x00000000 |
| 6480 | #define DDRSS2_PHY_1330_DATA 0x00000074 |
| 6481 | #define DDRSS2_PHY_1331_DATA 0x00000400 |
| 6482 | #define DDRSS2_PHY_1332_DATA 0x00000108 |
| 6483 | #define DDRSS2_PHY_1333_DATA 0x00000000 |
| 6484 | #define DDRSS2_PHY_1334_DATA 0x00000000 |
| 6485 | #define DDRSS2_PHY_1335_DATA 0x00000000 |
| 6486 | #define DDRSS2_PHY_1336_DATA 0x00000000 |
| 6487 | #define DDRSS2_PHY_1337_DATA 0x00000000 |
| 6488 | #define DDRSS2_PHY_1338_DATA 0x03000000 |
| 6489 | #define DDRSS2_PHY_1339_DATA 0x00000000 |
| 6490 | #define DDRSS2_PHY_1340_DATA 0x00000000 |
| 6491 | #define DDRSS2_PHY_1341_DATA 0x00000000 |
| 6492 | #define DDRSS2_PHY_1342_DATA 0x04102006 |
| 6493 | #define DDRSS2_PHY_1343_DATA 0x00041020 |
| 6494 | #define DDRSS2_PHY_1344_DATA 0x01C98C98 |
| 6495 | #define DDRSS2_PHY_1345_DATA 0x3F400000 |
| 6496 | #define DDRSS2_PHY_1346_DATA 0x3F3F1F3F |
| 6497 | #define DDRSS2_PHY_1347_DATA 0x0000001F |
| 6498 | #define DDRSS2_PHY_1348_DATA 0x00000000 |
| 6499 | #define DDRSS2_PHY_1349_DATA 0x00000000 |
| 6500 | #define DDRSS2_PHY_1350_DATA 0x00000000 |
| 6501 | #define DDRSS2_PHY_1351_DATA 0x00010000 |
| 6502 | #define DDRSS2_PHY_1352_DATA 0x00000000 |
| 6503 | #define DDRSS2_PHY_1353_DATA 0x00000000 |
| 6504 | #define DDRSS2_PHY_1354_DATA 0x00000000 |
| 6505 | #define DDRSS2_PHY_1355_DATA 0x00000000 |
| 6506 | #define DDRSS2_PHY_1356_DATA 0x76543210 |
| 6507 | #define DDRSS2_PHY_1357_DATA 0x00010198 |
| 6508 | #define DDRSS2_PHY_1358_DATA 0x00000000 |
| 6509 | #define DDRSS2_PHY_1359_DATA 0x00000000 |
| 6510 | #define DDRSS2_PHY_1360_DATA 0x00000000 |
| 6511 | #define DDRSS2_PHY_1361_DATA 0x00040700 |
| 6512 | #define DDRSS2_PHY_1362_DATA 0x00000000 |
| 6513 | #define DDRSS2_PHY_1363_DATA 0x00000000 |
| 6514 | #define DDRSS2_PHY_1364_DATA 0x00000000 |
| 6515 | #define DDRSS2_PHY_1365_DATA 0x00000000 |
| 6516 | #define DDRSS2_PHY_1366_DATA 0x00000000 |
| 6517 | #define DDRSS2_PHY_1367_DATA 0x00000002 |
| 6518 | #define DDRSS2_PHY_1368_DATA 0x00000000 |
| 6519 | #define DDRSS2_PHY_1369_DATA 0x00000000 |
| 6520 | #define DDRSS2_PHY_1370_DATA 0x00000000 |
| 6521 | #define DDRSS2_PHY_1371_DATA 0x00000000 |
| 6522 | #define DDRSS2_PHY_1372_DATA 0x00000000 |
| 6523 | #define DDRSS2_PHY_1373_DATA 0x00000000 |
| 6524 | #define DDRSS2_PHY_1374_DATA 0x00080000 |
| 6525 | #define DDRSS2_PHY_1375_DATA 0x000007FF |
| 6526 | #define DDRSS2_PHY_1376_DATA 0x00000000 |
| 6527 | #define DDRSS2_PHY_1377_DATA 0x00000000 |
| 6528 | #define DDRSS2_PHY_1378_DATA 0x00000000 |
| 6529 | #define DDRSS2_PHY_1379_DATA 0x00000000 |
| 6530 | #define DDRSS2_PHY_1380_DATA 0x00000000 |
| 6531 | #define DDRSS2_PHY_1381_DATA 0x00000000 |
| 6532 | #define DDRSS2_PHY_1382_DATA 0x000FFFFF |
| 6533 | #define DDRSS2_PHY_1383_DATA 0x000FFFFF |
| 6534 | #define DDRSS2_PHY_1384_DATA 0x0000FFFF |
| 6535 | #define DDRSS2_PHY_1385_DATA 0xFFFFFFF0 |
| 6536 | #define DDRSS2_PHY_1386_DATA 0x030FFFFF |
| 6537 | #define DDRSS2_PHY_1387_DATA 0x01FFFFFF |
| 6538 | #define DDRSS2_PHY_1388_DATA 0x0000FFFF |
| 6539 | #define DDRSS2_PHY_1389_DATA 0x00000000 |
| 6540 | #define DDRSS2_PHY_1390_DATA 0x00000000 |
| 6541 | #define DDRSS2_PHY_1391_DATA 0x00000000 |
| 6542 | #define DDRSS2_PHY_1392_DATA 0x00000000 |
| 6543 | #define DDRSS2_PHY_1393_DATA 0x0001F7C0 |
| 6544 | #define DDRSS2_PHY_1394_DATA 0x00000003 |
| 6545 | #define DDRSS2_PHY_1395_DATA 0x00000000 |
| 6546 | #define DDRSS2_PHY_1396_DATA 0x00001142 |
| 6547 | #define DDRSS2_PHY_1397_DATA 0x010207AB |
| 6548 | #define DDRSS2_PHY_1398_DATA 0x01000080 |
| 6549 | #define DDRSS2_PHY_1399_DATA 0x03900390 |
| 6550 | #define DDRSS2_PHY_1400_DATA 0x03900390 |
| 6551 | #define DDRSS2_PHY_1401_DATA 0x00000390 |
| 6552 | #define DDRSS2_PHY_1402_DATA 0x00000390 |
| 6553 | #define DDRSS2_PHY_1403_DATA 0x00000390 |
| 6554 | #define DDRSS2_PHY_1404_DATA 0x00000390 |
| 6555 | #define DDRSS2_PHY_1405_DATA 0x00000005 |
| 6556 | #define DDRSS2_PHY_1406_DATA 0x01813FCC |
| 6557 | #define DDRSS2_PHY_1407_DATA 0x000000CC |
| 6558 | #define DDRSS2_PHY_1408_DATA 0x0C000DFF |
| 6559 | #define DDRSS2_PHY_1409_DATA 0x30000DFF |
| 6560 | #define DDRSS2_PHY_1410_DATA 0x3F0DFF11 |
| 6561 | #define DDRSS2_PHY_1411_DATA 0x000100F0 |
| 6562 | #define DDRSS2_PHY_1412_DATA 0x780DFFCC |
| 6563 | #define DDRSS2_PHY_1413_DATA 0x00007E31 |
| 6564 | #define DDRSS2_PHY_1414_DATA 0x000CBF11 |
| 6565 | #define DDRSS2_PHY_1415_DATA 0x01990010 |
| 6566 | #define DDRSS2_PHY_1416_DATA 0x000CBF11 |
| 6567 | #define DDRSS2_PHY_1417_DATA 0x01990010 |
| 6568 | #define DDRSS2_PHY_1418_DATA 0x3F0DFF11 |
| 6569 | #define DDRSS2_PHY_1419_DATA 0x00EF00F0 |
| 6570 | #define DDRSS2_PHY_1420_DATA 0x3F0DFF11 |
| 6571 | #define DDRSS2_PHY_1421_DATA 0x01FF00F0 |
| 6572 | #define DDRSS2_PHY_1422_DATA 0x20040006 |
| 6573 | |
| 6574 | #define DDRSS3_CTL_00_DATA 0x00000B00 |
| 6575 | #define DDRSS3_CTL_01_DATA 0x00000000 |
| 6576 | #define DDRSS3_CTL_02_DATA 0x00000000 |
| 6577 | #define DDRSS3_CTL_03_DATA 0x00000000 |
| 6578 | #define DDRSS3_CTL_04_DATA 0x00000000 |
| 6579 | #define DDRSS3_CTL_05_DATA 0x00000000 |
| 6580 | #define DDRSS3_CTL_06_DATA 0x00000000 |
| 6581 | #define DDRSS3_CTL_07_DATA 0x00002AF8 |
| 6582 | #define DDRSS3_CTL_08_DATA 0x0001ADAF |
| 6583 | #define DDRSS3_CTL_09_DATA 0x00000005 |
| 6584 | #define DDRSS3_CTL_10_DATA 0x0000006E |
| 6585 | #define DDRSS3_CTL_11_DATA 0x000681C8 |
| 6586 | #define DDRSS3_CTL_12_DATA 0x004111C9 |
| 6587 | #define DDRSS3_CTL_13_DATA 0x00000005 |
| 6588 | #define DDRSS3_CTL_14_DATA 0x000010A9 |
| 6589 | #define DDRSS3_CTL_15_DATA 0x000681C8 |
| 6590 | #define DDRSS3_CTL_16_DATA 0x004111C9 |
| 6591 | #define DDRSS3_CTL_17_DATA 0x00000005 |
| 6592 | #define DDRSS3_CTL_18_DATA 0x000010A9 |
| 6593 | #define DDRSS3_CTL_19_DATA 0x01010000 |
| 6594 | #define DDRSS3_CTL_20_DATA 0x02011001 |
| 6595 | #define DDRSS3_CTL_21_DATA 0x02010000 |
| 6596 | #define DDRSS3_CTL_22_DATA 0x00020100 |
| 6597 | #define DDRSS3_CTL_23_DATA 0x0000000B |
| 6598 | #define DDRSS3_CTL_24_DATA 0x0000001C |
| 6599 | #define DDRSS3_CTL_25_DATA 0x00000000 |
| 6600 | #define DDRSS3_CTL_26_DATA 0x00000000 |
| 6601 | #define DDRSS3_CTL_27_DATA 0x03020200 |
| 6602 | #define DDRSS3_CTL_28_DATA 0x00005656 |
| 6603 | #define DDRSS3_CTL_29_DATA 0x00100000 |
| 6604 | #define DDRSS3_CTL_30_DATA 0x00000000 |
| 6605 | #define DDRSS3_CTL_31_DATA 0x00000000 |
| 6606 | #define DDRSS3_CTL_32_DATA 0x00000000 |
| 6607 | #define DDRSS3_CTL_33_DATA 0x00000000 |
| 6608 | #define DDRSS3_CTL_34_DATA 0x040C0000 |
| 6609 | #define DDRSS3_CTL_35_DATA 0x12481248 |
| 6610 | #define DDRSS3_CTL_36_DATA 0x00050804 |
| 6611 | #define DDRSS3_CTL_37_DATA 0x09040008 |
| 6612 | #define DDRSS3_CTL_38_DATA 0x15000204 |
| 6613 | #define DDRSS3_CTL_39_DATA 0x1760008B |
| 6614 | #define DDRSS3_CTL_40_DATA 0x1500422B |
| 6615 | #define DDRSS3_CTL_41_DATA 0x1760008B |
| 6616 | #define DDRSS3_CTL_42_DATA 0x2000422B |
| 6617 | #define DDRSS3_CTL_43_DATA 0x000A0A09 |
| 6618 | #define DDRSS3_CTL_44_DATA 0x040003C5 |
| 6619 | #define DDRSS3_CTL_45_DATA 0x1E161104 |
| 6620 | #define DDRSS3_CTL_46_DATA 0x1000922C |
| 6621 | #define DDRSS3_CTL_47_DATA 0x1E161110 |
| 6622 | #define DDRSS3_CTL_48_DATA 0x1000922C |
| 6623 | #define DDRSS3_CTL_49_DATA 0x02030410 |
| 6624 | #define DDRSS3_CTL_50_DATA 0x2C040500 |
| 6625 | #define DDRSS3_CTL_51_DATA 0x08292C29 |
| 6626 | #define DDRSS3_CTL_52_DATA 0x14000E0A |
| 6627 | #define DDRSS3_CTL_53_DATA 0x04010A0A |
| 6628 | #define DDRSS3_CTL_54_DATA 0x01010004 |
| 6629 | #define DDRSS3_CTL_55_DATA 0x04545408 |
| 6630 | #define DDRSS3_CTL_56_DATA 0x04313104 |
| 6631 | #define DDRSS3_CTL_57_DATA 0x00003131 |
| 6632 | #define DDRSS3_CTL_58_DATA 0x00010100 |
| 6633 | #define DDRSS3_CTL_59_DATA 0x03010000 |
| 6634 | #define DDRSS3_CTL_60_DATA 0x00001508 |
| 6635 | #define DDRSS3_CTL_61_DATA 0x00000063 |
| 6636 | #define DDRSS3_CTL_62_DATA 0x0000032B |
| 6637 | #define DDRSS3_CTL_63_DATA 0x00001035 |
| 6638 | #define DDRSS3_CTL_64_DATA 0x0000032B |
| 6639 | #define DDRSS3_CTL_65_DATA 0x00001035 |
| 6640 | #define DDRSS3_CTL_66_DATA 0x00000005 |
| 6641 | #define DDRSS3_CTL_67_DATA 0x00050000 |
| 6642 | #define DDRSS3_CTL_68_DATA 0x00CB0012 |
| 6643 | #define DDRSS3_CTL_69_DATA 0x00CB0408 |
| 6644 | #define DDRSS3_CTL_70_DATA 0x00400408 |
| 6645 | #define DDRSS3_CTL_71_DATA 0x00120103 |
| 6646 | #define DDRSS3_CTL_72_DATA 0x00100005 |
| 6647 | #define DDRSS3_CTL_73_DATA 0x2F080010 |
| 6648 | #define DDRSS3_CTL_74_DATA 0x0505012F |
| 6649 | #define DDRSS3_CTL_75_DATA 0x0401030A |
| 6650 | #define DDRSS3_CTL_76_DATA 0x041E100B |
| 6651 | #define DDRSS3_CTL_77_DATA 0x100B0401 |
| 6652 | #define DDRSS3_CTL_78_DATA 0x0001041E |
| 6653 | #define DDRSS3_CTL_79_DATA 0x00160016 |
| 6654 | #define DDRSS3_CTL_80_DATA 0x033B033B |
| 6655 | #define DDRSS3_CTL_81_DATA 0x033B033B |
| 6656 | #define DDRSS3_CTL_82_DATA 0x03050505 |
| 6657 | #define DDRSS3_CTL_83_DATA 0x03010303 |
| 6658 | #define DDRSS3_CTL_84_DATA 0x200B100B |
| 6659 | #define DDRSS3_CTL_85_DATA 0x04041004 |
| 6660 | #define DDRSS3_CTL_86_DATA 0x200B100B |
| 6661 | #define DDRSS3_CTL_87_DATA 0x04041004 |
| 6662 | #define DDRSS3_CTL_88_DATA 0x03010000 |
| 6663 | #define DDRSS3_CTL_89_DATA 0x00010000 |
| 6664 | #define DDRSS3_CTL_90_DATA 0x00000000 |
| 6665 | #define DDRSS3_CTL_91_DATA 0x00000000 |
| 6666 | #define DDRSS3_CTL_92_DATA 0x01000000 |
| 6667 | #define DDRSS3_CTL_93_DATA 0x80104002 |
| 6668 | #define DDRSS3_CTL_94_DATA 0x00000000 |
| 6669 | #define DDRSS3_CTL_95_DATA 0x00040005 |
| 6670 | #define DDRSS3_CTL_96_DATA 0x00000000 |
| 6671 | #define DDRSS3_CTL_97_DATA 0x00050000 |
| 6672 | #define DDRSS3_CTL_98_DATA 0x00000004 |
| 6673 | #define DDRSS3_CTL_99_DATA 0x00000000 |
| 6674 | #define DDRSS3_CTL_100_DATA 0x00040005 |
| 6675 | #define DDRSS3_CTL_101_DATA 0x00000000 |
| 6676 | #define DDRSS3_CTL_102_DATA 0x000018C0 |
| 6677 | #define DDRSS3_CTL_103_DATA 0x000018C0 |
| 6678 | #define DDRSS3_CTL_104_DATA 0x000018C0 |
| 6679 | #define DDRSS3_CTL_105_DATA 0x000018C0 |
| 6680 | #define DDRSS3_CTL_106_DATA 0x000018C0 |
| 6681 | #define DDRSS3_CTL_107_DATA 0x00000000 |
| 6682 | #define DDRSS3_CTL_108_DATA 0x000002B5 |
| 6683 | #define DDRSS3_CTL_109_DATA 0x00040D40 |
| 6684 | #define DDRSS3_CTL_110_DATA 0x00040D40 |
| 6685 | #define DDRSS3_CTL_111_DATA 0x00040D40 |
| 6686 | #define DDRSS3_CTL_112_DATA 0x00040D40 |
| 6687 | #define DDRSS3_CTL_113_DATA 0x00040D40 |
| 6688 | #define DDRSS3_CTL_114_DATA 0x00000000 |
| 6689 | #define DDRSS3_CTL_115_DATA 0x00007173 |
| 6690 | #define DDRSS3_CTL_116_DATA 0x00040D40 |
| 6691 | #define DDRSS3_CTL_117_DATA 0x00040D40 |
| 6692 | #define DDRSS3_CTL_118_DATA 0x00040D40 |
| 6693 | #define DDRSS3_CTL_119_DATA 0x00040D40 |
| 6694 | #define DDRSS3_CTL_120_DATA 0x00040D40 |
| 6695 | #define DDRSS3_CTL_121_DATA 0x00000000 |
| 6696 | #define DDRSS3_CTL_122_DATA 0x00007173 |
| 6697 | #define DDRSS3_CTL_123_DATA 0x00000000 |
| 6698 | #define DDRSS3_CTL_124_DATA 0x00000000 |
| 6699 | #define DDRSS3_CTL_125_DATA 0x00000000 |
| 6700 | #define DDRSS3_CTL_126_DATA 0x00000000 |
| 6701 | #define DDRSS3_CTL_127_DATA 0x00000000 |
| 6702 | #define DDRSS3_CTL_128_DATA 0x00000000 |
| 6703 | #define DDRSS3_CTL_129_DATA 0x00000000 |
| 6704 | #define DDRSS3_CTL_130_DATA 0x00000000 |
| 6705 | #define DDRSS3_CTL_131_DATA 0x0B030500 |
| 6706 | #define DDRSS3_CTL_132_DATA 0x00040B04 |
| 6707 | #define DDRSS3_CTL_133_DATA 0x0A090000 |
| 6708 | #define DDRSS3_CTL_134_DATA 0x0A090701 |
| 6709 | #define DDRSS3_CTL_135_DATA 0x0900000E |
| 6710 | #define DDRSS3_CTL_136_DATA 0x0907010A |
| 6711 | #define DDRSS3_CTL_137_DATA 0x00000E0A |
| 6712 | #define DDRSS3_CTL_138_DATA 0x07010A09 |
| 6713 | #define DDRSS3_CTL_139_DATA 0x000E0A09 |
| 6714 | #define DDRSS3_CTL_140_DATA 0x07000401 |
| 6715 | #define DDRSS3_CTL_141_DATA 0x00000000 |
| 6716 | #define DDRSS3_CTL_142_DATA 0x00000000 |
| 6717 | #define DDRSS3_CTL_143_DATA 0x00000000 |
| 6718 | #define DDRSS3_CTL_144_DATA 0x00000000 |
| 6719 | #define DDRSS3_CTL_145_DATA 0x00000000 |
| 6720 | #define DDRSS3_CTL_146_DATA 0x00000000 |
| 6721 | #define DDRSS3_CTL_147_DATA 0x00000000 |
| 6722 | #define DDRSS3_CTL_148_DATA 0x08080000 |
| 6723 | #define DDRSS3_CTL_149_DATA 0x01000000 |
| 6724 | #define DDRSS3_CTL_150_DATA 0x800000C0 |
| 6725 | #define DDRSS3_CTL_151_DATA 0x800000C0 |
| 6726 | #define DDRSS3_CTL_152_DATA 0x800000C0 |
| 6727 | #define DDRSS3_CTL_153_DATA 0x00000000 |
| 6728 | #define DDRSS3_CTL_154_DATA 0x00001500 |
| 6729 | #define DDRSS3_CTL_155_DATA 0x00000000 |
| 6730 | #define DDRSS3_CTL_156_DATA 0x00000001 |
| 6731 | #define DDRSS3_CTL_157_DATA 0x00000002 |
| 6732 | #define DDRSS3_CTL_158_DATA 0x0000100E |
| 6733 | #define DDRSS3_CTL_159_DATA 0x00000000 |
| 6734 | #define DDRSS3_CTL_160_DATA 0x00000000 |
| 6735 | #define DDRSS3_CTL_161_DATA 0x00000000 |
| 6736 | #define DDRSS3_CTL_162_DATA 0x00000000 |
| 6737 | #define DDRSS3_CTL_163_DATA 0x00000000 |
| 6738 | #define DDRSS3_CTL_164_DATA 0x000B0000 |
| 6739 | #define DDRSS3_CTL_165_DATA 0x000E0006 |
| 6740 | #define DDRSS3_CTL_166_DATA 0x000E0404 |
| 6741 | #define DDRSS3_CTL_167_DATA 0x00D601AB |
| 6742 | #define DDRSS3_CTL_168_DATA 0x10100216 |
| 6743 | #define DDRSS3_CTL_169_DATA 0x01AB0216 |
| 6744 | #define DDRSS3_CTL_170_DATA 0x021600D6 |
| 6745 | #define DDRSS3_CTL_171_DATA 0x02161010 |
| 6746 | #define DDRSS3_CTL_172_DATA 0x00000000 |
| 6747 | #define DDRSS3_CTL_173_DATA 0x00000000 |
| 6748 | #define DDRSS3_CTL_174_DATA 0x00000000 |
| 6749 | #define DDRSS3_CTL_175_DATA 0x3FF40084 |
| 6750 | #define DDRSS3_CTL_176_DATA 0x33003FF4 |
| 6751 | #define DDRSS3_CTL_177_DATA 0x00003333 |
| 6752 | #define DDRSS3_CTL_178_DATA 0x35000000 |
| 6753 | #define DDRSS3_CTL_179_DATA 0x27270035 |
| 6754 | #define DDRSS3_CTL_180_DATA 0x0F0F0000 |
| 6755 | #define DDRSS3_CTL_181_DATA 0x16000000 |
| 6756 | #define DDRSS3_CTL_182_DATA 0x00841616 |
| 6757 | #define DDRSS3_CTL_183_DATA 0x3FF43FF4 |
| 6758 | #define DDRSS3_CTL_184_DATA 0x33333300 |
| 6759 | #define DDRSS3_CTL_185_DATA 0x00000000 |
| 6760 | #define DDRSS3_CTL_186_DATA 0x00353500 |
| 6761 | #define DDRSS3_CTL_187_DATA 0x00002727 |
| 6762 | #define DDRSS3_CTL_188_DATA 0x00000F0F |
| 6763 | #define DDRSS3_CTL_189_DATA 0x16161600 |
| 6764 | #define DDRSS3_CTL_190_DATA 0x00000020 |
| 6765 | #define DDRSS3_CTL_191_DATA 0x00000000 |
| 6766 | #define DDRSS3_CTL_192_DATA 0x00000001 |
| 6767 | #define DDRSS3_CTL_193_DATA 0x00000000 |
| 6768 | #define DDRSS3_CTL_194_DATA 0x01000000 |
| 6769 | #define DDRSS3_CTL_195_DATA 0x00000001 |
| 6770 | #define DDRSS3_CTL_196_DATA 0x00000000 |
| 6771 | #define DDRSS3_CTL_197_DATA 0x00000000 |
| 6772 | #define DDRSS3_CTL_198_DATA 0x00000000 |
| 6773 | #define DDRSS3_CTL_199_DATA 0x00000000 |
| 6774 | #define DDRSS3_CTL_200_DATA 0x00000000 |
| 6775 | #define DDRSS3_CTL_201_DATA 0x00000000 |
| 6776 | #define DDRSS3_CTL_202_DATA 0x00000000 |
| 6777 | #define DDRSS3_CTL_203_DATA 0x00000000 |
| 6778 | #define DDRSS3_CTL_204_DATA 0x00000000 |
| 6779 | #define DDRSS3_CTL_205_DATA 0x00000000 |
| 6780 | #define DDRSS3_CTL_206_DATA 0x02000000 |
| 6781 | #define DDRSS3_CTL_207_DATA 0x01080101 |
| 6782 | #define DDRSS3_CTL_208_DATA 0x00000000 |
| 6783 | #define DDRSS3_CTL_209_DATA 0x00000000 |
| 6784 | #define DDRSS3_CTL_210_DATA 0x00000000 |
| 6785 | #define DDRSS3_CTL_211_DATA 0x00000000 |
| 6786 | #define DDRSS3_CTL_212_DATA 0x00000000 |
| 6787 | #define DDRSS3_CTL_213_DATA 0x00000000 |
| 6788 | #define DDRSS3_CTL_214_DATA 0x00000000 |
| 6789 | #define DDRSS3_CTL_215_DATA 0x00000000 |
| 6790 | #define DDRSS3_CTL_216_DATA 0x00000000 |
| 6791 | #define DDRSS3_CTL_217_DATA 0x00000000 |
| 6792 | #define DDRSS3_CTL_218_DATA 0x00000000 |
| 6793 | #define DDRSS3_CTL_219_DATA 0x00000000 |
| 6794 | #define DDRSS3_CTL_220_DATA 0x00000000 |
| 6795 | #define DDRSS3_CTL_221_DATA 0x00000000 |
| 6796 | #define DDRSS3_CTL_222_DATA 0x00001000 |
| 6797 | #define DDRSS3_CTL_223_DATA 0x006403E8 |
| 6798 | #define DDRSS3_CTL_224_DATA 0x00000000 |
| 6799 | #define DDRSS3_CTL_225_DATA 0x00000000 |
| 6800 | #define DDRSS3_CTL_226_DATA 0x00000000 |
| 6801 | #define DDRSS3_CTL_227_DATA 0x15110000 |
| 6802 | #define DDRSS3_CTL_228_DATA 0x00040C18 |
| 6803 | #define DDRSS3_CTL_229_DATA 0xF000C000 |
| 6804 | #define DDRSS3_CTL_230_DATA 0x0000F000 |
| 6805 | #define DDRSS3_CTL_231_DATA 0x00000000 |
| 6806 | #define DDRSS3_CTL_232_DATA 0x00000000 |
| 6807 | #define DDRSS3_CTL_233_DATA 0xC0000000 |
| 6808 | #define DDRSS3_CTL_234_DATA 0xF000F000 |
| 6809 | #define DDRSS3_CTL_235_DATA 0x00000000 |
| 6810 | #define DDRSS3_CTL_236_DATA 0x00000000 |
| 6811 | #define DDRSS3_CTL_237_DATA 0x00000000 |
| 6812 | #define DDRSS3_CTL_238_DATA 0xF000C000 |
| 6813 | #define DDRSS3_CTL_239_DATA 0x0000F000 |
| 6814 | #define DDRSS3_CTL_240_DATA 0x00000000 |
| 6815 | #define DDRSS3_CTL_241_DATA 0x00000000 |
| 6816 | #define DDRSS3_CTL_242_DATA 0x00030000 |
| 6817 | #define DDRSS3_CTL_243_DATA 0x00000000 |
| 6818 | #define DDRSS3_CTL_244_DATA 0x00000000 |
| 6819 | #define DDRSS3_CTL_245_DATA 0x00000000 |
| 6820 | #define DDRSS3_CTL_246_DATA 0x00000000 |
| 6821 | #define DDRSS3_CTL_247_DATA 0x00000000 |
| 6822 | #define DDRSS3_CTL_248_DATA 0x00000000 |
| 6823 | #define DDRSS3_CTL_249_DATA 0x00000000 |
| 6824 | #define DDRSS3_CTL_250_DATA 0x00000000 |
| 6825 | #define DDRSS3_CTL_251_DATA 0x00000000 |
| 6826 | #define DDRSS3_CTL_252_DATA 0x00000000 |
| 6827 | #define DDRSS3_CTL_253_DATA 0x00000000 |
| 6828 | #define DDRSS3_CTL_254_DATA 0x00000000 |
| 6829 | #define DDRSS3_CTL_255_DATA 0x00000000 |
| 6830 | #define DDRSS3_CTL_256_DATA 0x00000000 |
| 6831 | #define DDRSS3_CTL_257_DATA 0x01000200 |
| 6832 | #define DDRSS3_CTL_258_DATA 0x00370040 |
| 6833 | #define DDRSS3_CTL_259_DATA 0x00020008 |
| 6834 | #define DDRSS3_CTL_260_DATA 0x00400100 |
| 6835 | #define DDRSS3_CTL_261_DATA 0x00400855 |
| 6836 | #define DDRSS3_CTL_262_DATA 0x01000200 |
| 6837 | #define DDRSS3_CTL_263_DATA 0x08550040 |
| 6838 | #define DDRSS3_CTL_264_DATA 0x00000040 |
| 6839 | #define DDRSS3_CTL_265_DATA 0x006B0003 |
| 6840 | #define DDRSS3_CTL_266_DATA 0x0100006B |
| 6841 | #define DDRSS3_CTL_267_DATA 0x03030303 |
| 6842 | #define DDRSS3_CTL_268_DATA 0x00000000 |
| 6843 | #define DDRSS3_CTL_269_DATA 0x00000202 |
| 6844 | #define DDRSS3_CTL_270_DATA 0x00001FFF |
| 6845 | #define DDRSS3_CTL_271_DATA 0x3FFF2000 |
| 6846 | #define DDRSS3_CTL_272_DATA 0x03FF0000 |
| 6847 | #define DDRSS3_CTL_273_DATA 0x000103FF |
| 6848 | #define DDRSS3_CTL_274_DATA 0x0FFF0B00 |
| 6849 | #define DDRSS3_CTL_275_DATA 0x01010001 |
| 6850 | #define DDRSS3_CTL_276_DATA 0x01010101 |
| 6851 | #define DDRSS3_CTL_277_DATA 0x01180101 |
| 6852 | #define DDRSS3_CTL_278_DATA 0x00030000 |
| 6853 | #define DDRSS3_CTL_279_DATA 0x00000000 |
| 6854 | #define DDRSS3_CTL_280_DATA 0x00000000 |
| 6855 | #define DDRSS3_CTL_281_DATA 0x00000000 |
| 6856 | #define DDRSS3_CTL_282_DATA 0x00000000 |
| 6857 | #define DDRSS3_CTL_283_DATA 0x00000000 |
| 6858 | #define DDRSS3_CTL_284_DATA 0x00000000 |
| 6859 | #define DDRSS3_CTL_285_DATA 0x00000000 |
| 6860 | #define DDRSS3_CTL_286_DATA 0x00040101 |
| 6861 | #define DDRSS3_CTL_287_DATA 0x04010100 |
| 6862 | #define DDRSS3_CTL_288_DATA 0x00000000 |
| 6863 | #define DDRSS3_CTL_289_DATA 0x00000000 |
| 6864 | #define DDRSS3_CTL_290_DATA 0x03030300 |
| 6865 | #define DDRSS3_CTL_291_DATA 0x00000001 |
| 6866 | #define DDRSS3_CTL_292_DATA 0x00000000 |
| 6867 | #define DDRSS3_CTL_293_DATA 0x00000000 |
| 6868 | #define DDRSS3_CTL_294_DATA 0x00000000 |
| 6869 | #define DDRSS3_CTL_295_DATA 0x00000000 |
| 6870 | #define DDRSS3_CTL_296_DATA 0x00000000 |
| 6871 | #define DDRSS3_CTL_297_DATA 0x00000000 |
| 6872 | #define DDRSS3_CTL_298_DATA 0x00000000 |
| 6873 | #define DDRSS3_CTL_299_DATA 0x00000000 |
| 6874 | #define DDRSS3_CTL_300_DATA 0x00000000 |
| 6875 | #define DDRSS3_CTL_301_DATA 0x00000000 |
| 6876 | #define DDRSS3_CTL_302_DATA 0x00000000 |
| 6877 | #define DDRSS3_CTL_303_DATA 0x00000000 |
| 6878 | #define DDRSS3_CTL_304_DATA 0x00000000 |
| 6879 | #define DDRSS3_CTL_305_DATA 0x00000000 |
| 6880 | #define DDRSS3_CTL_306_DATA 0x00000000 |
| 6881 | #define DDRSS3_CTL_307_DATA 0x00000000 |
| 6882 | #define DDRSS3_CTL_308_DATA 0x00000000 |
| 6883 | #define DDRSS3_CTL_309_DATA 0x00000000 |
| 6884 | #define DDRSS3_CTL_310_DATA 0x00000000 |
| 6885 | #define DDRSS3_CTL_311_DATA 0x00000000 |
| 6886 | #define DDRSS3_CTL_312_DATA 0x00000000 |
| 6887 | #define DDRSS3_CTL_313_DATA 0x01000000 |
| 6888 | #define DDRSS3_CTL_314_DATA 0x00020201 |
| 6889 | #define DDRSS3_CTL_315_DATA 0x01000101 |
| 6890 | #define DDRSS3_CTL_316_DATA 0x01010001 |
| 6891 | #define DDRSS3_CTL_317_DATA 0x00010101 |
| 6892 | #define DDRSS3_CTL_318_DATA 0x050A0A03 |
| 6893 | #define DDRSS3_CTL_319_DATA 0x10081F1F |
| 6894 | #define DDRSS3_CTL_320_DATA 0x00090310 |
| 6895 | #define DDRSS3_CTL_321_DATA 0x0B0C030F |
| 6896 | #define DDRSS3_CTL_322_DATA 0x0B0C0306 |
| 6897 | #define DDRSS3_CTL_323_DATA 0x0C090006 |
| 6898 | #define DDRSS3_CTL_324_DATA 0x0100000C |
| 6899 | #define DDRSS3_CTL_325_DATA 0x08040801 |
| 6900 | #define DDRSS3_CTL_326_DATA 0x00000004 |
| 6901 | #define DDRSS3_CTL_327_DATA 0x00000000 |
| 6902 | #define DDRSS3_CTL_328_DATA 0x00010000 |
| 6903 | #define DDRSS3_CTL_329_DATA 0x00280D00 |
| 6904 | #define DDRSS3_CTL_330_DATA 0x00000001 |
| 6905 | #define DDRSS3_CTL_331_DATA 0x00030001 |
| 6906 | #define DDRSS3_CTL_332_DATA 0x00000000 |
| 6907 | #define DDRSS3_CTL_333_DATA 0x00000000 |
| 6908 | #define DDRSS3_CTL_334_DATA 0x00000000 |
| 6909 | #define DDRSS3_CTL_335_DATA 0x00000000 |
| 6910 | #define DDRSS3_CTL_336_DATA 0x00000000 |
| 6911 | #define DDRSS3_CTL_337_DATA 0x00000000 |
| 6912 | #define DDRSS3_CTL_338_DATA 0x00000000 |
| 6913 | #define DDRSS3_CTL_339_DATA 0x00000000 |
| 6914 | #define DDRSS3_CTL_340_DATA 0x01000000 |
| 6915 | #define DDRSS3_CTL_341_DATA 0x00000001 |
| 6916 | #define DDRSS3_CTL_342_DATA 0x00010100 |
| 6917 | #define DDRSS3_CTL_343_DATA 0x03030000 |
| 6918 | #define DDRSS3_CTL_344_DATA 0x00000000 |
| 6919 | #define DDRSS3_CTL_345_DATA 0x00000000 |
| 6920 | #define DDRSS3_CTL_346_DATA 0x00000000 |
| 6921 | #define DDRSS3_CTL_347_DATA 0x00000000 |
| 6922 | #define DDRSS3_CTL_348_DATA 0x00000000 |
| 6923 | #define DDRSS3_CTL_349_DATA 0x00000000 |
| 6924 | #define DDRSS3_CTL_350_DATA 0x00000000 |
| 6925 | #define DDRSS3_CTL_351_DATA 0x00000000 |
| 6926 | #define DDRSS3_CTL_352_DATA 0x00000000 |
| 6927 | #define DDRSS3_CTL_353_DATA 0x00000000 |
| 6928 | #define DDRSS3_CTL_354_DATA 0x00000000 |
| 6929 | #define DDRSS3_CTL_355_DATA 0x00000000 |
| 6930 | #define DDRSS3_CTL_356_DATA 0x00000000 |
| 6931 | #define DDRSS3_CTL_357_DATA 0x00000000 |
| 6932 | #define DDRSS3_CTL_358_DATA 0x00000000 |
| 6933 | #define DDRSS3_CTL_359_DATA 0x00000000 |
| 6934 | #define DDRSS3_CTL_360_DATA 0x000556AA |
| 6935 | #define DDRSS3_CTL_361_DATA 0x000AAAAA |
| 6936 | #define DDRSS3_CTL_362_DATA 0x000AA955 |
| 6937 | #define DDRSS3_CTL_363_DATA 0x00055555 |
| 6938 | #define DDRSS3_CTL_364_DATA 0x000B3133 |
| 6939 | #define DDRSS3_CTL_365_DATA 0x0004CD33 |
| 6940 | #define DDRSS3_CTL_366_DATA 0x0004CECC |
| 6941 | #define DDRSS3_CTL_367_DATA 0x000B32CC |
| 6942 | #define DDRSS3_CTL_368_DATA 0x00010300 |
| 6943 | #define DDRSS3_CTL_369_DATA 0x03000100 |
| 6944 | #define DDRSS3_CTL_370_DATA 0x00000000 |
| 6945 | #define DDRSS3_CTL_371_DATA 0x00000000 |
| 6946 | #define DDRSS3_CTL_372_DATA 0x00000000 |
| 6947 | #define DDRSS3_CTL_373_DATA 0x00000000 |
| 6948 | #define DDRSS3_CTL_374_DATA 0x00000000 |
| 6949 | #define DDRSS3_CTL_375_DATA 0x00000000 |
| 6950 | #define DDRSS3_CTL_376_DATA 0x00000000 |
| 6951 | #define DDRSS3_CTL_377_DATA 0x00010000 |
| 6952 | #define DDRSS3_CTL_378_DATA 0x00000404 |
| 6953 | #define DDRSS3_CTL_379_DATA 0x00000000 |
| 6954 | #define DDRSS3_CTL_380_DATA 0x00000000 |
| 6955 | #define DDRSS3_CTL_381_DATA 0x00000000 |
| 6956 | #define DDRSS3_CTL_382_DATA 0x00000000 |
| 6957 | #define DDRSS3_CTL_383_DATA 0x00000000 |
| 6958 | #define DDRSS3_CTL_384_DATA 0x00000000 |
| 6959 | #define DDRSS3_CTL_385_DATA 0x00000000 |
| 6960 | #define DDRSS3_CTL_386_DATA 0x00000000 |
| 6961 | #define DDRSS3_CTL_387_DATA 0x3A3A1B00 |
| 6962 | #define DDRSS3_CTL_388_DATA 0x000A0000 |
| 6963 | #define DDRSS3_CTL_389_DATA 0x000000C6 |
| 6964 | #define DDRSS3_CTL_390_DATA 0x00000200 |
| 6965 | #define DDRSS3_CTL_391_DATA 0x00000200 |
| 6966 | #define DDRSS3_CTL_392_DATA 0x00000200 |
| 6967 | #define DDRSS3_CTL_393_DATA 0x00000200 |
| 6968 | #define DDRSS3_CTL_394_DATA 0x00000252 |
| 6969 | #define DDRSS3_CTL_395_DATA 0x000007BC |
| 6970 | #define DDRSS3_CTL_396_DATA 0x00000204 |
| 6971 | #define DDRSS3_CTL_397_DATA 0x0000206A |
| 6972 | #define DDRSS3_CTL_398_DATA 0x00000200 |
| 6973 | #define DDRSS3_CTL_399_DATA 0x00000200 |
| 6974 | #define DDRSS3_CTL_400_DATA 0x00000200 |
| 6975 | #define DDRSS3_CTL_401_DATA 0x00000200 |
| 6976 | #define DDRSS3_CTL_402_DATA 0x0000613E |
| 6977 | #define DDRSS3_CTL_403_DATA 0x00014424 |
| 6978 | #define DDRSS3_CTL_404_DATA 0x00000E15 |
| 6979 | #define DDRSS3_CTL_405_DATA 0x0000206A |
| 6980 | #define DDRSS3_CTL_406_DATA 0x00000200 |
| 6981 | #define DDRSS3_CTL_407_DATA 0x00000200 |
| 6982 | #define DDRSS3_CTL_408_DATA 0x00000200 |
| 6983 | #define DDRSS3_CTL_409_DATA 0x00000200 |
| 6984 | #define DDRSS3_CTL_410_DATA 0x0000613E |
| 6985 | #define DDRSS3_CTL_411_DATA 0x00014424 |
| 6986 | #define DDRSS3_CTL_412_DATA 0x02020E15 |
| 6987 | #define DDRSS3_CTL_413_DATA 0x03030202 |
| 6988 | #define DDRSS3_CTL_414_DATA 0x00000022 |
| 6989 | #define DDRSS3_CTL_415_DATA 0x00000000 |
| 6990 | #define DDRSS3_CTL_416_DATA 0x00000000 |
| 6991 | #define DDRSS3_CTL_417_DATA 0x00001403 |
| 6992 | #define DDRSS3_CTL_418_DATA 0x000007D0 |
| 6993 | #define DDRSS3_CTL_419_DATA 0x00000000 |
| 6994 | #define DDRSS3_CTL_420_DATA 0x00000000 |
| 6995 | #define DDRSS3_CTL_421_DATA 0x00030000 |
| 6996 | #define DDRSS3_CTL_422_DATA 0x0007001F |
| 6997 | #define DDRSS3_CTL_423_DATA 0x001B0033 |
| 6998 | #define DDRSS3_CTL_424_DATA 0x001B0033 |
| 6999 | #define DDRSS3_CTL_425_DATA 0x00000000 |
| 7000 | #define DDRSS3_CTL_426_DATA 0x00000000 |
| 7001 | #define DDRSS3_CTL_427_DATA 0x02000000 |
| 7002 | #define DDRSS3_CTL_428_DATA 0x01000404 |
| 7003 | #define DDRSS3_CTL_429_DATA 0x0B1E0B1E |
| 7004 | #define DDRSS3_CTL_430_DATA 0x00000105 |
| 7005 | #define DDRSS3_CTL_431_DATA 0x00010101 |
| 7006 | #define DDRSS3_CTL_432_DATA 0x00010101 |
| 7007 | #define DDRSS3_CTL_433_DATA 0x00010001 |
| 7008 | #define DDRSS3_CTL_434_DATA 0x00000101 |
| 7009 | #define DDRSS3_CTL_435_DATA 0x02000201 |
| 7010 | #define DDRSS3_CTL_436_DATA 0x02010000 |
| 7011 | #define DDRSS3_CTL_437_DATA 0x00000200 |
| 7012 | #define DDRSS3_CTL_438_DATA 0x28060000 |
| 7013 | #define DDRSS3_CTL_439_DATA 0x00000128 |
| 7014 | #define DDRSS3_CTL_440_DATA 0xFFFFFFFF |
| 7015 | #define DDRSS3_CTL_441_DATA 0xFFFFFFFF |
| 7016 | #define DDRSS3_CTL_442_DATA 0x00000000 |
| 7017 | #define DDRSS3_CTL_443_DATA 0x00000000 |
| 7018 | #define DDRSS3_CTL_444_DATA 0x00000000 |
| 7019 | #define DDRSS3_CTL_445_DATA 0x00000000 |
| 7020 | #define DDRSS3_CTL_446_DATA 0x00000000 |
| 7021 | #define DDRSS3_CTL_447_DATA 0x00000000 |
| 7022 | #define DDRSS3_CTL_448_DATA 0x00000000 |
| 7023 | #define DDRSS3_CTL_449_DATA 0x00000000 |
| 7024 | #define DDRSS3_CTL_450_DATA 0x00000000 |
| 7025 | #define DDRSS3_CTL_451_DATA 0x00000000 |
| 7026 | #define DDRSS3_CTL_452_DATA 0x00000000 |
| 7027 | #define DDRSS3_CTL_453_DATA 0x00000000 |
| 7028 | #define DDRSS3_CTL_454_DATA 0x00000000 |
| 7029 | #define DDRSS3_CTL_455_DATA 0x00000000 |
| 7030 | #define DDRSS3_CTL_456_DATA 0x00000000 |
| 7031 | #define DDRSS3_CTL_457_DATA 0x00000000 |
| 7032 | #define DDRSS3_CTL_458_DATA 0x00000000 |
| 7033 | |
| 7034 | #define DDRSS3_PI_00_DATA 0x00000B00 |
| 7035 | #define DDRSS3_PI_01_DATA 0x00000000 |
| 7036 | #define DDRSS3_PI_02_DATA 0x00000000 |
| 7037 | #define DDRSS3_PI_03_DATA 0x00000000 |
| 7038 | #define DDRSS3_PI_04_DATA 0x00000000 |
| 7039 | #define DDRSS3_PI_05_DATA 0x00000101 |
| 7040 | #define DDRSS3_PI_06_DATA 0x00640000 |
| 7041 | #define DDRSS3_PI_07_DATA 0x00000001 |
| 7042 | #define DDRSS3_PI_08_DATA 0x00000000 |
| 7043 | #define DDRSS3_PI_09_DATA 0x00000000 |
| 7044 | #define DDRSS3_PI_10_DATA 0x00000000 |
| 7045 | #define DDRSS3_PI_11_DATA 0x00000000 |
| 7046 | #define DDRSS3_PI_12_DATA 0x00000007 |
| 7047 | #define DDRSS3_PI_13_DATA 0x00010002 |
| 7048 | #define DDRSS3_PI_14_DATA 0x0800000F |
| 7049 | #define DDRSS3_PI_15_DATA 0x00000103 |
| 7050 | #define DDRSS3_PI_16_DATA 0x00000005 |
| 7051 | #define DDRSS3_PI_17_DATA 0x00000000 |
| 7052 | #define DDRSS3_PI_18_DATA 0x00000000 |
| 7053 | #define DDRSS3_PI_19_DATA 0x00000000 |
| 7054 | #define DDRSS3_PI_20_DATA 0x00000000 |
| 7055 | #define DDRSS3_PI_21_DATA 0x00000000 |
| 7056 | #define DDRSS3_PI_22_DATA 0x00000000 |
| 7057 | #define DDRSS3_PI_23_DATA 0x00000000 |
| 7058 | #define DDRSS3_PI_24_DATA 0x00000000 |
| 7059 | #define DDRSS3_PI_25_DATA 0x00000000 |
| 7060 | #define DDRSS3_PI_26_DATA 0x00010100 |
| 7061 | #define DDRSS3_PI_27_DATA 0x00280A00 |
| 7062 | #define DDRSS3_PI_28_DATA 0x00000000 |
| 7063 | #define DDRSS3_PI_29_DATA 0x0F000000 |
| 7064 | #define DDRSS3_PI_30_DATA 0x00003200 |
| 7065 | #define DDRSS3_PI_31_DATA 0x00000000 |
| 7066 | #define DDRSS3_PI_32_DATA 0x00000000 |
| 7067 | #define DDRSS3_PI_33_DATA 0x01010102 |
| 7068 | #define DDRSS3_PI_34_DATA 0x00000000 |
| 7069 | #define DDRSS3_PI_35_DATA 0x000000AA |
| 7070 | #define DDRSS3_PI_36_DATA 0x00000055 |
| 7071 | #define DDRSS3_PI_37_DATA 0x000000B5 |
| 7072 | #define DDRSS3_PI_38_DATA 0x0000004A |
| 7073 | #define DDRSS3_PI_39_DATA 0x00000056 |
| 7074 | #define DDRSS3_PI_40_DATA 0x000000A9 |
| 7075 | #define DDRSS3_PI_41_DATA 0x000000A9 |
| 7076 | #define DDRSS3_PI_42_DATA 0x000000B5 |
| 7077 | #define DDRSS3_PI_43_DATA 0x00000000 |
| 7078 | #define DDRSS3_PI_44_DATA 0x00000000 |
| 7079 | #define DDRSS3_PI_45_DATA 0x000F0F00 |
| 7080 | #define DDRSS3_PI_46_DATA 0x0000001B |
| 7081 | #define DDRSS3_PI_47_DATA 0x000007D0 |
| 7082 | #define DDRSS3_PI_48_DATA 0x00000300 |
| 7083 | #define DDRSS3_PI_49_DATA 0x00000000 |
| 7084 | #define DDRSS3_PI_50_DATA 0x00000000 |
| 7085 | #define DDRSS3_PI_51_DATA 0x01000000 |
| 7086 | #define DDRSS3_PI_52_DATA 0x00010101 |
| 7087 | #define DDRSS3_PI_53_DATA 0x00000000 |
| 7088 | #define DDRSS3_PI_54_DATA 0x00030000 |
| 7089 | #define DDRSS3_PI_55_DATA 0x0F000000 |
| 7090 | #define DDRSS3_PI_56_DATA 0x00000017 |
| 7091 | #define DDRSS3_PI_57_DATA 0x00000000 |
| 7092 | #define DDRSS3_PI_58_DATA 0x00000000 |
| 7093 | #define DDRSS3_PI_59_DATA 0x00000000 |
| 7094 | #define DDRSS3_PI_60_DATA 0x0A0A140A |
| 7095 | #define DDRSS3_PI_61_DATA 0x10020101 |
| 7096 | #define DDRSS3_PI_62_DATA 0x00020805 |
| 7097 | #define DDRSS3_PI_63_DATA 0x01000404 |
| 7098 | #define DDRSS3_PI_64_DATA 0x00000000 |
| 7099 | #define DDRSS3_PI_65_DATA 0x00000000 |
| 7100 | #define DDRSS3_PI_66_DATA 0x00000100 |
| 7101 | #define DDRSS3_PI_67_DATA 0x0001010F |
| 7102 | #define DDRSS3_PI_68_DATA 0x00340000 |
| 7103 | #define DDRSS3_PI_69_DATA 0x00000000 |
| 7104 | #define DDRSS3_PI_70_DATA 0x00000000 |
| 7105 | #define DDRSS3_PI_71_DATA 0x0000FFFF |
| 7106 | #define DDRSS3_PI_72_DATA 0x00000000 |
| 7107 | #define DDRSS3_PI_73_DATA 0x00080000 |
| 7108 | #define DDRSS3_PI_74_DATA 0x02000200 |
| 7109 | #define DDRSS3_PI_75_DATA 0x01000100 |
| 7110 | #define DDRSS3_PI_76_DATA 0x01000000 |
| 7111 | #define DDRSS3_PI_77_DATA 0x02000200 |
| 7112 | #define DDRSS3_PI_78_DATA 0x00000200 |
| 7113 | #define DDRSS3_PI_79_DATA 0x00000000 |
| 7114 | #define DDRSS3_PI_80_DATA 0x00000000 |
| 7115 | #define DDRSS3_PI_81_DATA 0x00000000 |
| 7116 | #define DDRSS3_PI_82_DATA 0x00000000 |
| 7117 | #define DDRSS3_PI_83_DATA 0x00000000 |
| 7118 | #define DDRSS3_PI_84_DATA 0x00000000 |
| 7119 | #define DDRSS3_PI_85_DATA 0x00000000 |
| 7120 | #define DDRSS3_PI_86_DATA 0x00000000 |
| 7121 | #define DDRSS3_PI_87_DATA 0x00000000 |
| 7122 | #define DDRSS3_PI_88_DATA 0x00000000 |
| 7123 | #define DDRSS3_PI_89_DATA 0x00000000 |
| 7124 | #define DDRSS3_PI_90_DATA 0x00000000 |
| 7125 | #define DDRSS3_PI_91_DATA 0x00000400 |
| 7126 | #define DDRSS3_PI_92_DATA 0x02010000 |
| 7127 | #define DDRSS3_PI_93_DATA 0x00080003 |
| 7128 | #define DDRSS3_PI_94_DATA 0x00080000 |
| 7129 | #define DDRSS3_PI_95_DATA 0x00000001 |
| 7130 | #define DDRSS3_PI_96_DATA 0x00000000 |
| 7131 | #define DDRSS3_PI_97_DATA 0x0000AA00 |
| 7132 | #define DDRSS3_PI_98_DATA 0x00000000 |
| 7133 | #define DDRSS3_PI_99_DATA 0x00000000 |
| 7134 | #define DDRSS3_PI_100_DATA 0x00010000 |
| 7135 | #define DDRSS3_PI_101_DATA 0x00000000 |
| 7136 | #define DDRSS3_PI_102_DATA 0x00000000 |
| 7137 | #define DDRSS3_PI_103_DATA 0x00000000 |
| 7138 | #define DDRSS3_PI_104_DATA 0x00000000 |
| 7139 | #define DDRSS3_PI_105_DATA 0x00000000 |
| 7140 | #define DDRSS3_PI_106_DATA 0x00000000 |
| 7141 | #define DDRSS3_PI_107_DATA 0x00000000 |
| 7142 | #define DDRSS3_PI_108_DATA 0x00000000 |
| 7143 | #define DDRSS3_PI_109_DATA 0x00000000 |
| 7144 | #define DDRSS3_PI_110_DATA 0x00000000 |
| 7145 | #define DDRSS3_PI_111_DATA 0x00000000 |
| 7146 | #define DDRSS3_PI_112_DATA 0x00000000 |
| 7147 | #define DDRSS3_PI_113_DATA 0x00000000 |
| 7148 | #define DDRSS3_PI_114_DATA 0x00000000 |
| 7149 | #define DDRSS3_PI_115_DATA 0x00000000 |
| 7150 | #define DDRSS3_PI_116_DATA 0x00000000 |
| 7151 | #define DDRSS3_PI_117_DATA 0x00000000 |
| 7152 | #define DDRSS3_PI_118_DATA 0x00000000 |
| 7153 | #define DDRSS3_PI_119_DATA 0x00000000 |
| 7154 | #define DDRSS3_PI_120_DATA 0x00000000 |
| 7155 | #define DDRSS3_PI_121_DATA 0x00000000 |
| 7156 | #define DDRSS3_PI_122_DATA 0x00000000 |
| 7157 | #define DDRSS3_PI_123_DATA 0x00000000 |
| 7158 | #define DDRSS3_PI_124_DATA 0x00000000 |
| 7159 | #define DDRSS3_PI_125_DATA 0x00000008 |
| 7160 | #define DDRSS3_PI_126_DATA 0x00000000 |
| 7161 | #define DDRSS3_PI_127_DATA 0x00000000 |
| 7162 | #define DDRSS3_PI_128_DATA 0x00000000 |
| 7163 | #define DDRSS3_PI_129_DATA 0x00000000 |
| 7164 | #define DDRSS3_PI_130_DATA 0x00000000 |
| 7165 | #define DDRSS3_PI_131_DATA 0x00000000 |
| 7166 | #define DDRSS3_PI_132_DATA 0x00000000 |
| 7167 | #define DDRSS3_PI_133_DATA 0x00000000 |
| 7168 | #define DDRSS3_PI_134_DATA 0x00000002 |
| 7169 | #define DDRSS3_PI_135_DATA 0x00000000 |
| 7170 | #define DDRSS3_PI_136_DATA 0x00000000 |
| 7171 | #define DDRSS3_PI_137_DATA 0x0000000A |
| 7172 | #define DDRSS3_PI_138_DATA 0x00000019 |
| 7173 | #define DDRSS3_PI_139_DATA 0x00000100 |
| 7174 | #define DDRSS3_PI_140_DATA 0x00000000 |
| 7175 | #define DDRSS3_PI_141_DATA 0x00000000 |
| 7176 | #define DDRSS3_PI_142_DATA 0x00000000 |
| 7177 | #define DDRSS3_PI_143_DATA 0x00000000 |
| 7178 | #define DDRSS3_PI_144_DATA 0x01000000 |
| 7179 | #define DDRSS3_PI_145_DATA 0x00010003 |
| 7180 | #define DDRSS3_PI_146_DATA 0x02000101 |
| 7181 | #define DDRSS3_PI_147_DATA 0x01030001 |
| 7182 | #define DDRSS3_PI_148_DATA 0x00010400 |
| 7183 | #define DDRSS3_PI_149_DATA 0x06000105 |
| 7184 | #define DDRSS3_PI_150_DATA 0x01070001 |
| 7185 | #define DDRSS3_PI_151_DATA 0x00000000 |
| 7186 | #define DDRSS3_PI_152_DATA 0x00000000 |
| 7187 | #define DDRSS3_PI_153_DATA 0x00000000 |
| 7188 | #define DDRSS3_PI_154_DATA 0x00010001 |
| 7189 | #define DDRSS3_PI_155_DATA 0x00000000 |
| 7190 | #define DDRSS3_PI_156_DATA 0x00000000 |
| 7191 | #define DDRSS3_PI_157_DATA 0x00000000 |
| 7192 | #define DDRSS3_PI_158_DATA 0x00000000 |
| 7193 | #define DDRSS3_PI_159_DATA 0x00000401 |
| 7194 | #define DDRSS3_PI_160_DATA 0x00000000 |
| 7195 | #define DDRSS3_PI_161_DATA 0x00010000 |
| 7196 | #define DDRSS3_PI_162_DATA 0x00000000 |
| 7197 | #define DDRSS3_PI_163_DATA 0x2B2B0200 |
| 7198 | #define DDRSS3_PI_164_DATA 0x00000034 |
| 7199 | #define DDRSS3_PI_165_DATA 0x00000064 |
| 7200 | #define DDRSS3_PI_166_DATA 0x00020064 |
| 7201 | #define DDRSS3_PI_167_DATA 0x02000200 |
| 7202 | #define DDRSS3_PI_168_DATA 0x48120C04 |
| 7203 | #define DDRSS3_PI_169_DATA 0x00154812 |
| 7204 | #define DDRSS3_PI_170_DATA 0x00000063 |
| 7205 | #define DDRSS3_PI_171_DATA 0x0000032B |
| 7206 | #define DDRSS3_PI_172_DATA 0x00001035 |
| 7207 | #define DDRSS3_PI_173_DATA 0x0000032B |
| 7208 | #define DDRSS3_PI_174_DATA 0x04001035 |
| 7209 | #define DDRSS3_PI_175_DATA 0x01010404 |
| 7210 | #define DDRSS3_PI_176_DATA 0x00001501 |
| 7211 | #define DDRSS3_PI_177_DATA 0x00150015 |
| 7212 | #define DDRSS3_PI_178_DATA 0x01000100 |
| 7213 | #define DDRSS3_PI_179_DATA 0x00000100 |
| 7214 | #define DDRSS3_PI_180_DATA 0x00000000 |
| 7215 | #define DDRSS3_PI_181_DATA 0x01010101 |
| 7216 | #define DDRSS3_PI_182_DATA 0x00000101 |
| 7217 | #define DDRSS3_PI_183_DATA 0x00000000 |
| 7218 | #define DDRSS3_PI_184_DATA 0x00000000 |
| 7219 | #define DDRSS3_PI_185_DATA 0x15040000 |
| 7220 | #define DDRSS3_PI_186_DATA 0x0E0E0215 |
| 7221 | #define DDRSS3_PI_187_DATA 0x00040402 |
| 7222 | #define DDRSS3_PI_188_DATA 0x000D0035 |
| 7223 | #define DDRSS3_PI_189_DATA 0x00218049 |
| 7224 | #define DDRSS3_PI_190_DATA 0x00218049 |
| 7225 | #define DDRSS3_PI_191_DATA 0x01010101 |
| 7226 | #define DDRSS3_PI_192_DATA 0x0004000E |
| 7227 | #define DDRSS3_PI_193_DATA 0x00040216 |
| 7228 | #define DDRSS3_PI_194_DATA 0x01000216 |
| 7229 | #define DDRSS3_PI_195_DATA 0x000F000F |
| 7230 | #define DDRSS3_PI_196_DATA 0x02170100 |
| 7231 | #define DDRSS3_PI_197_DATA 0x01000217 |
| 7232 | #define DDRSS3_PI_198_DATA 0x02170217 |
| 7233 | #define DDRSS3_PI_199_DATA 0x32103200 |
| 7234 | #define DDRSS3_PI_200_DATA 0x01013210 |
| 7235 | #define DDRSS3_PI_201_DATA 0x0A070601 |
| 7236 | #define DDRSS3_PI_202_DATA 0x1F130A0D |
| 7237 | #define DDRSS3_PI_203_DATA 0x1F130A14 |
| 7238 | #define DDRSS3_PI_204_DATA 0x0000C014 |
| 7239 | #define DDRSS3_PI_205_DATA 0x00C01000 |
| 7240 | #define DDRSS3_PI_206_DATA 0x00C01000 |
| 7241 | #define DDRSS3_PI_207_DATA 0x00021000 |
| 7242 | #define DDRSS3_PI_208_DATA 0x0024000E |
| 7243 | #define DDRSS3_PI_209_DATA 0x00240216 |
| 7244 | #define DDRSS3_PI_210_DATA 0x00110216 |
| 7245 | #define DDRSS3_PI_211_DATA 0x32000056 |
| 7246 | #define DDRSS3_PI_212_DATA 0x00000301 |
| 7247 | #define DDRSS3_PI_213_DATA 0x005B0036 |
| 7248 | #define DDRSS3_PI_214_DATA 0x03013212 |
| 7249 | #define DDRSS3_PI_215_DATA 0x00003600 |
| 7250 | #define DDRSS3_PI_216_DATA 0x3212005B |
| 7251 | #define DDRSS3_PI_217_DATA 0x09000301 |
| 7252 | #define DDRSS3_PI_218_DATA 0x04010504 |
| 7253 | #define DDRSS3_PI_219_DATA 0x04000364 |
| 7254 | #define DDRSS3_PI_220_DATA 0x0A032001 |
| 7255 | #define DDRSS3_PI_221_DATA 0x2C31110A |
| 7256 | #define DDRSS3_PI_222_DATA 0x00002918 |
| 7257 | #define DDRSS3_PI_223_DATA 0x6000838E |
| 7258 | #define DDRSS3_PI_224_DATA 0x1E202008 |
| 7259 | #define DDRSS3_PI_225_DATA 0x2C311116 |
| 7260 | #define DDRSS3_PI_226_DATA 0x00002918 |
| 7261 | #define DDRSS3_PI_227_DATA 0x6000838E |
| 7262 | #define DDRSS3_PI_228_DATA 0x1E202008 |
| 7263 | #define DDRSS3_PI_229_DATA 0x0000C616 |
| 7264 | #define DDRSS3_PI_230_DATA 0x000007BC |
| 7265 | #define DDRSS3_PI_231_DATA 0x0000206A |
| 7266 | #define DDRSS3_PI_232_DATA 0x00014424 |
| 7267 | #define DDRSS3_PI_233_DATA 0x0000206A |
| 7268 | #define DDRSS3_PI_234_DATA 0x00014424 |
| 7269 | #define DDRSS3_PI_235_DATA 0x033B0016 |
| 7270 | #define DDRSS3_PI_236_DATA 0x0303033B |
| 7271 | #define DDRSS3_PI_237_DATA 0x002AF803 |
| 7272 | #define DDRSS3_PI_238_DATA 0x0001ADAF |
| 7273 | #define DDRSS3_PI_239_DATA 0x00000005 |
| 7274 | #define DDRSS3_PI_240_DATA 0x0000006E |
| 7275 | #define DDRSS3_PI_241_DATA 0x00000016 |
| 7276 | #define DDRSS3_PI_242_DATA 0x000681C8 |
| 7277 | #define DDRSS3_PI_243_DATA 0x0001ADAF |
| 7278 | #define DDRSS3_PI_244_DATA 0x00000005 |
| 7279 | #define DDRSS3_PI_245_DATA 0x000010A9 |
| 7280 | #define DDRSS3_PI_246_DATA 0x0000033B |
| 7281 | #define DDRSS3_PI_247_DATA 0x000681C8 |
| 7282 | #define DDRSS3_PI_248_DATA 0x0001ADAF |
| 7283 | #define DDRSS3_PI_249_DATA 0x00000005 |
| 7284 | #define DDRSS3_PI_250_DATA 0x000010A9 |
| 7285 | #define DDRSS3_PI_251_DATA 0x0100033B |
| 7286 | #define DDRSS3_PI_252_DATA 0x00370040 |
| 7287 | #define DDRSS3_PI_253_DATA 0x00010008 |
| 7288 | #define DDRSS3_PI_254_DATA 0x08550040 |
| 7289 | #define DDRSS3_PI_255_DATA 0x00010040 |
| 7290 | #define DDRSS3_PI_256_DATA 0x08550040 |
| 7291 | #define DDRSS3_PI_257_DATA 0x00000340 |
| 7292 | #define DDRSS3_PI_258_DATA 0x006B006B |
| 7293 | #define DDRSS3_PI_259_DATA 0x08040404 |
| 7294 | #define DDRSS3_PI_260_DATA 0x00000055 |
| 7295 | #define DDRSS3_PI_261_DATA 0x55083C5A |
| 7296 | #define DDRSS3_PI_262_DATA 0x5A000000 |
| 7297 | #define DDRSS3_PI_263_DATA 0x0055083C |
| 7298 | #define DDRSS3_PI_264_DATA 0x3C5A0000 |
| 7299 | #define DDRSS3_PI_265_DATA 0x00005508 |
| 7300 | #define DDRSS3_PI_266_DATA 0x0C3C5A00 |
| 7301 | #define DDRSS3_PI_267_DATA 0x080F0E0D |
| 7302 | #define DDRSS3_PI_268_DATA 0x000B0A09 |
| 7303 | #define DDRSS3_PI_269_DATA 0x00030201 |
| 7304 | #define DDRSS3_PI_270_DATA 0x01000000 |
| 7305 | #define DDRSS3_PI_271_DATA 0x04020201 |
| 7306 | #define DDRSS3_PI_272_DATA 0x00080804 |
| 7307 | #define DDRSS3_PI_273_DATA 0x00000000 |
| 7308 | #define DDRSS3_PI_274_DATA 0x00000000 |
| 7309 | #define DDRSS3_PI_275_DATA 0x00330084 |
| 7310 | #define DDRSS3_PI_276_DATA 0x00160000 |
| 7311 | #define DDRSS3_PI_277_DATA 0x35333FF4 |
| 7312 | #define DDRSS3_PI_278_DATA 0x00160F27 |
| 7313 | #define DDRSS3_PI_279_DATA 0x35333FF4 |
| 7314 | #define DDRSS3_PI_280_DATA 0x00160F27 |
| 7315 | #define DDRSS3_PI_281_DATA 0x00330084 |
| 7316 | #define DDRSS3_PI_282_DATA 0x00160000 |
| 7317 | #define DDRSS3_PI_283_DATA 0x35333FF4 |
| 7318 | #define DDRSS3_PI_284_DATA 0x00160F27 |
| 7319 | #define DDRSS3_PI_285_DATA 0x35333FF4 |
| 7320 | #define DDRSS3_PI_286_DATA 0x00160F27 |
| 7321 | #define DDRSS3_PI_287_DATA 0x00330084 |
| 7322 | #define DDRSS3_PI_288_DATA 0x00160000 |
| 7323 | #define DDRSS3_PI_289_DATA 0x35333FF4 |
| 7324 | #define DDRSS3_PI_290_DATA 0x00160F27 |
| 7325 | #define DDRSS3_PI_291_DATA 0x35333FF4 |
| 7326 | #define DDRSS3_PI_292_DATA 0x00160F27 |
| 7327 | #define DDRSS3_PI_293_DATA 0x00330084 |
| 7328 | #define DDRSS3_PI_294_DATA 0x00160000 |
| 7329 | #define DDRSS3_PI_295_DATA 0x35333FF4 |
| 7330 | #define DDRSS3_PI_296_DATA 0x00160F27 |
| 7331 | #define DDRSS3_PI_297_DATA 0x35333FF4 |
| 7332 | #define DDRSS3_PI_298_DATA 0x00160F27 |
| 7333 | #define DDRSS3_PI_299_DATA 0x00000000 |
| 7334 | |
| 7335 | #define DDRSS3_PHY_00_DATA 0x000004F0 |
| 7336 | #define DDRSS3_PHY_01_DATA 0x00000000 |
| 7337 | #define DDRSS3_PHY_02_DATA 0x00030200 |
| 7338 | #define DDRSS3_PHY_03_DATA 0x00000000 |
| 7339 | #define DDRSS3_PHY_04_DATA 0x00000000 |
| 7340 | #define DDRSS3_PHY_05_DATA 0x01030000 |
| 7341 | #define DDRSS3_PHY_06_DATA 0x00010000 |
| 7342 | #define DDRSS3_PHY_07_DATA 0x01030004 |
| 7343 | #define DDRSS3_PHY_08_DATA 0x01000000 |
| 7344 | #define DDRSS3_PHY_09_DATA 0x00000000 |
| 7345 | #define DDRSS3_PHY_10_DATA 0x00000000 |
| 7346 | #define DDRSS3_PHY_11_DATA 0x01000001 |
| 7347 | #define DDRSS3_PHY_12_DATA 0x00000100 |
| 7348 | #define DDRSS3_PHY_13_DATA 0x000800C0 |
| 7349 | #define DDRSS3_PHY_14_DATA 0x060100CC |
| 7350 | #define DDRSS3_PHY_15_DATA 0x00030066 |
| 7351 | #define DDRSS3_PHY_16_DATA 0x00000000 |
| 7352 | #define DDRSS3_PHY_17_DATA 0x00000301 |
| 7353 | #define DDRSS3_PHY_18_DATA 0x0000AAAA |
| 7354 | #define DDRSS3_PHY_19_DATA 0x00005555 |
| 7355 | #define DDRSS3_PHY_20_DATA 0x0000B5B5 |
| 7356 | #define DDRSS3_PHY_21_DATA 0x00004A4A |
| 7357 | #define DDRSS3_PHY_22_DATA 0x00005656 |
| 7358 | #define DDRSS3_PHY_23_DATA 0x0000A9A9 |
| 7359 | #define DDRSS3_PHY_24_DATA 0x0000A9A9 |
| 7360 | #define DDRSS3_PHY_25_DATA 0x0000B5B5 |
| 7361 | #define DDRSS3_PHY_26_DATA 0x00000000 |
| 7362 | #define DDRSS3_PHY_27_DATA 0x00000000 |
| 7363 | #define DDRSS3_PHY_28_DATA 0x2A000000 |
| 7364 | #define DDRSS3_PHY_29_DATA 0x00000808 |
| 7365 | #define DDRSS3_PHY_30_DATA 0x0F000000 |
| 7366 | #define DDRSS3_PHY_31_DATA 0x00000F0F |
| 7367 | #define DDRSS3_PHY_32_DATA 0x10400000 |
| 7368 | #define DDRSS3_PHY_33_DATA 0x0C002006 |
| 7369 | #define DDRSS3_PHY_34_DATA 0x00000000 |
| 7370 | #define DDRSS3_PHY_35_DATA 0x00000000 |
| 7371 | #define DDRSS3_PHY_36_DATA 0x55555555 |
| 7372 | #define DDRSS3_PHY_37_DATA 0xAAAAAAAA |
| 7373 | #define DDRSS3_PHY_38_DATA 0x55555555 |
| 7374 | #define DDRSS3_PHY_39_DATA 0xAAAAAAAA |
| 7375 | #define DDRSS3_PHY_40_DATA 0x00005555 |
| 7376 | #define DDRSS3_PHY_41_DATA 0x01000100 |
| 7377 | #define DDRSS3_PHY_42_DATA 0x00800180 |
| 7378 | #define DDRSS3_PHY_43_DATA 0x00000001 |
| 7379 | #define DDRSS3_PHY_44_DATA 0x00000000 |
| 7380 | #define DDRSS3_PHY_45_DATA 0x00000000 |
| 7381 | #define DDRSS3_PHY_46_DATA 0x00000000 |
| 7382 | #define DDRSS3_PHY_47_DATA 0x00000000 |
| 7383 | #define DDRSS3_PHY_48_DATA 0x00000000 |
| 7384 | #define DDRSS3_PHY_49_DATA 0x00000000 |
| 7385 | #define DDRSS3_PHY_50_DATA 0x00000000 |
| 7386 | #define DDRSS3_PHY_51_DATA 0x00000000 |
| 7387 | #define DDRSS3_PHY_52_DATA 0x00000000 |
| 7388 | #define DDRSS3_PHY_53_DATA 0x00000000 |
| 7389 | #define DDRSS3_PHY_54_DATA 0x00000000 |
| 7390 | #define DDRSS3_PHY_55_DATA 0x00000000 |
| 7391 | #define DDRSS3_PHY_56_DATA 0x00000000 |
| 7392 | #define DDRSS3_PHY_57_DATA 0x00000000 |
| 7393 | #define DDRSS3_PHY_58_DATA 0x00000000 |
| 7394 | #define DDRSS3_PHY_59_DATA 0x00000000 |
| 7395 | #define DDRSS3_PHY_60_DATA 0x00000000 |
| 7396 | #define DDRSS3_PHY_61_DATA 0x00000000 |
| 7397 | #define DDRSS3_PHY_62_DATA 0x00000000 |
| 7398 | #define DDRSS3_PHY_63_DATA 0x00000000 |
| 7399 | #define DDRSS3_PHY_64_DATA 0x00000000 |
| 7400 | #define DDRSS3_PHY_65_DATA 0x00000000 |
| 7401 | #define DDRSS3_PHY_66_DATA 0x00000104 |
| 7402 | #define DDRSS3_PHY_67_DATA 0x00000120 |
| 7403 | #define DDRSS3_PHY_68_DATA 0x00000000 |
| 7404 | #define DDRSS3_PHY_69_DATA 0x00000000 |
| 7405 | #define DDRSS3_PHY_70_DATA 0x00000000 |
| 7406 | #define DDRSS3_PHY_71_DATA 0x00000000 |
| 7407 | #define DDRSS3_PHY_72_DATA 0x00000000 |
| 7408 | #define DDRSS3_PHY_73_DATA 0x00000000 |
| 7409 | #define DDRSS3_PHY_74_DATA 0x00000000 |
| 7410 | #define DDRSS3_PHY_75_DATA 0x00000001 |
| 7411 | #define DDRSS3_PHY_76_DATA 0x07FF0000 |
| 7412 | #define DDRSS3_PHY_77_DATA 0x0080081F |
| 7413 | #define DDRSS3_PHY_78_DATA 0x00081020 |
| 7414 | #define DDRSS3_PHY_79_DATA 0x04010000 |
| 7415 | #define DDRSS3_PHY_80_DATA 0x00000000 |
| 7416 | #define DDRSS3_PHY_81_DATA 0x00000000 |
| 7417 | #define DDRSS3_PHY_82_DATA 0x00000000 |
| 7418 | #define DDRSS3_PHY_83_DATA 0x00000100 |
| 7419 | #define DDRSS3_PHY_84_DATA 0x01CC0C01 |
| 7420 | #define DDRSS3_PHY_85_DATA 0x1003CC0C |
| 7421 | #define DDRSS3_PHY_86_DATA 0x20000140 |
| 7422 | #define DDRSS3_PHY_87_DATA 0x07FF0200 |
| 7423 | #define DDRSS3_PHY_88_DATA 0x0000DD01 |
| 7424 | #define DDRSS3_PHY_89_DATA 0x10100303 |
| 7425 | #define DDRSS3_PHY_90_DATA 0x10101010 |
| 7426 | #define DDRSS3_PHY_91_DATA 0x10101010 |
| 7427 | #define DDRSS3_PHY_92_DATA 0x00021010 |
| 7428 | #define DDRSS3_PHY_93_DATA 0x00100010 |
| 7429 | #define DDRSS3_PHY_94_DATA 0x00100010 |
| 7430 | #define DDRSS3_PHY_95_DATA 0x00100010 |
| 7431 | #define DDRSS3_PHY_96_DATA 0x00100010 |
| 7432 | #define DDRSS3_PHY_97_DATA 0x00050010 |
| 7433 | #define DDRSS3_PHY_98_DATA 0x51517041 |
| 7434 | #define DDRSS3_PHY_99_DATA 0x31C06001 |
| 7435 | #define DDRSS3_PHY_100_DATA 0x07AB0340 |
| 7436 | #define DDRSS3_PHY_101_DATA 0x00C0C001 |
| 7437 | #define DDRSS3_PHY_102_DATA 0x0E0D0001 |
| 7438 | #define DDRSS3_PHY_103_DATA 0x10001000 |
| 7439 | #define DDRSS3_PHY_104_DATA 0x0C083E42 |
| 7440 | #define DDRSS3_PHY_105_DATA 0x0F0C3701 |
| 7441 | #define DDRSS3_PHY_106_DATA 0x01000140 |
| 7442 | #define DDRSS3_PHY_107_DATA 0x0C000420 |
| 7443 | #define DDRSS3_PHY_108_DATA 0x00000198 |
| 7444 | #define DDRSS3_PHY_109_DATA 0x0A0000D0 |
| 7445 | #define DDRSS3_PHY_110_DATA 0x00030200 |
| 7446 | #define DDRSS3_PHY_111_DATA 0x02800000 |
| 7447 | #define DDRSS3_PHY_112_DATA 0x80800000 |
| 7448 | #define DDRSS3_PHY_113_DATA 0x000E2010 |
| 7449 | #define DDRSS3_PHY_114_DATA 0x76543210 |
| 7450 | #define DDRSS3_PHY_115_DATA 0x00000008 |
| 7451 | #define DDRSS3_PHY_116_DATA 0x02800280 |
| 7452 | #define DDRSS3_PHY_117_DATA 0x02800280 |
| 7453 | #define DDRSS3_PHY_118_DATA 0x02800280 |
| 7454 | #define DDRSS3_PHY_119_DATA 0x02800280 |
| 7455 | #define DDRSS3_PHY_120_DATA 0x00000280 |
| 7456 | #define DDRSS3_PHY_121_DATA 0x0000A000 |
| 7457 | #define DDRSS3_PHY_122_DATA 0x00A000A0 |
| 7458 | #define DDRSS3_PHY_123_DATA 0x00A000A0 |
| 7459 | #define DDRSS3_PHY_124_DATA 0x00A000A0 |
| 7460 | #define DDRSS3_PHY_125_DATA 0x00A000A0 |
| 7461 | #define DDRSS3_PHY_126_DATA 0x00A000A0 |
| 7462 | #define DDRSS3_PHY_127_DATA 0x00A000A0 |
| 7463 | #define DDRSS3_PHY_128_DATA 0x00A000A0 |
| 7464 | #define DDRSS3_PHY_129_DATA 0x00A000A0 |
| 7465 | #define DDRSS3_PHY_130_DATA 0x01C200A0 |
| 7466 | #define DDRSS3_PHY_131_DATA 0x01A00005 |
| 7467 | #define DDRSS3_PHY_132_DATA 0x00000000 |
| 7468 | #define DDRSS3_PHY_133_DATA 0x00000000 |
| 7469 | #define DDRSS3_PHY_134_DATA 0x00080200 |
| 7470 | #define DDRSS3_PHY_135_DATA 0x00000000 |
| 7471 | #define DDRSS3_PHY_136_DATA 0x20202000 |
| 7472 | #define DDRSS3_PHY_137_DATA 0x20202020 |
| 7473 | #define DDRSS3_PHY_138_DATA 0xF0F02020 |
| 7474 | #define DDRSS3_PHY_139_DATA 0x00000000 |
| 7475 | #define DDRSS3_PHY_140_DATA 0x00000000 |
| 7476 | #define DDRSS3_PHY_141_DATA 0x00000000 |
| 7477 | #define DDRSS3_PHY_142_DATA 0x00000000 |
| 7478 | #define DDRSS3_PHY_143_DATA 0x00000000 |
| 7479 | #define DDRSS3_PHY_144_DATA 0x00000000 |
| 7480 | #define DDRSS3_PHY_145_DATA 0x00000000 |
| 7481 | #define DDRSS3_PHY_146_DATA 0x00000000 |
| 7482 | #define DDRSS3_PHY_147_DATA 0x00000000 |
| 7483 | #define DDRSS3_PHY_148_DATA 0x00000000 |
| 7484 | #define DDRSS3_PHY_149_DATA 0x00000000 |
| 7485 | #define DDRSS3_PHY_150_DATA 0x00000000 |
| 7486 | #define DDRSS3_PHY_151_DATA 0x00000000 |
| 7487 | #define DDRSS3_PHY_152_DATA 0x00000000 |
| 7488 | #define DDRSS3_PHY_153_DATA 0x00000000 |
| 7489 | #define DDRSS3_PHY_154_DATA 0x00000000 |
| 7490 | #define DDRSS3_PHY_155_DATA 0x00000000 |
| 7491 | #define DDRSS3_PHY_156_DATA 0x00000000 |
| 7492 | #define DDRSS3_PHY_157_DATA 0x00000000 |
| 7493 | #define DDRSS3_PHY_158_DATA 0x00000000 |
| 7494 | #define DDRSS3_PHY_159_DATA 0x00000000 |
| 7495 | #define DDRSS3_PHY_160_DATA 0x00000000 |
| 7496 | #define DDRSS3_PHY_161_DATA 0x00000000 |
| 7497 | #define DDRSS3_PHY_162_DATA 0x00000000 |
| 7498 | #define DDRSS3_PHY_163_DATA 0x00000000 |
| 7499 | #define DDRSS3_PHY_164_DATA 0x00000000 |
| 7500 | #define DDRSS3_PHY_165_DATA 0x00000000 |
| 7501 | #define DDRSS3_PHY_166_DATA 0x00000000 |
| 7502 | #define DDRSS3_PHY_167_DATA 0x00000000 |
| 7503 | #define DDRSS3_PHY_168_DATA 0x00000000 |
| 7504 | #define DDRSS3_PHY_169_DATA 0x00000000 |
| 7505 | #define DDRSS3_PHY_170_DATA 0x00000000 |
| 7506 | #define DDRSS3_PHY_171_DATA 0x00000000 |
| 7507 | #define DDRSS3_PHY_172_DATA 0x00000000 |
| 7508 | #define DDRSS3_PHY_173_DATA 0x00000000 |
| 7509 | #define DDRSS3_PHY_174_DATA 0x00000000 |
| 7510 | #define DDRSS3_PHY_175_DATA 0x00000000 |
| 7511 | #define DDRSS3_PHY_176_DATA 0x00000000 |
| 7512 | #define DDRSS3_PHY_177_DATA 0x00000000 |
| 7513 | #define DDRSS3_PHY_178_DATA 0x00000000 |
| 7514 | #define DDRSS3_PHY_179_DATA 0x00000000 |
| 7515 | #define DDRSS3_PHY_180_DATA 0x00000000 |
| 7516 | #define DDRSS3_PHY_181_DATA 0x00000000 |
| 7517 | #define DDRSS3_PHY_182_DATA 0x00000000 |
| 7518 | #define DDRSS3_PHY_183_DATA 0x00000000 |
| 7519 | #define DDRSS3_PHY_184_DATA 0x00000000 |
| 7520 | #define DDRSS3_PHY_185_DATA 0x00000000 |
| 7521 | #define DDRSS3_PHY_186_DATA 0x00000000 |
| 7522 | #define DDRSS3_PHY_187_DATA 0x00000000 |
| 7523 | #define DDRSS3_PHY_188_DATA 0x00000000 |
| 7524 | #define DDRSS3_PHY_189_DATA 0x00000000 |
| 7525 | #define DDRSS3_PHY_190_DATA 0x00000000 |
| 7526 | #define DDRSS3_PHY_191_DATA 0x00000000 |
| 7527 | #define DDRSS3_PHY_192_DATA 0x00000000 |
| 7528 | #define DDRSS3_PHY_193_DATA 0x00000000 |
| 7529 | #define DDRSS3_PHY_194_DATA 0x00000000 |
| 7530 | #define DDRSS3_PHY_195_DATA 0x00000000 |
| 7531 | #define DDRSS3_PHY_196_DATA 0x00000000 |
| 7532 | #define DDRSS3_PHY_197_DATA 0x00000000 |
| 7533 | #define DDRSS3_PHY_198_DATA 0x00000000 |
| 7534 | #define DDRSS3_PHY_199_DATA 0x00000000 |
| 7535 | #define DDRSS3_PHY_200_DATA 0x00000000 |
| 7536 | #define DDRSS3_PHY_201_DATA 0x00000000 |
| 7537 | #define DDRSS3_PHY_202_DATA 0x00000000 |
| 7538 | #define DDRSS3_PHY_203_DATA 0x00000000 |
| 7539 | #define DDRSS3_PHY_204_DATA 0x00000000 |
| 7540 | #define DDRSS3_PHY_205_DATA 0x00000000 |
| 7541 | #define DDRSS3_PHY_206_DATA 0x00000000 |
| 7542 | #define DDRSS3_PHY_207_DATA 0x00000000 |
| 7543 | #define DDRSS3_PHY_208_DATA 0x00000000 |
| 7544 | #define DDRSS3_PHY_209_DATA 0x00000000 |
| 7545 | #define DDRSS3_PHY_210_DATA 0x00000000 |
| 7546 | #define DDRSS3_PHY_211_DATA 0x00000000 |
| 7547 | #define DDRSS3_PHY_212_DATA 0x00000000 |
| 7548 | #define DDRSS3_PHY_213_DATA 0x00000000 |
| 7549 | #define DDRSS3_PHY_214_DATA 0x00000000 |
| 7550 | #define DDRSS3_PHY_215_DATA 0x00000000 |
| 7551 | #define DDRSS3_PHY_216_DATA 0x00000000 |
| 7552 | #define DDRSS3_PHY_217_DATA 0x00000000 |
| 7553 | #define DDRSS3_PHY_218_DATA 0x00000000 |
| 7554 | #define DDRSS3_PHY_219_DATA 0x00000000 |
| 7555 | #define DDRSS3_PHY_220_DATA 0x00000000 |
| 7556 | #define DDRSS3_PHY_221_DATA 0x00000000 |
| 7557 | #define DDRSS3_PHY_222_DATA 0x00000000 |
| 7558 | #define DDRSS3_PHY_223_DATA 0x00000000 |
| 7559 | #define DDRSS3_PHY_224_DATA 0x00000000 |
| 7560 | #define DDRSS3_PHY_225_DATA 0x00000000 |
| 7561 | #define DDRSS3_PHY_226_DATA 0x00000000 |
| 7562 | #define DDRSS3_PHY_227_DATA 0x00000000 |
| 7563 | #define DDRSS3_PHY_228_DATA 0x00000000 |
| 7564 | #define DDRSS3_PHY_229_DATA 0x00000000 |
| 7565 | #define DDRSS3_PHY_230_DATA 0x00000000 |
| 7566 | #define DDRSS3_PHY_231_DATA 0x00000000 |
| 7567 | #define DDRSS3_PHY_232_DATA 0x00000000 |
| 7568 | #define DDRSS3_PHY_233_DATA 0x00000000 |
| 7569 | #define DDRSS3_PHY_234_DATA 0x00000000 |
| 7570 | #define DDRSS3_PHY_235_DATA 0x00000000 |
| 7571 | #define DDRSS3_PHY_236_DATA 0x00000000 |
| 7572 | #define DDRSS3_PHY_237_DATA 0x00000000 |
| 7573 | #define DDRSS3_PHY_238_DATA 0x00000000 |
| 7574 | #define DDRSS3_PHY_239_DATA 0x00000000 |
| 7575 | #define DDRSS3_PHY_240_DATA 0x00000000 |
| 7576 | #define DDRSS3_PHY_241_DATA 0x00000000 |
| 7577 | #define DDRSS3_PHY_242_DATA 0x00000000 |
| 7578 | #define DDRSS3_PHY_243_DATA 0x00000000 |
| 7579 | #define DDRSS3_PHY_244_DATA 0x00000000 |
| 7580 | #define DDRSS3_PHY_245_DATA 0x00000000 |
| 7581 | #define DDRSS3_PHY_246_DATA 0x00000000 |
| 7582 | #define DDRSS3_PHY_247_DATA 0x00000000 |
| 7583 | #define DDRSS3_PHY_248_DATA 0x00000000 |
| 7584 | #define DDRSS3_PHY_249_DATA 0x00000000 |
| 7585 | #define DDRSS3_PHY_250_DATA 0x00000000 |
| 7586 | #define DDRSS3_PHY_251_DATA 0x00000000 |
| 7587 | #define DDRSS3_PHY_252_DATA 0x00000000 |
| 7588 | #define DDRSS3_PHY_253_DATA 0x00000000 |
| 7589 | #define DDRSS3_PHY_254_DATA 0x00000000 |
| 7590 | #define DDRSS3_PHY_255_DATA 0x00000000 |
| 7591 | #define DDRSS3_PHY_256_DATA 0x000004F0 |
| 7592 | #define DDRSS3_PHY_257_DATA 0x00000000 |
| 7593 | #define DDRSS3_PHY_258_DATA 0x00030200 |
| 7594 | #define DDRSS3_PHY_259_DATA 0x00000000 |
| 7595 | #define DDRSS3_PHY_260_DATA 0x00000000 |
| 7596 | #define DDRSS3_PHY_261_DATA 0x01030000 |
| 7597 | #define DDRSS3_PHY_262_DATA 0x00010000 |
| 7598 | #define DDRSS3_PHY_263_DATA 0x01030004 |
| 7599 | #define DDRSS3_PHY_264_DATA 0x01000000 |
| 7600 | #define DDRSS3_PHY_265_DATA 0x00000000 |
| 7601 | #define DDRSS3_PHY_266_DATA 0x00000000 |
| 7602 | #define DDRSS3_PHY_267_DATA 0x01000001 |
| 7603 | #define DDRSS3_PHY_268_DATA 0x00000100 |
| 7604 | #define DDRSS3_PHY_269_DATA 0x000800C0 |
| 7605 | #define DDRSS3_PHY_270_DATA 0x060100CC |
| 7606 | #define DDRSS3_PHY_271_DATA 0x00030066 |
| 7607 | #define DDRSS3_PHY_272_DATA 0x00000000 |
| 7608 | #define DDRSS3_PHY_273_DATA 0x00000301 |
| 7609 | #define DDRSS3_PHY_274_DATA 0x0000AAAA |
| 7610 | #define DDRSS3_PHY_275_DATA 0x00005555 |
| 7611 | #define DDRSS3_PHY_276_DATA 0x0000B5B5 |
| 7612 | #define DDRSS3_PHY_277_DATA 0x00004A4A |
| 7613 | #define DDRSS3_PHY_278_DATA 0x00005656 |
| 7614 | #define DDRSS3_PHY_279_DATA 0x0000A9A9 |
| 7615 | #define DDRSS3_PHY_280_DATA 0x0000A9A9 |
| 7616 | #define DDRSS3_PHY_281_DATA 0x0000B5B5 |
| 7617 | #define DDRSS3_PHY_282_DATA 0x00000000 |
| 7618 | #define DDRSS3_PHY_283_DATA 0x00000000 |
| 7619 | #define DDRSS3_PHY_284_DATA 0x2A000000 |
| 7620 | #define DDRSS3_PHY_285_DATA 0x00000808 |
| 7621 | #define DDRSS3_PHY_286_DATA 0x0F000000 |
| 7622 | #define DDRSS3_PHY_287_DATA 0x00000F0F |
| 7623 | #define DDRSS3_PHY_288_DATA 0x10400000 |
| 7624 | #define DDRSS3_PHY_289_DATA 0x0C002006 |
| 7625 | #define DDRSS3_PHY_290_DATA 0x00000000 |
| 7626 | #define DDRSS3_PHY_291_DATA 0x00000000 |
| 7627 | #define DDRSS3_PHY_292_DATA 0x55555555 |
| 7628 | #define DDRSS3_PHY_293_DATA 0xAAAAAAAA |
| 7629 | #define DDRSS3_PHY_294_DATA 0x55555555 |
| 7630 | #define DDRSS3_PHY_295_DATA 0xAAAAAAAA |
| 7631 | #define DDRSS3_PHY_296_DATA 0x00005555 |
| 7632 | #define DDRSS3_PHY_297_DATA 0x01000100 |
| 7633 | #define DDRSS3_PHY_298_DATA 0x00800180 |
| 7634 | #define DDRSS3_PHY_299_DATA 0x00000000 |
| 7635 | #define DDRSS3_PHY_300_DATA 0x00000000 |
| 7636 | #define DDRSS3_PHY_301_DATA 0x00000000 |
| 7637 | #define DDRSS3_PHY_302_DATA 0x00000000 |
| 7638 | #define DDRSS3_PHY_303_DATA 0x00000000 |
| 7639 | #define DDRSS3_PHY_304_DATA 0x00000000 |
| 7640 | #define DDRSS3_PHY_305_DATA 0x00000000 |
| 7641 | #define DDRSS3_PHY_306_DATA 0x00000000 |
| 7642 | #define DDRSS3_PHY_307_DATA 0x00000000 |
| 7643 | #define DDRSS3_PHY_308_DATA 0x00000000 |
| 7644 | #define DDRSS3_PHY_309_DATA 0x00000000 |
| 7645 | #define DDRSS3_PHY_310_DATA 0x00000000 |
| 7646 | #define DDRSS3_PHY_311_DATA 0x00000000 |
| 7647 | #define DDRSS3_PHY_312_DATA 0x00000000 |
| 7648 | #define DDRSS3_PHY_313_DATA 0x00000000 |
| 7649 | #define DDRSS3_PHY_314_DATA 0x00000000 |
| 7650 | #define DDRSS3_PHY_315_DATA 0x00000000 |
| 7651 | #define DDRSS3_PHY_316_DATA 0x00000000 |
| 7652 | #define DDRSS3_PHY_317_DATA 0x00000000 |
| 7653 | #define DDRSS3_PHY_318_DATA 0x00000000 |
| 7654 | #define DDRSS3_PHY_319_DATA 0x00000000 |
| 7655 | #define DDRSS3_PHY_320_DATA 0x00000000 |
| 7656 | #define DDRSS3_PHY_321_DATA 0x00000000 |
| 7657 | #define DDRSS3_PHY_322_DATA 0x00000104 |
| 7658 | #define DDRSS3_PHY_323_DATA 0x00000120 |
| 7659 | #define DDRSS3_PHY_324_DATA 0x00000000 |
| 7660 | #define DDRSS3_PHY_325_DATA 0x00000000 |
| 7661 | #define DDRSS3_PHY_326_DATA 0x00000000 |
| 7662 | #define DDRSS3_PHY_327_DATA 0x00000000 |
| 7663 | #define DDRSS3_PHY_328_DATA 0x00000000 |
| 7664 | #define DDRSS3_PHY_329_DATA 0x00000000 |
| 7665 | #define DDRSS3_PHY_330_DATA 0x00000000 |
| 7666 | #define DDRSS3_PHY_331_DATA 0x00000001 |
| 7667 | #define DDRSS3_PHY_332_DATA 0x07FF0000 |
| 7668 | #define DDRSS3_PHY_333_DATA 0x0080081F |
| 7669 | #define DDRSS3_PHY_334_DATA 0x00081020 |
| 7670 | #define DDRSS3_PHY_335_DATA 0x04010000 |
| 7671 | #define DDRSS3_PHY_336_DATA 0x00000000 |
| 7672 | #define DDRSS3_PHY_337_DATA 0x00000000 |
| 7673 | #define DDRSS3_PHY_338_DATA 0x00000000 |
| 7674 | #define DDRSS3_PHY_339_DATA 0x00000100 |
| 7675 | #define DDRSS3_PHY_340_DATA 0x01CC0C01 |
| 7676 | #define DDRSS3_PHY_341_DATA 0x1003CC0C |
| 7677 | #define DDRSS3_PHY_342_DATA 0x20000140 |
| 7678 | #define DDRSS3_PHY_343_DATA 0x07FF0200 |
| 7679 | #define DDRSS3_PHY_344_DATA 0x0000DD01 |
| 7680 | #define DDRSS3_PHY_345_DATA 0x10100303 |
| 7681 | #define DDRSS3_PHY_346_DATA 0x10101010 |
| 7682 | #define DDRSS3_PHY_347_DATA 0x10101010 |
| 7683 | #define DDRSS3_PHY_348_DATA 0x00021010 |
| 7684 | #define DDRSS3_PHY_349_DATA 0x00100010 |
| 7685 | #define DDRSS3_PHY_350_DATA 0x00100010 |
| 7686 | #define DDRSS3_PHY_351_DATA 0x00100010 |
| 7687 | #define DDRSS3_PHY_352_DATA 0x00100010 |
| 7688 | #define DDRSS3_PHY_353_DATA 0x00050010 |
| 7689 | #define DDRSS3_PHY_354_DATA 0x51517041 |
| 7690 | #define DDRSS3_PHY_355_DATA 0x31C06001 |
| 7691 | #define DDRSS3_PHY_356_DATA 0x07AB0340 |
| 7692 | #define DDRSS3_PHY_357_DATA 0x00C0C001 |
| 7693 | #define DDRSS3_PHY_358_DATA 0x0E0D0001 |
| 7694 | #define DDRSS3_PHY_359_DATA 0x10001000 |
| 7695 | #define DDRSS3_PHY_360_DATA 0x0C083E42 |
| 7696 | #define DDRSS3_PHY_361_DATA 0x0F0C3701 |
| 7697 | #define DDRSS3_PHY_362_DATA 0x01000140 |
| 7698 | #define DDRSS3_PHY_363_DATA 0x0C000420 |
| 7699 | #define DDRSS3_PHY_364_DATA 0x00000198 |
| 7700 | #define DDRSS3_PHY_365_DATA 0x0A0000D0 |
| 7701 | #define DDRSS3_PHY_366_DATA 0x00030200 |
| 7702 | #define DDRSS3_PHY_367_DATA 0x02800000 |
| 7703 | #define DDRSS3_PHY_368_DATA 0x80800000 |
| 7704 | #define DDRSS3_PHY_369_DATA 0x000E2010 |
| 7705 | #define DDRSS3_PHY_370_DATA 0x76543210 |
| 7706 | #define DDRSS3_PHY_371_DATA 0x00000008 |
| 7707 | #define DDRSS3_PHY_372_DATA 0x02800280 |
| 7708 | #define DDRSS3_PHY_373_DATA 0x02800280 |
| 7709 | #define DDRSS3_PHY_374_DATA 0x02800280 |
| 7710 | #define DDRSS3_PHY_375_DATA 0x02800280 |
| 7711 | #define DDRSS3_PHY_376_DATA 0x00000280 |
| 7712 | #define DDRSS3_PHY_377_DATA 0x0000A000 |
| 7713 | #define DDRSS3_PHY_378_DATA 0x00A000A0 |
| 7714 | #define DDRSS3_PHY_379_DATA 0x00A000A0 |
| 7715 | #define DDRSS3_PHY_380_DATA 0x00A000A0 |
| 7716 | #define DDRSS3_PHY_381_DATA 0x00A000A0 |
| 7717 | #define DDRSS3_PHY_382_DATA 0x00A000A0 |
| 7718 | #define DDRSS3_PHY_383_DATA 0x00A000A0 |
| 7719 | #define DDRSS3_PHY_384_DATA 0x00A000A0 |
| 7720 | #define DDRSS3_PHY_385_DATA 0x00A000A0 |
| 7721 | #define DDRSS3_PHY_386_DATA 0x01C200A0 |
| 7722 | #define DDRSS3_PHY_387_DATA 0x01A00005 |
| 7723 | #define DDRSS3_PHY_388_DATA 0x00000000 |
| 7724 | #define DDRSS3_PHY_389_DATA 0x00000000 |
| 7725 | #define DDRSS3_PHY_390_DATA 0x00080200 |
| 7726 | #define DDRSS3_PHY_391_DATA 0x00000000 |
| 7727 | #define DDRSS3_PHY_392_DATA 0x20202000 |
| 7728 | #define DDRSS3_PHY_393_DATA 0x20202020 |
| 7729 | #define DDRSS3_PHY_394_DATA 0xF0F02020 |
| 7730 | #define DDRSS3_PHY_395_DATA 0x00000000 |
| 7731 | #define DDRSS3_PHY_396_DATA 0x00000000 |
| 7732 | #define DDRSS3_PHY_397_DATA 0x00000000 |
| 7733 | #define DDRSS3_PHY_398_DATA 0x00000000 |
| 7734 | #define DDRSS3_PHY_399_DATA 0x00000000 |
| 7735 | #define DDRSS3_PHY_400_DATA 0x00000000 |
| 7736 | #define DDRSS3_PHY_401_DATA 0x00000000 |
| 7737 | #define DDRSS3_PHY_402_DATA 0x00000000 |
| 7738 | #define DDRSS3_PHY_403_DATA 0x00000000 |
| 7739 | #define DDRSS3_PHY_404_DATA 0x00000000 |
| 7740 | #define DDRSS3_PHY_405_DATA 0x00000000 |
| 7741 | #define DDRSS3_PHY_406_DATA 0x00000000 |
| 7742 | #define DDRSS3_PHY_407_DATA 0x00000000 |
| 7743 | #define DDRSS3_PHY_408_DATA 0x00000000 |
| 7744 | #define DDRSS3_PHY_409_DATA 0x00000000 |
| 7745 | #define DDRSS3_PHY_410_DATA 0x00000000 |
| 7746 | #define DDRSS3_PHY_411_DATA 0x00000000 |
| 7747 | #define DDRSS3_PHY_412_DATA 0x00000000 |
| 7748 | #define DDRSS3_PHY_413_DATA 0x00000000 |
| 7749 | #define DDRSS3_PHY_414_DATA 0x00000000 |
| 7750 | #define DDRSS3_PHY_415_DATA 0x00000000 |
| 7751 | #define DDRSS3_PHY_416_DATA 0x00000000 |
| 7752 | #define DDRSS3_PHY_417_DATA 0x00000000 |
| 7753 | #define DDRSS3_PHY_418_DATA 0x00000000 |
| 7754 | #define DDRSS3_PHY_419_DATA 0x00000000 |
| 7755 | #define DDRSS3_PHY_420_DATA 0x00000000 |
| 7756 | #define DDRSS3_PHY_421_DATA 0x00000000 |
| 7757 | #define DDRSS3_PHY_422_DATA 0x00000000 |
| 7758 | #define DDRSS3_PHY_423_DATA 0x00000000 |
| 7759 | #define DDRSS3_PHY_424_DATA 0x00000000 |
| 7760 | #define DDRSS3_PHY_425_DATA 0x00000000 |
| 7761 | #define DDRSS3_PHY_426_DATA 0x00000000 |
| 7762 | #define DDRSS3_PHY_427_DATA 0x00000000 |
| 7763 | #define DDRSS3_PHY_428_DATA 0x00000000 |
| 7764 | #define DDRSS3_PHY_429_DATA 0x00000000 |
| 7765 | #define DDRSS3_PHY_430_DATA 0x00000000 |
| 7766 | #define DDRSS3_PHY_431_DATA 0x00000000 |
| 7767 | #define DDRSS3_PHY_432_DATA 0x00000000 |
| 7768 | #define DDRSS3_PHY_433_DATA 0x00000000 |
| 7769 | #define DDRSS3_PHY_434_DATA 0x00000000 |
| 7770 | #define DDRSS3_PHY_435_DATA 0x00000000 |
| 7771 | #define DDRSS3_PHY_436_DATA 0x00000000 |
| 7772 | #define DDRSS3_PHY_437_DATA 0x00000000 |
| 7773 | #define DDRSS3_PHY_438_DATA 0x00000000 |
| 7774 | #define DDRSS3_PHY_439_DATA 0x00000000 |
| 7775 | #define DDRSS3_PHY_440_DATA 0x00000000 |
| 7776 | #define DDRSS3_PHY_441_DATA 0x00000000 |
| 7777 | #define DDRSS3_PHY_442_DATA 0x00000000 |
| 7778 | #define DDRSS3_PHY_443_DATA 0x00000000 |
| 7779 | #define DDRSS3_PHY_444_DATA 0x00000000 |
| 7780 | #define DDRSS3_PHY_445_DATA 0x00000000 |
| 7781 | #define DDRSS3_PHY_446_DATA 0x00000000 |
| 7782 | #define DDRSS3_PHY_447_DATA 0x00000000 |
| 7783 | #define DDRSS3_PHY_448_DATA 0x00000000 |
| 7784 | #define DDRSS3_PHY_449_DATA 0x00000000 |
| 7785 | #define DDRSS3_PHY_450_DATA 0x00000000 |
| 7786 | #define DDRSS3_PHY_451_DATA 0x00000000 |
| 7787 | #define DDRSS3_PHY_452_DATA 0x00000000 |
| 7788 | #define DDRSS3_PHY_453_DATA 0x00000000 |
| 7789 | #define DDRSS3_PHY_454_DATA 0x00000000 |
| 7790 | #define DDRSS3_PHY_455_DATA 0x00000000 |
| 7791 | #define DDRSS3_PHY_456_DATA 0x00000000 |
| 7792 | #define DDRSS3_PHY_457_DATA 0x00000000 |
| 7793 | #define DDRSS3_PHY_458_DATA 0x00000000 |
| 7794 | #define DDRSS3_PHY_459_DATA 0x00000000 |
| 7795 | #define DDRSS3_PHY_460_DATA 0x00000000 |
| 7796 | #define DDRSS3_PHY_461_DATA 0x00000000 |
| 7797 | #define DDRSS3_PHY_462_DATA 0x00000000 |
| 7798 | #define DDRSS3_PHY_463_DATA 0x00000000 |
| 7799 | #define DDRSS3_PHY_464_DATA 0x00000000 |
| 7800 | #define DDRSS3_PHY_465_DATA 0x00000000 |
| 7801 | #define DDRSS3_PHY_466_DATA 0x00000000 |
| 7802 | #define DDRSS3_PHY_467_DATA 0x00000000 |
| 7803 | #define DDRSS3_PHY_468_DATA 0x00000000 |
| 7804 | #define DDRSS3_PHY_469_DATA 0x00000000 |
| 7805 | #define DDRSS3_PHY_470_DATA 0x00000000 |
| 7806 | #define DDRSS3_PHY_471_DATA 0x00000000 |
| 7807 | #define DDRSS3_PHY_472_DATA 0x00000000 |
| 7808 | #define DDRSS3_PHY_473_DATA 0x00000000 |
| 7809 | #define DDRSS3_PHY_474_DATA 0x00000000 |
| 7810 | #define DDRSS3_PHY_475_DATA 0x00000000 |
| 7811 | #define DDRSS3_PHY_476_DATA 0x00000000 |
| 7812 | #define DDRSS3_PHY_477_DATA 0x00000000 |
| 7813 | #define DDRSS3_PHY_478_DATA 0x00000000 |
| 7814 | #define DDRSS3_PHY_479_DATA 0x00000000 |
| 7815 | #define DDRSS3_PHY_480_DATA 0x00000000 |
| 7816 | #define DDRSS3_PHY_481_DATA 0x00000000 |
| 7817 | #define DDRSS3_PHY_482_DATA 0x00000000 |
| 7818 | #define DDRSS3_PHY_483_DATA 0x00000000 |
| 7819 | #define DDRSS3_PHY_484_DATA 0x00000000 |
| 7820 | #define DDRSS3_PHY_485_DATA 0x00000000 |
| 7821 | #define DDRSS3_PHY_486_DATA 0x00000000 |
| 7822 | #define DDRSS3_PHY_487_DATA 0x00000000 |
| 7823 | #define DDRSS3_PHY_488_DATA 0x00000000 |
| 7824 | #define DDRSS3_PHY_489_DATA 0x00000000 |
| 7825 | #define DDRSS3_PHY_490_DATA 0x00000000 |
| 7826 | #define DDRSS3_PHY_491_DATA 0x00000000 |
| 7827 | #define DDRSS3_PHY_492_DATA 0x00000000 |
| 7828 | #define DDRSS3_PHY_493_DATA 0x00000000 |
| 7829 | #define DDRSS3_PHY_494_DATA 0x00000000 |
| 7830 | #define DDRSS3_PHY_495_DATA 0x00000000 |
| 7831 | #define DDRSS3_PHY_496_DATA 0x00000000 |
| 7832 | #define DDRSS3_PHY_497_DATA 0x00000000 |
| 7833 | #define DDRSS3_PHY_498_DATA 0x00000000 |
| 7834 | #define DDRSS3_PHY_499_DATA 0x00000000 |
| 7835 | #define DDRSS3_PHY_500_DATA 0x00000000 |
| 7836 | #define DDRSS3_PHY_501_DATA 0x00000000 |
| 7837 | #define DDRSS3_PHY_502_DATA 0x00000000 |
| 7838 | #define DDRSS3_PHY_503_DATA 0x00000000 |
| 7839 | #define DDRSS3_PHY_504_DATA 0x00000000 |
| 7840 | #define DDRSS3_PHY_505_DATA 0x00000000 |
| 7841 | #define DDRSS3_PHY_506_DATA 0x00000000 |
| 7842 | #define DDRSS3_PHY_507_DATA 0x00000000 |
| 7843 | #define DDRSS3_PHY_508_DATA 0x00000000 |
| 7844 | #define DDRSS3_PHY_509_DATA 0x00000000 |
| 7845 | #define DDRSS3_PHY_510_DATA 0x00000000 |
| 7846 | #define DDRSS3_PHY_511_DATA 0x00000000 |
| 7847 | #define DDRSS3_PHY_512_DATA 0x000004F0 |
| 7848 | #define DDRSS3_PHY_513_DATA 0x00000000 |
| 7849 | #define DDRSS3_PHY_514_DATA 0x00030200 |
| 7850 | #define DDRSS3_PHY_515_DATA 0x00000000 |
| 7851 | #define DDRSS3_PHY_516_DATA 0x00000000 |
| 7852 | #define DDRSS3_PHY_517_DATA 0x01030000 |
| 7853 | #define DDRSS3_PHY_518_DATA 0x00010000 |
| 7854 | #define DDRSS3_PHY_519_DATA 0x01030004 |
| 7855 | #define DDRSS3_PHY_520_DATA 0x01000000 |
| 7856 | #define DDRSS3_PHY_521_DATA 0x00000000 |
| 7857 | #define DDRSS3_PHY_522_DATA 0x00000000 |
| 7858 | #define DDRSS3_PHY_523_DATA 0x01000001 |
| 7859 | #define DDRSS3_PHY_524_DATA 0x00000100 |
| 7860 | #define DDRSS3_PHY_525_DATA 0x000800C0 |
| 7861 | #define DDRSS3_PHY_526_DATA 0x060100CC |
| 7862 | #define DDRSS3_PHY_527_DATA 0x00030066 |
| 7863 | #define DDRSS3_PHY_528_DATA 0x00000000 |
| 7864 | #define DDRSS3_PHY_529_DATA 0x00000301 |
| 7865 | #define DDRSS3_PHY_530_DATA 0x0000AAAA |
| 7866 | #define DDRSS3_PHY_531_DATA 0x00005555 |
| 7867 | #define DDRSS3_PHY_532_DATA 0x0000B5B5 |
| 7868 | #define DDRSS3_PHY_533_DATA 0x00004A4A |
| 7869 | #define DDRSS3_PHY_534_DATA 0x00005656 |
| 7870 | #define DDRSS3_PHY_535_DATA 0x0000A9A9 |
| 7871 | #define DDRSS3_PHY_536_DATA 0x0000A9A9 |
| 7872 | #define DDRSS3_PHY_537_DATA 0x0000B5B5 |
| 7873 | #define DDRSS3_PHY_538_DATA 0x00000000 |
| 7874 | #define DDRSS3_PHY_539_DATA 0x00000000 |
| 7875 | #define DDRSS3_PHY_540_DATA 0x2A000000 |
| 7876 | #define DDRSS3_PHY_541_DATA 0x00000808 |
| 7877 | #define DDRSS3_PHY_542_DATA 0x0F000000 |
| 7878 | #define DDRSS3_PHY_543_DATA 0x00000F0F |
| 7879 | #define DDRSS3_PHY_544_DATA 0x10400000 |
| 7880 | #define DDRSS3_PHY_545_DATA 0x0C002006 |
| 7881 | #define DDRSS3_PHY_546_DATA 0x00000000 |
| 7882 | #define DDRSS3_PHY_547_DATA 0x00000000 |
| 7883 | #define DDRSS3_PHY_548_DATA 0x55555555 |
| 7884 | #define DDRSS3_PHY_549_DATA 0xAAAAAAAA |
| 7885 | #define DDRSS3_PHY_550_DATA 0x55555555 |
| 7886 | #define DDRSS3_PHY_551_DATA 0xAAAAAAAA |
| 7887 | #define DDRSS3_PHY_552_DATA 0x00005555 |
| 7888 | #define DDRSS3_PHY_553_DATA 0x01000100 |
| 7889 | #define DDRSS3_PHY_554_DATA 0x00800180 |
| 7890 | #define DDRSS3_PHY_555_DATA 0x00000001 |
| 7891 | #define DDRSS3_PHY_556_DATA 0x00000000 |
| 7892 | #define DDRSS3_PHY_557_DATA 0x00000000 |
| 7893 | #define DDRSS3_PHY_558_DATA 0x00000000 |
| 7894 | #define DDRSS3_PHY_559_DATA 0x00000000 |
| 7895 | #define DDRSS3_PHY_560_DATA 0x00000000 |
| 7896 | #define DDRSS3_PHY_561_DATA 0x00000000 |
| 7897 | #define DDRSS3_PHY_562_DATA 0x00000000 |
| 7898 | #define DDRSS3_PHY_563_DATA 0x00000000 |
| 7899 | #define DDRSS3_PHY_564_DATA 0x00000000 |
| 7900 | #define DDRSS3_PHY_565_DATA 0x00000000 |
| 7901 | #define DDRSS3_PHY_566_DATA 0x00000000 |
| 7902 | #define DDRSS3_PHY_567_DATA 0x00000000 |
| 7903 | #define DDRSS3_PHY_568_DATA 0x00000000 |
| 7904 | #define DDRSS3_PHY_569_DATA 0x00000000 |
| 7905 | #define DDRSS3_PHY_570_DATA 0x00000000 |
| 7906 | #define DDRSS3_PHY_571_DATA 0x00000000 |
| 7907 | #define DDRSS3_PHY_572_DATA 0x00000000 |
| 7908 | #define DDRSS3_PHY_573_DATA 0x00000000 |
| 7909 | #define DDRSS3_PHY_574_DATA 0x00000000 |
| 7910 | #define DDRSS3_PHY_575_DATA 0x00000000 |
| 7911 | #define DDRSS3_PHY_576_DATA 0x00000000 |
| 7912 | #define DDRSS3_PHY_577_DATA 0x00000000 |
| 7913 | #define DDRSS3_PHY_578_DATA 0x00000104 |
| 7914 | #define DDRSS3_PHY_579_DATA 0x00000120 |
| 7915 | #define DDRSS3_PHY_580_DATA 0x00000000 |
| 7916 | #define DDRSS3_PHY_581_DATA 0x00000000 |
| 7917 | #define DDRSS3_PHY_582_DATA 0x00000000 |
| 7918 | #define DDRSS3_PHY_583_DATA 0x00000000 |
| 7919 | #define DDRSS3_PHY_584_DATA 0x00000000 |
| 7920 | #define DDRSS3_PHY_585_DATA 0x00000000 |
| 7921 | #define DDRSS3_PHY_586_DATA 0x00000000 |
| 7922 | #define DDRSS3_PHY_587_DATA 0x00000001 |
| 7923 | #define DDRSS3_PHY_588_DATA 0x07FF0000 |
| 7924 | #define DDRSS3_PHY_589_DATA 0x0080081F |
| 7925 | #define DDRSS3_PHY_590_DATA 0x00081020 |
| 7926 | #define DDRSS3_PHY_591_DATA 0x04010000 |
| 7927 | #define DDRSS3_PHY_592_DATA 0x00000000 |
| 7928 | #define DDRSS3_PHY_593_DATA 0x00000000 |
| 7929 | #define DDRSS3_PHY_594_DATA 0x00000000 |
| 7930 | #define DDRSS3_PHY_595_DATA 0x00000100 |
| 7931 | #define DDRSS3_PHY_596_DATA 0x01CC0C01 |
| 7932 | #define DDRSS3_PHY_597_DATA 0x1003CC0C |
| 7933 | #define DDRSS3_PHY_598_DATA 0x20000140 |
| 7934 | #define DDRSS3_PHY_599_DATA 0x07FF0200 |
| 7935 | #define DDRSS3_PHY_600_DATA 0x0000DD01 |
| 7936 | #define DDRSS3_PHY_601_DATA 0x10100303 |
| 7937 | #define DDRSS3_PHY_602_DATA 0x10101010 |
| 7938 | #define DDRSS3_PHY_603_DATA 0x10101010 |
| 7939 | #define DDRSS3_PHY_604_DATA 0x00021010 |
| 7940 | #define DDRSS3_PHY_605_DATA 0x00100010 |
| 7941 | #define DDRSS3_PHY_606_DATA 0x00100010 |
| 7942 | #define DDRSS3_PHY_607_DATA 0x00100010 |
| 7943 | #define DDRSS3_PHY_608_DATA 0x00100010 |
| 7944 | #define DDRSS3_PHY_609_DATA 0x00050010 |
| 7945 | #define DDRSS3_PHY_610_DATA 0x51517041 |
| 7946 | #define DDRSS3_PHY_611_DATA 0x31C06001 |
| 7947 | #define DDRSS3_PHY_612_DATA 0x07AB0340 |
| 7948 | #define DDRSS3_PHY_613_DATA 0x00C0C001 |
| 7949 | #define DDRSS3_PHY_614_DATA 0x0E0D0001 |
| 7950 | #define DDRSS3_PHY_615_DATA 0x10001000 |
| 7951 | #define DDRSS3_PHY_616_DATA 0x0C083E42 |
| 7952 | #define DDRSS3_PHY_617_DATA 0x0F0C3701 |
| 7953 | #define DDRSS3_PHY_618_DATA 0x01000140 |
| 7954 | #define DDRSS3_PHY_619_DATA 0x0C000420 |
| 7955 | #define DDRSS3_PHY_620_DATA 0x00000198 |
| 7956 | #define DDRSS3_PHY_621_DATA 0x0A0000D0 |
| 7957 | #define DDRSS3_PHY_622_DATA 0x00030200 |
| 7958 | #define DDRSS3_PHY_623_DATA 0x02800000 |
| 7959 | #define DDRSS3_PHY_624_DATA 0x80800000 |
| 7960 | #define DDRSS3_PHY_625_DATA 0x000E2010 |
| 7961 | #define DDRSS3_PHY_626_DATA 0x76543210 |
| 7962 | #define DDRSS3_PHY_627_DATA 0x00000008 |
| 7963 | #define DDRSS3_PHY_628_DATA 0x02800280 |
| 7964 | #define DDRSS3_PHY_629_DATA 0x02800280 |
| 7965 | #define DDRSS3_PHY_630_DATA 0x02800280 |
| 7966 | #define DDRSS3_PHY_631_DATA 0x02800280 |
| 7967 | #define DDRSS3_PHY_632_DATA 0x00000280 |
| 7968 | #define DDRSS3_PHY_633_DATA 0x0000A000 |
| 7969 | #define DDRSS3_PHY_634_DATA 0x00A000A0 |
| 7970 | #define DDRSS3_PHY_635_DATA 0x00A000A0 |
| 7971 | #define DDRSS3_PHY_636_DATA 0x00A000A0 |
| 7972 | #define DDRSS3_PHY_637_DATA 0x00A000A0 |
| 7973 | #define DDRSS3_PHY_638_DATA 0x00A000A0 |
| 7974 | #define DDRSS3_PHY_639_DATA 0x00A000A0 |
| 7975 | #define DDRSS3_PHY_640_DATA 0x00A000A0 |
| 7976 | #define DDRSS3_PHY_641_DATA 0x00A000A0 |
| 7977 | #define DDRSS3_PHY_642_DATA 0x01C200A0 |
| 7978 | #define DDRSS3_PHY_643_DATA 0x01A00005 |
| 7979 | #define DDRSS3_PHY_644_DATA 0x00000000 |
| 7980 | #define DDRSS3_PHY_645_DATA 0x00000000 |
| 7981 | #define DDRSS3_PHY_646_DATA 0x00080200 |
| 7982 | #define DDRSS3_PHY_647_DATA 0x00000000 |
| 7983 | #define DDRSS3_PHY_648_DATA 0x20202000 |
| 7984 | #define DDRSS3_PHY_649_DATA 0x20202020 |
| 7985 | #define DDRSS3_PHY_650_DATA 0xF0F02020 |
| 7986 | #define DDRSS3_PHY_651_DATA 0x00000000 |
| 7987 | #define DDRSS3_PHY_652_DATA 0x00000000 |
| 7988 | #define DDRSS3_PHY_653_DATA 0x00000000 |
| 7989 | #define DDRSS3_PHY_654_DATA 0x00000000 |
| 7990 | #define DDRSS3_PHY_655_DATA 0x00000000 |
| 7991 | #define DDRSS3_PHY_656_DATA 0x00000000 |
| 7992 | #define DDRSS3_PHY_657_DATA 0x00000000 |
| 7993 | #define DDRSS3_PHY_658_DATA 0x00000000 |
| 7994 | #define DDRSS3_PHY_659_DATA 0x00000000 |
| 7995 | #define DDRSS3_PHY_660_DATA 0x00000000 |
| 7996 | #define DDRSS3_PHY_661_DATA 0x00000000 |
| 7997 | #define DDRSS3_PHY_662_DATA 0x00000000 |
| 7998 | #define DDRSS3_PHY_663_DATA 0x00000000 |
| 7999 | #define DDRSS3_PHY_664_DATA 0x00000000 |
| 8000 | #define DDRSS3_PHY_665_DATA 0x00000000 |
| 8001 | #define DDRSS3_PHY_666_DATA 0x00000000 |
| 8002 | #define DDRSS3_PHY_667_DATA 0x00000000 |
| 8003 | #define DDRSS3_PHY_668_DATA 0x00000000 |
| 8004 | #define DDRSS3_PHY_669_DATA 0x00000000 |
| 8005 | #define DDRSS3_PHY_670_DATA 0x00000000 |
| 8006 | #define DDRSS3_PHY_671_DATA 0x00000000 |
| 8007 | #define DDRSS3_PHY_672_DATA 0x00000000 |
| 8008 | #define DDRSS3_PHY_673_DATA 0x00000000 |
| 8009 | #define DDRSS3_PHY_674_DATA 0x00000000 |
| 8010 | #define DDRSS3_PHY_675_DATA 0x00000000 |
| 8011 | #define DDRSS3_PHY_676_DATA 0x00000000 |
| 8012 | #define DDRSS3_PHY_677_DATA 0x00000000 |
| 8013 | #define DDRSS3_PHY_678_DATA 0x00000000 |
| 8014 | #define DDRSS3_PHY_679_DATA 0x00000000 |
| 8015 | #define DDRSS3_PHY_680_DATA 0x00000000 |
| 8016 | #define DDRSS3_PHY_681_DATA 0x00000000 |
| 8017 | #define DDRSS3_PHY_682_DATA 0x00000000 |
| 8018 | #define DDRSS3_PHY_683_DATA 0x00000000 |
| 8019 | #define DDRSS3_PHY_684_DATA 0x00000000 |
| 8020 | #define DDRSS3_PHY_685_DATA 0x00000000 |
| 8021 | #define DDRSS3_PHY_686_DATA 0x00000000 |
| 8022 | #define DDRSS3_PHY_687_DATA 0x00000000 |
| 8023 | #define DDRSS3_PHY_688_DATA 0x00000000 |
| 8024 | #define DDRSS3_PHY_689_DATA 0x00000000 |
| 8025 | #define DDRSS3_PHY_690_DATA 0x00000000 |
| 8026 | #define DDRSS3_PHY_691_DATA 0x00000000 |
| 8027 | #define DDRSS3_PHY_692_DATA 0x00000000 |
| 8028 | #define DDRSS3_PHY_693_DATA 0x00000000 |
| 8029 | #define DDRSS3_PHY_694_DATA 0x00000000 |
| 8030 | #define DDRSS3_PHY_695_DATA 0x00000000 |
| 8031 | #define DDRSS3_PHY_696_DATA 0x00000000 |
| 8032 | #define DDRSS3_PHY_697_DATA 0x00000000 |
| 8033 | #define DDRSS3_PHY_698_DATA 0x00000000 |
| 8034 | #define DDRSS3_PHY_699_DATA 0x00000000 |
| 8035 | #define DDRSS3_PHY_700_DATA 0x00000000 |
| 8036 | #define DDRSS3_PHY_701_DATA 0x00000000 |
| 8037 | #define DDRSS3_PHY_702_DATA 0x00000000 |
| 8038 | #define DDRSS3_PHY_703_DATA 0x00000000 |
| 8039 | #define DDRSS3_PHY_704_DATA 0x00000000 |
| 8040 | #define DDRSS3_PHY_705_DATA 0x00000000 |
| 8041 | #define DDRSS3_PHY_706_DATA 0x00000000 |
| 8042 | #define DDRSS3_PHY_707_DATA 0x00000000 |
| 8043 | #define DDRSS3_PHY_708_DATA 0x00000000 |
| 8044 | #define DDRSS3_PHY_709_DATA 0x00000000 |
| 8045 | #define DDRSS3_PHY_710_DATA 0x00000000 |
| 8046 | #define DDRSS3_PHY_711_DATA 0x00000000 |
| 8047 | #define DDRSS3_PHY_712_DATA 0x00000000 |
| 8048 | #define DDRSS3_PHY_713_DATA 0x00000000 |
| 8049 | #define DDRSS3_PHY_714_DATA 0x00000000 |
| 8050 | #define DDRSS3_PHY_715_DATA 0x00000000 |
| 8051 | #define DDRSS3_PHY_716_DATA 0x00000000 |
| 8052 | #define DDRSS3_PHY_717_DATA 0x00000000 |
| 8053 | #define DDRSS3_PHY_718_DATA 0x00000000 |
| 8054 | #define DDRSS3_PHY_719_DATA 0x00000000 |
| 8055 | #define DDRSS3_PHY_720_DATA 0x00000000 |
| 8056 | #define DDRSS3_PHY_721_DATA 0x00000000 |
| 8057 | #define DDRSS3_PHY_722_DATA 0x00000000 |
| 8058 | #define DDRSS3_PHY_723_DATA 0x00000000 |
| 8059 | #define DDRSS3_PHY_724_DATA 0x00000000 |
| 8060 | #define DDRSS3_PHY_725_DATA 0x00000000 |
| 8061 | #define DDRSS3_PHY_726_DATA 0x00000000 |
| 8062 | #define DDRSS3_PHY_727_DATA 0x00000000 |
| 8063 | #define DDRSS3_PHY_728_DATA 0x00000000 |
| 8064 | #define DDRSS3_PHY_729_DATA 0x00000000 |
| 8065 | #define DDRSS3_PHY_730_DATA 0x00000000 |
| 8066 | #define DDRSS3_PHY_731_DATA 0x00000000 |
| 8067 | #define DDRSS3_PHY_732_DATA 0x00000000 |
| 8068 | #define DDRSS3_PHY_733_DATA 0x00000000 |
| 8069 | #define DDRSS3_PHY_734_DATA 0x00000000 |
| 8070 | #define DDRSS3_PHY_735_DATA 0x00000000 |
| 8071 | #define DDRSS3_PHY_736_DATA 0x00000000 |
| 8072 | #define DDRSS3_PHY_737_DATA 0x00000000 |
| 8073 | #define DDRSS3_PHY_738_DATA 0x00000000 |
| 8074 | #define DDRSS3_PHY_739_DATA 0x00000000 |
| 8075 | #define DDRSS3_PHY_740_DATA 0x00000000 |
| 8076 | #define DDRSS3_PHY_741_DATA 0x00000000 |
| 8077 | #define DDRSS3_PHY_742_DATA 0x00000000 |
| 8078 | #define DDRSS3_PHY_743_DATA 0x00000000 |
| 8079 | #define DDRSS3_PHY_744_DATA 0x00000000 |
| 8080 | #define DDRSS3_PHY_745_DATA 0x00000000 |
| 8081 | #define DDRSS3_PHY_746_DATA 0x00000000 |
| 8082 | #define DDRSS3_PHY_747_DATA 0x00000000 |
| 8083 | #define DDRSS3_PHY_748_DATA 0x00000000 |
| 8084 | #define DDRSS3_PHY_749_DATA 0x00000000 |
| 8085 | #define DDRSS3_PHY_750_DATA 0x00000000 |
| 8086 | #define DDRSS3_PHY_751_DATA 0x00000000 |
| 8087 | #define DDRSS3_PHY_752_DATA 0x00000000 |
| 8088 | #define DDRSS3_PHY_753_DATA 0x00000000 |
| 8089 | #define DDRSS3_PHY_754_DATA 0x00000000 |
| 8090 | #define DDRSS3_PHY_755_DATA 0x00000000 |
| 8091 | #define DDRSS3_PHY_756_DATA 0x00000000 |
| 8092 | #define DDRSS3_PHY_757_DATA 0x00000000 |
| 8093 | #define DDRSS3_PHY_758_DATA 0x00000000 |
| 8094 | #define DDRSS3_PHY_759_DATA 0x00000000 |
| 8095 | #define DDRSS3_PHY_760_DATA 0x00000000 |
| 8096 | #define DDRSS3_PHY_761_DATA 0x00000000 |
| 8097 | #define DDRSS3_PHY_762_DATA 0x00000000 |
| 8098 | #define DDRSS3_PHY_763_DATA 0x00000000 |
| 8099 | #define DDRSS3_PHY_764_DATA 0x00000000 |
| 8100 | #define DDRSS3_PHY_765_DATA 0x00000000 |
| 8101 | #define DDRSS3_PHY_766_DATA 0x00000000 |
| 8102 | #define DDRSS3_PHY_767_DATA 0x00000000 |
| 8103 | #define DDRSS3_PHY_768_DATA 0x000004F0 |
| 8104 | #define DDRSS3_PHY_769_DATA 0x00000000 |
| 8105 | #define DDRSS3_PHY_770_DATA 0x00030200 |
| 8106 | #define DDRSS3_PHY_771_DATA 0x00000000 |
| 8107 | #define DDRSS3_PHY_772_DATA 0x00000000 |
| 8108 | #define DDRSS3_PHY_773_DATA 0x01030000 |
| 8109 | #define DDRSS3_PHY_774_DATA 0x00010000 |
| 8110 | #define DDRSS3_PHY_775_DATA 0x01030004 |
| 8111 | #define DDRSS3_PHY_776_DATA 0x01000000 |
| 8112 | #define DDRSS3_PHY_777_DATA 0x00000000 |
| 8113 | #define DDRSS3_PHY_778_DATA 0x00000000 |
| 8114 | #define DDRSS3_PHY_779_DATA 0x01000001 |
| 8115 | #define DDRSS3_PHY_780_DATA 0x00000100 |
| 8116 | #define DDRSS3_PHY_781_DATA 0x000800C0 |
| 8117 | #define DDRSS3_PHY_782_DATA 0x060100CC |
| 8118 | #define DDRSS3_PHY_783_DATA 0x00030066 |
| 8119 | #define DDRSS3_PHY_784_DATA 0x00000000 |
| 8120 | #define DDRSS3_PHY_785_DATA 0x00000301 |
| 8121 | #define DDRSS3_PHY_786_DATA 0x0000AAAA |
| 8122 | #define DDRSS3_PHY_787_DATA 0x00005555 |
| 8123 | #define DDRSS3_PHY_788_DATA 0x0000B5B5 |
| 8124 | #define DDRSS3_PHY_789_DATA 0x00004A4A |
| 8125 | #define DDRSS3_PHY_790_DATA 0x00005656 |
| 8126 | #define DDRSS3_PHY_791_DATA 0x0000A9A9 |
| 8127 | #define DDRSS3_PHY_792_DATA 0x0000A9A9 |
| 8128 | #define DDRSS3_PHY_793_DATA 0x0000B5B5 |
| 8129 | #define DDRSS3_PHY_794_DATA 0x00000000 |
| 8130 | #define DDRSS3_PHY_795_DATA 0x00000000 |
| 8131 | #define DDRSS3_PHY_796_DATA 0x2A000000 |
| 8132 | #define DDRSS3_PHY_797_DATA 0x00000808 |
| 8133 | #define DDRSS3_PHY_798_DATA 0x0F000000 |
| 8134 | #define DDRSS3_PHY_799_DATA 0x00000F0F |
| 8135 | #define DDRSS3_PHY_800_DATA 0x10400000 |
| 8136 | #define DDRSS3_PHY_801_DATA 0x0C002006 |
| 8137 | #define DDRSS3_PHY_802_DATA 0x00000000 |
| 8138 | #define DDRSS3_PHY_803_DATA 0x00000000 |
| 8139 | #define DDRSS3_PHY_804_DATA 0x55555555 |
| 8140 | #define DDRSS3_PHY_805_DATA 0xAAAAAAAA |
| 8141 | #define DDRSS3_PHY_806_DATA 0x55555555 |
| 8142 | #define DDRSS3_PHY_807_DATA 0xAAAAAAAA |
| 8143 | #define DDRSS3_PHY_808_DATA 0x00005555 |
| 8144 | #define DDRSS3_PHY_809_DATA 0x01000100 |
| 8145 | #define DDRSS3_PHY_810_DATA 0x00800180 |
| 8146 | #define DDRSS3_PHY_811_DATA 0x00000000 |
| 8147 | #define DDRSS3_PHY_812_DATA 0x00000000 |
| 8148 | #define DDRSS3_PHY_813_DATA 0x00000000 |
| 8149 | #define DDRSS3_PHY_814_DATA 0x00000000 |
| 8150 | #define DDRSS3_PHY_815_DATA 0x00000000 |
| 8151 | #define DDRSS3_PHY_816_DATA 0x00000000 |
| 8152 | #define DDRSS3_PHY_817_DATA 0x00000000 |
| 8153 | #define DDRSS3_PHY_818_DATA 0x00000000 |
| 8154 | #define DDRSS3_PHY_819_DATA 0x00000000 |
| 8155 | #define DDRSS3_PHY_820_DATA 0x00000000 |
| 8156 | #define DDRSS3_PHY_821_DATA 0x00000000 |
| 8157 | #define DDRSS3_PHY_822_DATA 0x00000000 |
| 8158 | #define DDRSS3_PHY_823_DATA 0x00000000 |
| 8159 | #define DDRSS3_PHY_824_DATA 0x00000000 |
| 8160 | #define DDRSS3_PHY_825_DATA 0x00000000 |
| 8161 | #define DDRSS3_PHY_826_DATA 0x00000000 |
| 8162 | #define DDRSS3_PHY_827_DATA 0x00000000 |
| 8163 | #define DDRSS3_PHY_828_DATA 0x00000000 |
| 8164 | #define DDRSS3_PHY_829_DATA 0x00000000 |
| 8165 | #define DDRSS3_PHY_830_DATA 0x00000000 |
| 8166 | #define DDRSS3_PHY_831_DATA 0x00000000 |
| 8167 | #define DDRSS3_PHY_832_DATA 0x00000000 |
| 8168 | #define DDRSS3_PHY_833_DATA 0x00000000 |
| 8169 | #define DDRSS3_PHY_834_DATA 0x00000104 |
| 8170 | #define DDRSS3_PHY_835_DATA 0x00000120 |
| 8171 | #define DDRSS3_PHY_836_DATA 0x00000000 |
| 8172 | #define DDRSS3_PHY_837_DATA 0x00000000 |
| 8173 | #define DDRSS3_PHY_838_DATA 0x00000000 |
| 8174 | #define DDRSS3_PHY_839_DATA 0x00000000 |
| 8175 | #define DDRSS3_PHY_840_DATA 0x00000000 |
| 8176 | #define DDRSS3_PHY_841_DATA 0x00000000 |
| 8177 | #define DDRSS3_PHY_842_DATA 0x00000000 |
| 8178 | #define DDRSS3_PHY_843_DATA 0x00000001 |
| 8179 | #define DDRSS3_PHY_844_DATA 0x07FF0000 |
| 8180 | #define DDRSS3_PHY_845_DATA 0x0080081F |
| 8181 | #define DDRSS3_PHY_846_DATA 0x00081020 |
| 8182 | #define DDRSS3_PHY_847_DATA 0x04010000 |
| 8183 | #define DDRSS3_PHY_848_DATA 0x00000000 |
| 8184 | #define DDRSS3_PHY_849_DATA 0x00000000 |
| 8185 | #define DDRSS3_PHY_850_DATA 0x00000000 |
| 8186 | #define DDRSS3_PHY_851_DATA 0x00000100 |
| 8187 | #define DDRSS3_PHY_852_DATA 0x01CC0C01 |
| 8188 | #define DDRSS3_PHY_853_DATA 0x1003CC0C |
| 8189 | #define DDRSS3_PHY_854_DATA 0x20000140 |
| 8190 | #define DDRSS3_PHY_855_DATA 0x07FF0200 |
| 8191 | #define DDRSS3_PHY_856_DATA 0x0000DD01 |
| 8192 | #define DDRSS3_PHY_857_DATA 0x10100303 |
| 8193 | #define DDRSS3_PHY_858_DATA 0x10101010 |
| 8194 | #define DDRSS3_PHY_859_DATA 0x10101010 |
| 8195 | #define DDRSS3_PHY_860_DATA 0x00021010 |
| 8196 | #define DDRSS3_PHY_861_DATA 0x00100010 |
| 8197 | #define DDRSS3_PHY_862_DATA 0x00100010 |
| 8198 | #define DDRSS3_PHY_863_DATA 0x00100010 |
| 8199 | #define DDRSS3_PHY_864_DATA 0x00100010 |
| 8200 | #define DDRSS3_PHY_865_DATA 0x00050010 |
| 8201 | #define DDRSS3_PHY_866_DATA 0x51517041 |
| 8202 | #define DDRSS3_PHY_867_DATA 0x31C06001 |
| 8203 | #define DDRSS3_PHY_868_DATA 0x07AB0340 |
| 8204 | #define DDRSS3_PHY_869_DATA 0x00C0C001 |
| 8205 | #define DDRSS3_PHY_870_DATA 0x0E0D0001 |
| 8206 | #define DDRSS3_PHY_871_DATA 0x10001000 |
| 8207 | #define DDRSS3_PHY_872_DATA 0x0C083E42 |
| 8208 | #define DDRSS3_PHY_873_DATA 0x0F0C3701 |
| 8209 | #define DDRSS3_PHY_874_DATA 0x01000140 |
| 8210 | #define DDRSS3_PHY_875_DATA 0x0C000420 |
| 8211 | #define DDRSS3_PHY_876_DATA 0x00000198 |
| 8212 | #define DDRSS3_PHY_877_DATA 0x0A0000D0 |
| 8213 | #define DDRSS3_PHY_878_DATA 0x00030200 |
| 8214 | #define DDRSS3_PHY_879_DATA 0x02800000 |
| 8215 | #define DDRSS3_PHY_880_DATA 0x80800000 |
| 8216 | #define DDRSS3_PHY_881_DATA 0x000E2010 |
| 8217 | #define DDRSS3_PHY_882_DATA 0x76543210 |
| 8218 | #define DDRSS3_PHY_883_DATA 0x00000008 |
| 8219 | #define DDRSS3_PHY_884_DATA 0x02800280 |
| 8220 | #define DDRSS3_PHY_885_DATA 0x02800280 |
| 8221 | #define DDRSS3_PHY_886_DATA 0x02800280 |
| 8222 | #define DDRSS3_PHY_887_DATA 0x02800280 |
| 8223 | #define DDRSS3_PHY_888_DATA 0x00000280 |
| 8224 | #define DDRSS3_PHY_889_DATA 0x0000A000 |
| 8225 | #define DDRSS3_PHY_890_DATA 0x00A000A0 |
| 8226 | #define DDRSS3_PHY_891_DATA 0x00A000A0 |
| 8227 | #define DDRSS3_PHY_892_DATA 0x00A000A0 |
| 8228 | #define DDRSS3_PHY_893_DATA 0x00A000A0 |
| 8229 | #define DDRSS3_PHY_894_DATA 0x00A000A0 |
| 8230 | #define DDRSS3_PHY_895_DATA 0x00A000A0 |
| 8231 | #define DDRSS3_PHY_896_DATA 0x00A000A0 |
| 8232 | #define DDRSS3_PHY_897_DATA 0x00A000A0 |
| 8233 | #define DDRSS3_PHY_898_DATA 0x01C200A0 |
| 8234 | #define DDRSS3_PHY_899_DATA 0x01A00005 |
| 8235 | #define DDRSS3_PHY_900_DATA 0x00000000 |
| 8236 | #define DDRSS3_PHY_901_DATA 0x00000000 |
| 8237 | #define DDRSS3_PHY_902_DATA 0x00080200 |
| 8238 | #define DDRSS3_PHY_903_DATA 0x00000000 |
| 8239 | #define DDRSS3_PHY_904_DATA 0x20202000 |
| 8240 | #define DDRSS3_PHY_905_DATA 0x20202020 |
| 8241 | #define DDRSS3_PHY_906_DATA 0xF0F02020 |
| 8242 | #define DDRSS3_PHY_907_DATA 0x00000000 |
| 8243 | #define DDRSS3_PHY_908_DATA 0x00000000 |
| 8244 | #define DDRSS3_PHY_909_DATA 0x00000000 |
| 8245 | #define DDRSS3_PHY_910_DATA 0x00000000 |
| 8246 | #define DDRSS3_PHY_911_DATA 0x00000000 |
| 8247 | #define DDRSS3_PHY_912_DATA 0x00000000 |
| 8248 | #define DDRSS3_PHY_913_DATA 0x00000000 |
| 8249 | #define DDRSS3_PHY_914_DATA 0x00000000 |
| 8250 | #define DDRSS3_PHY_915_DATA 0x00000000 |
| 8251 | #define DDRSS3_PHY_916_DATA 0x00000000 |
| 8252 | #define DDRSS3_PHY_917_DATA 0x00000000 |
| 8253 | #define DDRSS3_PHY_918_DATA 0x00000000 |
| 8254 | #define DDRSS3_PHY_919_DATA 0x00000000 |
| 8255 | #define DDRSS3_PHY_920_DATA 0x00000000 |
| 8256 | #define DDRSS3_PHY_921_DATA 0x00000000 |
| 8257 | #define DDRSS3_PHY_922_DATA 0x00000000 |
| 8258 | #define DDRSS3_PHY_923_DATA 0x00000000 |
| 8259 | #define DDRSS3_PHY_924_DATA 0x00000000 |
| 8260 | #define DDRSS3_PHY_925_DATA 0x00000000 |
| 8261 | #define DDRSS3_PHY_926_DATA 0x00000000 |
| 8262 | #define DDRSS3_PHY_927_DATA 0x00000000 |
| 8263 | #define DDRSS3_PHY_928_DATA 0x00000000 |
| 8264 | #define DDRSS3_PHY_929_DATA 0x00000000 |
| 8265 | #define DDRSS3_PHY_930_DATA 0x00000000 |
| 8266 | #define DDRSS3_PHY_931_DATA 0x00000000 |
| 8267 | #define DDRSS3_PHY_932_DATA 0x00000000 |
| 8268 | #define DDRSS3_PHY_933_DATA 0x00000000 |
| 8269 | #define DDRSS3_PHY_934_DATA 0x00000000 |
| 8270 | #define DDRSS3_PHY_935_DATA 0x00000000 |
| 8271 | #define DDRSS3_PHY_936_DATA 0x00000000 |
| 8272 | #define DDRSS3_PHY_937_DATA 0x00000000 |
| 8273 | #define DDRSS3_PHY_938_DATA 0x00000000 |
| 8274 | #define DDRSS3_PHY_939_DATA 0x00000000 |
| 8275 | #define DDRSS3_PHY_940_DATA 0x00000000 |
| 8276 | #define DDRSS3_PHY_941_DATA 0x00000000 |
| 8277 | #define DDRSS3_PHY_942_DATA 0x00000000 |
| 8278 | #define DDRSS3_PHY_943_DATA 0x00000000 |
| 8279 | #define DDRSS3_PHY_944_DATA 0x00000000 |
| 8280 | #define DDRSS3_PHY_945_DATA 0x00000000 |
| 8281 | #define DDRSS3_PHY_946_DATA 0x00000000 |
| 8282 | #define DDRSS3_PHY_947_DATA 0x00000000 |
| 8283 | #define DDRSS3_PHY_948_DATA 0x00000000 |
| 8284 | #define DDRSS3_PHY_949_DATA 0x00000000 |
| 8285 | #define DDRSS3_PHY_950_DATA 0x00000000 |
| 8286 | #define DDRSS3_PHY_951_DATA 0x00000000 |
| 8287 | #define DDRSS3_PHY_952_DATA 0x00000000 |
| 8288 | #define DDRSS3_PHY_953_DATA 0x00000000 |
| 8289 | #define DDRSS3_PHY_954_DATA 0x00000000 |
| 8290 | #define DDRSS3_PHY_955_DATA 0x00000000 |
| 8291 | #define DDRSS3_PHY_956_DATA 0x00000000 |
| 8292 | #define DDRSS3_PHY_957_DATA 0x00000000 |
| 8293 | #define DDRSS3_PHY_958_DATA 0x00000000 |
| 8294 | #define DDRSS3_PHY_959_DATA 0x00000000 |
| 8295 | #define DDRSS3_PHY_960_DATA 0x00000000 |
| 8296 | #define DDRSS3_PHY_961_DATA 0x00000000 |
| 8297 | #define DDRSS3_PHY_962_DATA 0x00000000 |
| 8298 | #define DDRSS3_PHY_963_DATA 0x00000000 |
| 8299 | #define DDRSS3_PHY_964_DATA 0x00000000 |
| 8300 | #define DDRSS3_PHY_965_DATA 0x00000000 |
| 8301 | #define DDRSS3_PHY_966_DATA 0x00000000 |
| 8302 | #define DDRSS3_PHY_967_DATA 0x00000000 |
| 8303 | #define DDRSS3_PHY_968_DATA 0x00000000 |
| 8304 | #define DDRSS3_PHY_969_DATA 0x00000000 |
| 8305 | #define DDRSS3_PHY_970_DATA 0x00000000 |
| 8306 | #define DDRSS3_PHY_971_DATA 0x00000000 |
| 8307 | #define DDRSS3_PHY_972_DATA 0x00000000 |
| 8308 | #define DDRSS3_PHY_973_DATA 0x00000000 |
| 8309 | #define DDRSS3_PHY_974_DATA 0x00000000 |
| 8310 | #define DDRSS3_PHY_975_DATA 0x00000000 |
| 8311 | #define DDRSS3_PHY_976_DATA 0x00000000 |
| 8312 | #define DDRSS3_PHY_977_DATA 0x00000000 |
| 8313 | #define DDRSS3_PHY_978_DATA 0x00000000 |
| 8314 | #define DDRSS3_PHY_979_DATA 0x00000000 |
| 8315 | #define DDRSS3_PHY_980_DATA 0x00000000 |
| 8316 | #define DDRSS3_PHY_981_DATA 0x00000000 |
| 8317 | #define DDRSS3_PHY_982_DATA 0x00000000 |
| 8318 | #define DDRSS3_PHY_983_DATA 0x00000000 |
| 8319 | #define DDRSS3_PHY_984_DATA 0x00000000 |
| 8320 | #define DDRSS3_PHY_985_DATA 0x00000000 |
| 8321 | #define DDRSS3_PHY_986_DATA 0x00000000 |
| 8322 | #define DDRSS3_PHY_987_DATA 0x00000000 |
| 8323 | #define DDRSS3_PHY_988_DATA 0x00000000 |
| 8324 | #define DDRSS3_PHY_989_DATA 0x00000000 |
| 8325 | #define DDRSS3_PHY_990_DATA 0x00000000 |
| 8326 | #define DDRSS3_PHY_991_DATA 0x00000000 |
| 8327 | #define DDRSS3_PHY_992_DATA 0x00000000 |
| 8328 | #define DDRSS3_PHY_993_DATA 0x00000000 |
| 8329 | #define DDRSS3_PHY_994_DATA 0x00000000 |
| 8330 | #define DDRSS3_PHY_995_DATA 0x00000000 |
| 8331 | #define DDRSS3_PHY_996_DATA 0x00000000 |
| 8332 | #define DDRSS3_PHY_997_DATA 0x00000000 |
| 8333 | #define DDRSS3_PHY_998_DATA 0x00000000 |
| 8334 | #define DDRSS3_PHY_999_DATA 0x00000000 |
| 8335 | #define DDRSS3_PHY_1000_DATA 0x00000000 |
| 8336 | #define DDRSS3_PHY_1001_DATA 0x00000000 |
| 8337 | #define DDRSS3_PHY_1002_DATA 0x00000000 |
| 8338 | #define DDRSS3_PHY_1003_DATA 0x00000000 |
| 8339 | #define DDRSS3_PHY_1004_DATA 0x00000000 |
| 8340 | #define DDRSS3_PHY_1005_DATA 0x00000000 |
| 8341 | #define DDRSS3_PHY_1006_DATA 0x00000000 |
| 8342 | #define DDRSS3_PHY_1007_DATA 0x00000000 |
| 8343 | #define DDRSS3_PHY_1008_DATA 0x00000000 |
| 8344 | #define DDRSS3_PHY_1009_DATA 0x00000000 |
| 8345 | #define DDRSS3_PHY_1010_DATA 0x00000000 |
| 8346 | #define DDRSS3_PHY_1011_DATA 0x00000000 |
| 8347 | #define DDRSS3_PHY_1012_DATA 0x00000000 |
| 8348 | #define DDRSS3_PHY_1013_DATA 0x00000000 |
| 8349 | #define DDRSS3_PHY_1014_DATA 0x00000000 |
| 8350 | #define DDRSS3_PHY_1015_DATA 0x00000000 |
| 8351 | #define DDRSS3_PHY_1016_DATA 0x00000000 |
| 8352 | #define DDRSS3_PHY_1017_DATA 0x00000000 |
| 8353 | #define DDRSS3_PHY_1018_DATA 0x00000000 |
| 8354 | #define DDRSS3_PHY_1019_DATA 0x00000000 |
| 8355 | #define DDRSS3_PHY_1020_DATA 0x00000000 |
| 8356 | #define DDRSS3_PHY_1021_DATA 0x00000000 |
| 8357 | #define DDRSS3_PHY_1022_DATA 0x00000000 |
| 8358 | #define DDRSS3_PHY_1023_DATA 0x00000000 |
| 8359 | #define DDRSS3_PHY_1024_DATA 0x00000000 |
| 8360 | #define DDRSS3_PHY_1025_DATA 0x00000000 |
| 8361 | #define DDRSS3_PHY_1026_DATA 0x00000000 |
| 8362 | #define DDRSS3_PHY_1027_DATA 0x00000000 |
| 8363 | #define DDRSS3_PHY_1028_DATA 0x00000000 |
| 8364 | #define DDRSS3_PHY_1029_DATA 0x00000100 |
| 8365 | #define DDRSS3_PHY_1030_DATA 0x00000200 |
| 8366 | #define DDRSS3_PHY_1031_DATA 0x00000000 |
| 8367 | #define DDRSS3_PHY_1032_DATA 0x00000000 |
| 8368 | #define DDRSS3_PHY_1033_DATA 0x00000000 |
| 8369 | #define DDRSS3_PHY_1034_DATA 0x00000000 |
| 8370 | #define DDRSS3_PHY_1035_DATA 0x00400000 |
| 8371 | #define DDRSS3_PHY_1036_DATA 0x00000080 |
| 8372 | #define DDRSS3_PHY_1037_DATA 0x00DCBA98 |
| 8373 | #define DDRSS3_PHY_1038_DATA 0x03000000 |
| 8374 | #define DDRSS3_PHY_1039_DATA 0x00200000 |
| 8375 | #define DDRSS3_PHY_1040_DATA 0x00000000 |
| 8376 | #define DDRSS3_PHY_1041_DATA 0x00000000 |
| 8377 | #define DDRSS3_PHY_1042_DATA 0x00000000 |
| 8378 | #define DDRSS3_PHY_1043_DATA 0x00000000 |
| 8379 | #define DDRSS3_PHY_1044_DATA 0x00000000 |
| 8380 | #define DDRSS3_PHY_1045_DATA 0x0000002A |
| 8381 | #define DDRSS3_PHY_1046_DATA 0x00000015 |
| 8382 | #define DDRSS3_PHY_1047_DATA 0x00000015 |
| 8383 | #define DDRSS3_PHY_1048_DATA 0x0000002A |
| 8384 | #define DDRSS3_PHY_1049_DATA 0x00000033 |
| 8385 | #define DDRSS3_PHY_1050_DATA 0x0000000C |
| 8386 | #define DDRSS3_PHY_1051_DATA 0x0000000C |
| 8387 | #define DDRSS3_PHY_1052_DATA 0x00000033 |
| 8388 | #define DDRSS3_PHY_1053_DATA 0x00543210 |
| 8389 | #define DDRSS3_PHY_1054_DATA 0x003F0000 |
| 8390 | #define DDRSS3_PHY_1055_DATA 0x000F013F |
| 8391 | #define DDRSS3_PHY_1056_DATA 0x20202003 |
| 8392 | #define DDRSS3_PHY_1057_DATA 0x00202020 |
| 8393 | #define DDRSS3_PHY_1058_DATA 0x20008008 |
| 8394 | #define DDRSS3_PHY_1059_DATA 0x00000810 |
| 8395 | #define DDRSS3_PHY_1060_DATA 0x00000F00 |
| 8396 | #define DDRSS3_PHY_1061_DATA 0x00000000 |
| 8397 | #define DDRSS3_PHY_1062_DATA 0x00000000 |
| 8398 | #define DDRSS3_PHY_1063_DATA 0x00000000 |
| 8399 | #define DDRSS3_PHY_1064_DATA 0x000305CC |
| 8400 | #define DDRSS3_PHY_1065_DATA 0x00030000 |
| 8401 | #define DDRSS3_PHY_1066_DATA 0x00000300 |
| 8402 | #define DDRSS3_PHY_1067_DATA 0x00000300 |
| 8403 | #define DDRSS3_PHY_1068_DATA 0x00000300 |
| 8404 | #define DDRSS3_PHY_1069_DATA 0x00000300 |
| 8405 | #define DDRSS3_PHY_1070_DATA 0x00000300 |
| 8406 | #define DDRSS3_PHY_1071_DATA 0x42080010 |
| 8407 | #define DDRSS3_PHY_1072_DATA 0x0000803E |
| 8408 | #define DDRSS3_PHY_1073_DATA 0x00000001 |
| 8409 | #define DDRSS3_PHY_1074_DATA 0x01000102 |
| 8410 | #define DDRSS3_PHY_1075_DATA 0x00008000 |
| 8411 | #define DDRSS3_PHY_1076_DATA 0x00000000 |
| 8412 | #define DDRSS3_PHY_1077_DATA 0x00000000 |
| 8413 | #define DDRSS3_PHY_1078_DATA 0x00000000 |
| 8414 | #define DDRSS3_PHY_1079_DATA 0x00000000 |
| 8415 | #define DDRSS3_PHY_1080_DATA 0x00000000 |
| 8416 | #define DDRSS3_PHY_1081_DATA 0x00000000 |
| 8417 | #define DDRSS3_PHY_1082_DATA 0x00000000 |
| 8418 | #define DDRSS3_PHY_1083_DATA 0x00000000 |
| 8419 | #define DDRSS3_PHY_1084_DATA 0x00000000 |
| 8420 | #define DDRSS3_PHY_1085_DATA 0x00000000 |
| 8421 | #define DDRSS3_PHY_1086_DATA 0x00000000 |
| 8422 | #define DDRSS3_PHY_1087_DATA 0x00000000 |
| 8423 | #define DDRSS3_PHY_1088_DATA 0x00000000 |
| 8424 | #define DDRSS3_PHY_1089_DATA 0x00000000 |
| 8425 | #define DDRSS3_PHY_1090_DATA 0x00000000 |
| 8426 | #define DDRSS3_PHY_1091_DATA 0x00000000 |
| 8427 | #define DDRSS3_PHY_1092_DATA 0x00000000 |
| 8428 | #define DDRSS3_PHY_1093_DATA 0x00000000 |
| 8429 | #define DDRSS3_PHY_1094_DATA 0x00000000 |
| 8430 | #define DDRSS3_PHY_1095_DATA 0x00000000 |
| 8431 | #define DDRSS3_PHY_1096_DATA 0x00000000 |
| 8432 | #define DDRSS3_PHY_1097_DATA 0x00000000 |
| 8433 | #define DDRSS3_PHY_1098_DATA 0x00000000 |
| 8434 | #define DDRSS3_PHY_1099_DATA 0x00000000 |
| 8435 | #define DDRSS3_PHY_1100_DATA 0x00000000 |
| 8436 | #define DDRSS3_PHY_1101_DATA 0x00000000 |
| 8437 | #define DDRSS3_PHY_1102_DATA 0x00000000 |
| 8438 | #define DDRSS3_PHY_1103_DATA 0x00000000 |
| 8439 | #define DDRSS3_PHY_1104_DATA 0x00000000 |
| 8440 | #define DDRSS3_PHY_1105_DATA 0x00000000 |
| 8441 | #define DDRSS3_PHY_1106_DATA 0x00000000 |
| 8442 | #define DDRSS3_PHY_1107_DATA 0x00000000 |
| 8443 | #define DDRSS3_PHY_1108_DATA 0x00000000 |
| 8444 | #define DDRSS3_PHY_1109_DATA 0x00000000 |
| 8445 | #define DDRSS3_PHY_1110_DATA 0x00000000 |
| 8446 | #define DDRSS3_PHY_1111_DATA 0x00000000 |
| 8447 | #define DDRSS3_PHY_1112_DATA 0x00000000 |
| 8448 | #define DDRSS3_PHY_1113_DATA 0x00000000 |
| 8449 | #define DDRSS3_PHY_1114_DATA 0x00000000 |
| 8450 | #define DDRSS3_PHY_1115_DATA 0x00000000 |
| 8451 | #define DDRSS3_PHY_1116_DATA 0x00000000 |
| 8452 | #define DDRSS3_PHY_1117_DATA 0x00000000 |
| 8453 | #define DDRSS3_PHY_1118_DATA 0x00000000 |
| 8454 | #define DDRSS3_PHY_1119_DATA 0x00000000 |
| 8455 | #define DDRSS3_PHY_1120_DATA 0x00000000 |
| 8456 | #define DDRSS3_PHY_1121_DATA 0x00000000 |
| 8457 | #define DDRSS3_PHY_1122_DATA 0x00000000 |
| 8458 | #define DDRSS3_PHY_1123_DATA 0x00000000 |
| 8459 | #define DDRSS3_PHY_1124_DATA 0x00000000 |
| 8460 | #define DDRSS3_PHY_1125_DATA 0x00000000 |
| 8461 | #define DDRSS3_PHY_1126_DATA 0x00000000 |
| 8462 | #define DDRSS3_PHY_1127_DATA 0x00000000 |
| 8463 | #define DDRSS3_PHY_1128_DATA 0x00000000 |
| 8464 | #define DDRSS3_PHY_1129_DATA 0x00000000 |
| 8465 | #define DDRSS3_PHY_1130_DATA 0x00000000 |
| 8466 | #define DDRSS3_PHY_1131_DATA 0x00000000 |
| 8467 | #define DDRSS3_PHY_1132_DATA 0x00000000 |
| 8468 | #define DDRSS3_PHY_1133_DATA 0x00000000 |
| 8469 | #define DDRSS3_PHY_1134_DATA 0x00000000 |
| 8470 | #define DDRSS3_PHY_1135_DATA 0x00000000 |
| 8471 | #define DDRSS3_PHY_1136_DATA 0x00000000 |
| 8472 | #define DDRSS3_PHY_1137_DATA 0x00000000 |
| 8473 | #define DDRSS3_PHY_1138_DATA 0x00000000 |
| 8474 | #define DDRSS3_PHY_1139_DATA 0x00000000 |
| 8475 | #define DDRSS3_PHY_1140_DATA 0x00000000 |
| 8476 | #define DDRSS3_PHY_1141_DATA 0x00000000 |
| 8477 | #define DDRSS3_PHY_1142_DATA 0x00000000 |
| 8478 | #define DDRSS3_PHY_1143_DATA 0x00000000 |
| 8479 | #define DDRSS3_PHY_1144_DATA 0x00000000 |
| 8480 | #define DDRSS3_PHY_1145_DATA 0x00000000 |
| 8481 | #define DDRSS3_PHY_1146_DATA 0x00000000 |
| 8482 | #define DDRSS3_PHY_1147_DATA 0x00000000 |
| 8483 | #define DDRSS3_PHY_1148_DATA 0x00000000 |
| 8484 | #define DDRSS3_PHY_1149_DATA 0x00000000 |
| 8485 | #define DDRSS3_PHY_1150_DATA 0x00000000 |
| 8486 | #define DDRSS3_PHY_1151_DATA 0x00000000 |
| 8487 | #define DDRSS3_PHY_1152_DATA 0x00000000 |
| 8488 | #define DDRSS3_PHY_1153_DATA 0x00000000 |
| 8489 | #define DDRSS3_PHY_1154_DATA 0x00000000 |
| 8490 | #define DDRSS3_PHY_1155_DATA 0x00000000 |
| 8491 | #define DDRSS3_PHY_1156_DATA 0x00000000 |
| 8492 | #define DDRSS3_PHY_1157_DATA 0x00000000 |
| 8493 | #define DDRSS3_PHY_1158_DATA 0x00000000 |
| 8494 | #define DDRSS3_PHY_1159_DATA 0x00000000 |
| 8495 | #define DDRSS3_PHY_1160_DATA 0x00000000 |
| 8496 | #define DDRSS3_PHY_1161_DATA 0x00000000 |
| 8497 | #define DDRSS3_PHY_1162_DATA 0x00000000 |
| 8498 | #define DDRSS3_PHY_1163_DATA 0x00000000 |
| 8499 | #define DDRSS3_PHY_1164_DATA 0x00000000 |
| 8500 | #define DDRSS3_PHY_1165_DATA 0x00000000 |
| 8501 | #define DDRSS3_PHY_1166_DATA 0x00000000 |
| 8502 | #define DDRSS3_PHY_1167_DATA 0x00000000 |
| 8503 | #define DDRSS3_PHY_1168_DATA 0x00000000 |
| 8504 | #define DDRSS3_PHY_1169_DATA 0x00000000 |
| 8505 | #define DDRSS3_PHY_1170_DATA 0x00000000 |
| 8506 | #define DDRSS3_PHY_1171_DATA 0x00000000 |
| 8507 | #define DDRSS3_PHY_1172_DATA 0x00000000 |
| 8508 | #define DDRSS3_PHY_1173_DATA 0x00000000 |
| 8509 | #define DDRSS3_PHY_1174_DATA 0x00000000 |
| 8510 | #define DDRSS3_PHY_1175_DATA 0x00000000 |
| 8511 | #define DDRSS3_PHY_1176_DATA 0x00000000 |
| 8512 | #define DDRSS3_PHY_1177_DATA 0x00000000 |
| 8513 | #define DDRSS3_PHY_1178_DATA 0x00000000 |
| 8514 | #define DDRSS3_PHY_1179_DATA 0x00000000 |
| 8515 | #define DDRSS3_PHY_1180_DATA 0x00000000 |
| 8516 | #define DDRSS3_PHY_1181_DATA 0x00000000 |
| 8517 | #define DDRSS3_PHY_1182_DATA 0x00000000 |
| 8518 | #define DDRSS3_PHY_1183_DATA 0x00000000 |
| 8519 | #define DDRSS3_PHY_1184_DATA 0x00000000 |
| 8520 | #define DDRSS3_PHY_1185_DATA 0x00000000 |
| 8521 | #define DDRSS3_PHY_1186_DATA 0x00000000 |
| 8522 | #define DDRSS3_PHY_1187_DATA 0x00000000 |
| 8523 | #define DDRSS3_PHY_1188_DATA 0x00000000 |
| 8524 | #define DDRSS3_PHY_1189_DATA 0x00000000 |
| 8525 | #define DDRSS3_PHY_1190_DATA 0x00000000 |
| 8526 | #define DDRSS3_PHY_1191_DATA 0x00000000 |
| 8527 | #define DDRSS3_PHY_1192_DATA 0x00000000 |
| 8528 | #define DDRSS3_PHY_1193_DATA 0x00000000 |
| 8529 | #define DDRSS3_PHY_1194_DATA 0x00000000 |
| 8530 | #define DDRSS3_PHY_1195_DATA 0x00000000 |
| 8531 | #define DDRSS3_PHY_1196_DATA 0x00000000 |
| 8532 | #define DDRSS3_PHY_1197_DATA 0x00000000 |
| 8533 | #define DDRSS3_PHY_1198_DATA 0x00000000 |
| 8534 | #define DDRSS3_PHY_1199_DATA 0x00000000 |
| 8535 | #define DDRSS3_PHY_1200_DATA 0x00000000 |
| 8536 | #define DDRSS3_PHY_1201_DATA 0x00000000 |
| 8537 | #define DDRSS3_PHY_1202_DATA 0x00000000 |
| 8538 | #define DDRSS3_PHY_1203_DATA 0x00000000 |
| 8539 | #define DDRSS3_PHY_1204_DATA 0x00000000 |
| 8540 | #define DDRSS3_PHY_1205_DATA 0x00000000 |
| 8541 | #define DDRSS3_PHY_1206_DATA 0x00000000 |
| 8542 | #define DDRSS3_PHY_1207_DATA 0x00000000 |
| 8543 | #define DDRSS3_PHY_1208_DATA 0x00000000 |
| 8544 | #define DDRSS3_PHY_1209_DATA 0x00000000 |
| 8545 | #define DDRSS3_PHY_1210_DATA 0x00000000 |
| 8546 | #define DDRSS3_PHY_1211_DATA 0x00000000 |
| 8547 | #define DDRSS3_PHY_1212_DATA 0x00000000 |
| 8548 | #define DDRSS3_PHY_1213_DATA 0x00000000 |
| 8549 | #define DDRSS3_PHY_1214_DATA 0x00000000 |
| 8550 | #define DDRSS3_PHY_1215_DATA 0x00000000 |
| 8551 | #define DDRSS3_PHY_1216_DATA 0x00000000 |
| 8552 | #define DDRSS3_PHY_1217_DATA 0x00000000 |
| 8553 | #define DDRSS3_PHY_1218_DATA 0x00000000 |
| 8554 | #define DDRSS3_PHY_1219_DATA 0x00000000 |
| 8555 | #define DDRSS3_PHY_1220_DATA 0x00000000 |
| 8556 | #define DDRSS3_PHY_1221_DATA 0x00000000 |
| 8557 | #define DDRSS3_PHY_1222_DATA 0x00000000 |
| 8558 | #define DDRSS3_PHY_1223_DATA 0x00000000 |
| 8559 | #define DDRSS3_PHY_1224_DATA 0x00000000 |
| 8560 | #define DDRSS3_PHY_1225_DATA 0x00000000 |
| 8561 | #define DDRSS3_PHY_1226_DATA 0x00000000 |
| 8562 | #define DDRSS3_PHY_1227_DATA 0x00000000 |
| 8563 | #define DDRSS3_PHY_1228_DATA 0x00000000 |
| 8564 | #define DDRSS3_PHY_1229_DATA 0x00000000 |
| 8565 | #define DDRSS3_PHY_1230_DATA 0x00000000 |
| 8566 | #define DDRSS3_PHY_1231_DATA 0x00000000 |
| 8567 | #define DDRSS3_PHY_1232_DATA 0x00000000 |
| 8568 | #define DDRSS3_PHY_1233_DATA 0x00000000 |
| 8569 | #define DDRSS3_PHY_1234_DATA 0x00000000 |
| 8570 | #define DDRSS3_PHY_1235_DATA 0x00000000 |
| 8571 | #define DDRSS3_PHY_1236_DATA 0x00000000 |
| 8572 | #define DDRSS3_PHY_1237_DATA 0x00000000 |
| 8573 | #define DDRSS3_PHY_1238_DATA 0x00000000 |
| 8574 | #define DDRSS3_PHY_1239_DATA 0x00000000 |
| 8575 | #define DDRSS3_PHY_1240_DATA 0x00000000 |
| 8576 | #define DDRSS3_PHY_1241_DATA 0x00000000 |
| 8577 | #define DDRSS3_PHY_1242_DATA 0x00000000 |
| 8578 | #define DDRSS3_PHY_1243_DATA 0x00000000 |
| 8579 | #define DDRSS3_PHY_1244_DATA 0x00000000 |
| 8580 | #define DDRSS3_PHY_1245_DATA 0x00000000 |
| 8581 | #define DDRSS3_PHY_1246_DATA 0x00000000 |
| 8582 | #define DDRSS3_PHY_1247_DATA 0x00000000 |
| 8583 | #define DDRSS3_PHY_1248_DATA 0x00000000 |
| 8584 | #define DDRSS3_PHY_1249_DATA 0x00000000 |
| 8585 | #define DDRSS3_PHY_1250_DATA 0x00000000 |
| 8586 | #define DDRSS3_PHY_1251_DATA 0x00000000 |
| 8587 | #define DDRSS3_PHY_1252_DATA 0x00000000 |
| 8588 | #define DDRSS3_PHY_1253_DATA 0x00000000 |
| 8589 | #define DDRSS3_PHY_1254_DATA 0x00000000 |
| 8590 | #define DDRSS3_PHY_1255_DATA 0x00000000 |
| 8591 | #define DDRSS3_PHY_1256_DATA 0x00000000 |
| 8592 | #define DDRSS3_PHY_1257_DATA 0x00000000 |
| 8593 | #define DDRSS3_PHY_1258_DATA 0x00000000 |
| 8594 | #define DDRSS3_PHY_1259_DATA 0x00000000 |
| 8595 | #define DDRSS3_PHY_1260_DATA 0x00000000 |
| 8596 | #define DDRSS3_PHY_1261_DATA 0x00000000 |
| 8597 | #define DDRSS3_PHY_1262_DATA 0x00000000 |
| 8598 | #define DDRSS3_PHY_1263_DATA 0x00000000 |
| 8599 | #define DDRSS3_PHY_1264_DATA 0x00000000 |
| 8600 | #define DDRSS3_PHY_1265_DATA 0x00000000 |
| 8601 | #define DDRSS3_PHY_1266_DATA 0x00000000 |
| 8602 | #define DDRSS3_PHY_1267_DATA 0x00000000 |
| 8603 | #define DDRSS3_PHY_1268_DATA 0x00000000 |
| 8604 | #define DDRSS3_PHY_1269_DATA 0x00000000 |
| 8605 | #define DDRSS3_PHY_1270_DATA 0x00000000 |
| 8606 | #define DDRSS3_PHY_1271_DATA 0x00000000 |
| 8607 | #define DDRSS3_PHY_1272_DATA 0x00000000 |
| 8608 | #define DDRSS3_PHY_1273_DATA 0x00000000 |
| 8609 | #define DDRSS3_PHY_1274_DATA 0x00000000 |
| 8610 | #define DDRSS3_PHY_1275_DATA 0x00000000 |
| 8611 | #define DDRSS3_PHY_1276_DATA 0x00000000 |
| 8612 | #define DDRSS3_PHY_1277_DATA 0x00000000 |
| 8613 | #define DDRSS3_PHY_1278_DATA 0x00000000 |
| 8614 | #define DDRSS3_PHY_1279_DATA 0x00000000 |
| 8615 | #define DDRSS3_PHY_1280_DATA 0x00000000 |
| 8616 | #define DDRSS3_PHY_1281_DATA 0x00010100 |
| 8617 | #define DDRSS3_PHY_1282_DATA 0x00000000 |
| 8618 | #define DDRSS3_PHY_1283_DATA 0x00000000 |
| 8619 | #define DDRSS3_PHY_1284_DATA 0x00050000 |
| 8620 | #define DDRSS3_PHY_1285_DATA 0x04000000 |
| 8621 | #define DDRSS3_PHY_1286_DATA 0x00000055 |
| 8622 | #define DDRSS3_PHY_1287_DATA 0x00000000 |
| 8623 | #define DDRSS3_PHY_1288_DATA 0x00000000 |
| 8624 | #define DDRSS3_PHY_1289_DATA 0x00000000 |
| 8625 | #define DDRSS3_PHY_1290_DATA 0x00000000 |
| 8626 | #define DDRSS3_PHY_1291_DATA 0x00002001 |
| 8627 | #define DDRSS3_PHY_1292_DATA 0x0000400F |
| 8628 | #define DDRSS3_PHY_1293_DATA 0x50020028 |
| 8629 | #define DDRSS3_PHY_1294_DATA 0x01010000 |
| 8630 | #define DDRSS3_PHY_1295_DATA 0x80080001 |
| 8631 | #define DDRSS3_PHY_1296_DATA 0x10200000 |
| 8632 | #define DDRSS3_PHY_1297_DATA 0x00000008 |
| 8633 | #define DDRSS3_PHY_1298_DATA 0x00000000 |
| 8634 | #define DDRSS3_PHY_1299_DATA 0x01090E00 |
| 8635 | #define DDRSS3_PHY_1300_DATA 0x00040101 |
| 8636 | #define DDRSS3_PHY_1301_DATA 0x0000010F |
| 8637 | #define DDRSS3_PHY_1302_DATA 0x00000000 |
| 8638 | #define DDRSS3_PHY_1303_DATA 0x0000FFFF |
| 8639 | #define DDRSS3_PHY_1304_DATA 0x00000000 |
| 8640 | #define DDRSS3_PHY_1305_DATA 0x01010000 |
| 8641 | #define DDRSS3_PHY_1306_DATA 0x01080402 |
| 8642 | #define DDRSS3_PHY_1307_DATA 0x01200F02 |
| 8643 | #define DDRSS3_PHY_1308_DATA 0x00194280 |
| 8644 | #define DDRSS3_PHY_1309_DATA 0x00000004 |
| 8645 | #define DDRSS3_PHY_1310_DATA 0x00042000 |
| 8646 | #define DDRSS3_PHY_1311_DATA 0x00000000 |
| 8647 | #define DDRSS3_PHY_1312_DATA 0x00000000 |
| 8648 | #define DDRSS3_PHY_1313_DATA 0x00000000 |
| 8649 | #define DDRSS3_PHY_1314_DATA 0x00000000 |
| 8650 | #define DDRSS3_PHY_1315_DATA 0x00000000 |
| 8651 | #define DDRSS3_PHY_1316_DATA 0x00000000 |
| 8652 | #define DDRSS3_PHY_1317_DATA 0x01000000 |
| 8653 | #define DDRSS3_PHY_1318_DATA 0x00000705 |
| 8654 | #define DDRSS3_PHY_1319_DATA 0x00000054 |
| 8655 | #define DDRSS3_PHY_1320_DATA 0x00030820 |
| 8656 | #define DDRSS3_PHY_1321_DATA 0x00010820 |
| 8657 | #define DDRSS3_PHY_1322_DATA 0x00010820 |
| 8658 | #define DDRSS3_PHY_1323_DATA 0x00010820 |
| 8659 | #define DDRSS3_PHY_1324_DATA 0x00010820 |
| 8660 | #define DDRSS3_PHY_1325_DATA 0x00010820 |
| 8661 | #define DDRSS3_PHY_1326_DATA 0x00010820 |
| 8662 | #define DDRSS3_PHY_1327_DATA 0x00010820 |
| 8663 | #define DDRSS3_PHY_1328_DATA 0x00010820 |
| 8664 | #define DDRSS3_PHY_1329_DATA 0x00000000 |
| 8665 | #define DDRSS3_PHY_1330_DATA 0x00000074 |
| 8666 | #define DDRSS3_PHY_1331_DATA 0x00000400 |
| 8667 | #define DDRSS3_PHY_1332_DATA 0x00000108 |
| 8668 | #define DDRSS3_PHY_1333_DATA 0x00000000 |
| 8669 | #define DDRSS3_PHY_1334_DATA 0x00000000 |
| 8670 | #define DDRSS3_PHY_1335_DATA 0x00000000 |
| 8671 | #define DDRSS3_PHY_1336_DATA 0x00000000 |
| 8672 | #define DDRSS3_PHY_1337_DATA 0x00000000 |
| 8673 | #define DDRSS3_PHY_1338_DATA 0x03000000 |
| 8674 | #define DDRSS3_PHY_1339_DATA 0x00000000 |
| 8675 | #define DDRSS3_PHY_1340_DATA 0x00000000 |
| 8676 | #define DDRSS3_PHY_1341_DATA 0x00000000 |
| 8677 | #define DDRSS3_PHY_1342_DATA 0x04102006 |
| 8678 | #define DDRSS3_PHY_1343_DATA 0x00041020 |
| 8679 | #define DDRSS3_PHY_1344_DATA 0x01C98C98 |
| 8680 | #define DDRSS3_PHY_1345_DATA 0x3F400000 |
| 8681 | #define DDRSS3_PHY_1346_DATA 0x3F3F1F3F |
| 8682 | #define DDRSS3_PHY_1347_DATA 0x0000001F |
| 8683 | #define DDRSS3_PHY_1348_DATA 0x00000000 |
| 8684 | #define DDRSS3_PHY_1349_DATA 0x00000000 |
| 8685 | #define DDRSS3_PHY_1350_DATA 0x00000000 |
| 8686 | #define DDRSS3_PHY_1351_DATA 0x00010000 |
| 8687 | #define DDRSS3_PHY_1352_DATA 0x00000000 |
| 8688 | #define DDRSS3_PHY_1353_DATA 0x00000000 |
| 8689 | #define DDRSS3_PHY_1354_DATA 0x00000000 |
| 8690 | #define DDRSS3_PHY_1355_DATA 0x00000000 |
| 8691 | #define DDRSS3_PHY_1356_DATA 0x76543210 |
| 8692 | #define DDRSS3_PHY_1357_DATA 0x00010198 |
| 8693 | #define DDRSS3_PHY_1358_DATA 0x00000000 |
| 8694 | #define DDRSS3_PHY_1359_DATA 0x00000000 |
| 8695 | #define DDRSS3_PHY_1360_DATA 0x00000000 |
| 8696 | #define DDRSS3_PHY_1361_DATA 0x00040700 |
| 8697 | #define DDRSS3_PHY_1362_DATA 0x00000000 |
| 8698 | #define DDRSS3_PHY_1363_DATA 0x00000000 |
| 8699 | #define DDRSS3_PHY_1364_DATA 0x00000000 |
| 8700 | #define DDRSS3_PHY_1365_DATA 0x00000000 |
| 8701 | #define DDRSS3_PHY_1366_DATA 0x00000000 |
| 8702 | #define DDRSS3_PHY_1367_DATA 0x00000002 |
| 8703 | #define DDRSS3_PHY_1368_DATA 0x00000000 |
| 8704 | #define DDRSS3_PHY_1369_DATA 0x00000000 |
| 8705 | #define DDRSS3_PHY_1370_DATA 0x00000000 |
| 8706 | #define DDRSS3_PHY_1371_DATA 0x00000000 |
| 8707 | #define DDRSS3_PHY_1372_DATA 0x00000000 |
| 8708 | #define DDRSS3_PHY_1373_DATA 0x00000000 |
| 8709 | #define DDRSS3_PHY_1374_DATA 0x00080000 |
| 8710 | #define DDRSS3_PHY_1375_DATA 0x000007FF |
| 8711 | #define DDRSS3_PHY_1376_DATA 0x00000000 |
| 8712 | #define DDRSS3_PHY_1377_DATA 0x00000000 |
| 8713 | #define DDRSS3_PHY_1378_DATA 0x00000000 |
| 8714 | #define DDRSS3_PHY_1379_DATA 0x00000000 |
| 8715 | #define DDRSS3_PHY_1380_DATA 0x00000000 |
| 8716 | #define DDRSS3_PHY_1381_DATA 0x00000000 |
| 8717 | #define DDRSS3_PHY_1382_DATA 0x000FFFFF |
| 8718 | #define DDRSS3_PHY_1383_DATA 0x000FFFFF |
| 8719 | #define DDRSS3_PHY_1384_DATA 0x0000FFFF |
| 8720 | #define DDRSS3_PHY_1385_DATA 0xFFFFFFF0 |
| 8721 | #define DDRSS3_PHY_1386_DATA 0x030FFFFF |
| 8722 | #define DDRSS3_PHY_1387_DATA 0x01FFFFFF |
| 8723 | #define DDRSS3_PHY_1388_DATA 0x0000FFFF |
| 8724 | #define DDRSS3_PHY_1389_DATA 0x00000000 |
| 8725 | #define DDRSS3_PHY_1390_DATA 0x00000000 |
| 8726 | #define DDRSS3_PHY_1391_DATA 0x00000000 |
| 8727 | #define DDRSS3_PHY_1392_DATA 0x00000000 |
| 8728 | #define DDRSS3_PHY_1393_DATA 0x0001F7C0 |
| 8729 | #define DDRSS3_PHY_1394_DATA 0x00000003 |
| 8730 | #define DDRSS3_PHY_1395_DATA 0x00000000 |
| 8731 | #define DDRSS3_PHY_1396_DATA 0x00001142 |
| 8732 | #define DDRSS3_PHY_1397_DATA 0x010207AB |
| 8733 | #define DDRSS3_PHY_1398_DATA 0x01000080 |
| 8734 | #define DDRSS3_PHY_1399_DATA 0x03900390 |
| 8735 | #define DDRSS3_PHY_1400_DATA 0x03900390 |
| 8736 | #define DDRSS3_PHY_1401_DATA 0x00000390 |
| 8737 | #define DDRSS3_PHY_1402_DATA 0x00000390 |
| 8738 | #define DDRSS3_PHY_1403_DATA 0x00000390 |
| 8739 | #define DDRSS3_PHY_1404_DATA 0x00000390 |
| 8740 | #define DDRSS3_PHY_1405_DATA 0x00000005 |
| 8741 | #define DDRSS3_PHY_1406_DATA 0x01813FCC |
| 8742 | #define DDRSS3_PHY_1407_DATA 0x000000CC |
| 8743 | #define DDRSS3_PHY_1408_DATA 0x0C000DFF |
| 8744 | #define DDRSS3_PHY_1409_DATA 0x30000DFF |
| 8745 | #define DDRSS3_PHY_1410_DATA 0x3F0DFF11 |
| 8746 | #define DDRSS3_PHY_1411_DATA 0x000100F0 |
| 8747 | #define DDRSS3_PHY_1412_DATA 0x780DFFCC |
| 8748 | #define DDRSS3_PHY_1413_DATA 0x00007E31 |
| 8749 | #define DDRSS3_PHY_1414_DATA 0x000CBF11 |
| 8750 | #define DDRSS3_PHY_1415_DATA 0x01990010 |
| 8751 | #define DDRSS3_PHY_1416_DATA 0x000CBF11 |
| 8752 | #define DDRSS3_PHY_1417_DATA 0x01990010 |
| 8753 | #define DDRSS3_PHY_1418_DATA 0x3F0DFF11 |
| 8754 | #define DDRSS3_PHY_1419_DATA 0x00EF00F0 |
| 8755 | #define DDRSS3_PHY_1420_DATA 0x3F0DFF11 |
| 8756 | #define DDRSS3_PHY_1421_DATA 0x01FF00F0 |
| 8757 | #define DDRSS3_PHY_1422_DATA 0x20040006 |