blob: 4b8d73a92d6a3d3f5cf335472a3944b1053ded68 [file] [log] [blame]
Sinthu Rajad44e0c62023-01-10 21:17:56 +05301// SPDX-License-Identifier: GPL-2.0
2/*
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +05303 * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
Sinthu Rajad44e0c62023-01-10 21:17:56 +05304 */
5
Neha Malcom Francis9409fb62023-07-22 00:14:36 +05306#include "k3-j721s2-binman.dtsi"
7
Sinthu Rajad44e0c62023-01-10 21:17:56 +05308&wkup_i2c0 {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +05309 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053010};
11
12&cbass_main {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053013 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053014};
15
16&main_navss {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053017 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053018};
19
20&cbass_mcu_wakeup {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053021 bootph-all;
Manorit Chawdhry000bb0b2024-05-10 10:20:25 +053022};
Sinthu Rajad44e0c62023-01-10 21:17:56 +053023
Manorit Chawdhry000bb0b2024-05-10 10:20:25 +053024&wkup_conf {
25 bootph-all;
26};
27
28&chipid {
29 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053030};
31
32&mcu_navss {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053033 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053034};
35
36&mcu_ringacc {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053037 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053038};
39
40&mcu_udmap {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053041 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053042};
43
44&secure_proxy_main {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053045 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053046};
47
48&sms {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053049 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053050};
51
52&main_pmx0 {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053053 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053054};
55
56&main_uart8_pins_default {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053057 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053058};
59
60&main_mmc1_pins_default {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053061 bootph-all;
62};
63
64&main_usbss0_pins_default {
65 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053066};
67
68&wkup_pmx0 {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053069 bootph-all;
70};
71
72&wkup_pmx1 {
73 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053074};
75
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053076&wkup_pmx2 {
77 bootph-all;
78};
79
80&wkup_pmx3 {
81 bootph-all;
82};
83
Sinthu Rajad44e0c62023-01-10 21:17:56 +053084&k3_pds {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053085 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053086};
87
88&k3_clks {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053089 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053090};
91
92&k3_reset {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053093 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053094};
95
96&main_uart8 {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +053097 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +053098};
99
100&mcu_uart0 {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +0530101 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +0530102};
103
104&wkup_uart0 {
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +0530105 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +0530106};
107
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +0530108&main_sdhci1 {
109 bootph-all;
110};
Sinthu Rajad44e0c62023-01-10 21:17:56 +0530111
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +0530112&ospi0 {
113 status = "disabled";
Sinthu Rajad44e0c62023-01-10 21:17:56 +0530114};
115
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +0530116&ospi1 {
Sinthu Rajad44e0c62023-01-10 21:17:56 +0530117 status = "disabled";
118};
119
Manorit Chawdhry1b1b93d2023-10-06 10:15:59 +0530120&usbss0 {
121 bootph-all;
122};
123
124&usb0 {
125 dr_mode = "peripheral";
126 bootph-all;
Sinthu Rajad44e0c62023-01-10 21:17:56 +0530127};
Manorit Chawdhry6a91e282024-05-10 10:20:24 +0530128
129#ifdef CONFIG_TARGET_J721S2_A72_EVM
130
Manorit Chawdhry000bb0b2024-05-10 10:20:25 +0530131#define SPL_AM68_SK_DTB "spl/dts/ti/k3-am68-sk-base-board.dtb"
Manorit Chawdhry6a91e282024-05-10 10:20:24 +0530132#define AM68_SK_DTB "u-boot.dtb"
133
134&spl_j721s2_evm_dtb {
135 filename = SPL_AM68_SK_DTB;
136};
137
138&j721s2_evm_dtb {
139 filename = AM68_SK_DTB;
140};
141
142&spl_j721s2_evm_dtb_unsigned {
143 filename = SPL_AM68_SK_DTB;
144};
145
146&j721s2_evm_dtb_unsigned {
147 filename = AM68_SK_DTB;
148};
149
150#endif