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git01.mediatek.com / filogic / uboot / 9fe526db6e1dde0a8710a5c08aedb86dd02693b4 / . / arch / arm / dts / imx8mm-u-boot.dtsi
blob: b9b1193823a503852a8cbb925a146458e38f5df7 [file] [log] [blame]
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2020 Jagan Teki <jagan@amarulasolutions.com>
4 */
5
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]6/ {
7 binman: binman {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]8 };
Tim Harveyb34f5a12023-08-24 12:01:42 -0700[diff] [blame]9
10#ifdef CONFIG_OPTEE
11 firmware {
12 optee {
13 compatible = "linaro,optee-tz";
14 method = "smc";
15 };
16 };
17#endif
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]18};
19
Tim Harvey0951b9a2023-08-24 12:03:56 -0700[diff] [blame]20#ifdef CONFIG_FSL_CAAM
21&crypto {
22 bootph-pre-ram;
23};
24#endif
25
Marcel Ziswiler6dd051a2022-11-07 22:22:41 +0100[diff] [blame]26&soc {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]27 bootph-all;
28 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]29};
30
31&aips1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]32 bootph-all;
33 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]34};
35
36&aips2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]37 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]38};
39
40&aips3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]41 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]42};
43
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]44&binman {
Marek Vasutf44c7382024-04-26 01:00:37 +0200[diff] [blame]45 filename = "flash.bin";
46 section {
47 pad-byte = <0x00>;
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]48
Marek Vasutf44c7382024-04-26 01:00:37 +0200[diff] [blame]49#ifdef CONFIG_FSPI_CONF_HEADER
50 fspi_conf_block {
51 filename = CONFIG_FSPI_CONF_FILE;
Marcel Ziswiler3c2534a2021-10-23 01:15:16 +0200[diff] [blame]52 type = "blob-ext";
Marek Vasutf44c7382024-04-26 01:00:37 +0200[diff] [blame]53 size = <0x1000>;
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]54 };
Marek Vasutf44c7382024-04-26 01:00:37 +0200[diff] [blame]55#endif
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]56
Marek Vasut9fe526d2024-05-21 12:48:24 +0200[diff] [blame^]57 binman_imx_spl: nxp-imx8mimage {
Marek Vasutf44c7382024-04-26 01:00:37 +0200[diff] [blame]58 filename = "u-boot-spl-mkimage.bin";
59 nxp,boot-from = "sd";
60 nxp,rom-version = <1>;
61 nxp,loader-address = <CONFIG_SPL_TEXT_BASE>;
62 args; /* Needed by mkimage etype superclass */
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]63
Marek Vasutf44c7382024-04-26 01:00:37 +0200[diff] [blame]64 section {
65 align = <4>;
66 align-size = <4>;
67 filename = "u-boot-spl-ddr.bin";
68 pad-byte = <0xff>;
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]69
Marek Vasutf44c7382024-04-26 01:00:37 +0200[diff] [blame]70 u-boot-spl {
71 align-end = <4>;
72 filename = "u-boot-spl.bin";
73 };
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]74
Marek Vasutf44c7382024-04-26 01:00:37 +0200[diff] [blame]75 ddr-1d-imem-fw {
76 filename = "lpddr4_pmu_train_1d_imem.bin";
77 align-end = <4>;
78 type = "blob-ext";
79 };
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]80
Marek Vasutf44c7382024-04-26 01:00:37 +0200[diff] [blame]81 ddr-1d-dmem-fw {
82 filename = "lpddr4_pmu_train_1d_dmem.bin";
83 align-end = <4>;
84 type = "blob-ext";
85 };
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]86
Marek Vasutf44c7382024-04-26 01:00:37 +0200[diff] [blame]87 ddr-2d-imem-fw {
88 filename = "lpddr4_pmu_train_2d_imem.bin";
89 align-end = <4>;
90 type = "blob-ext";
91 };
92
93 ddr-2d-dmem-fw {
94 filename = "lpddr4_pmu_train_2d_dmem.bin";
95 align-end = <4>;
96 type = "blob-ext";
97 };
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]98 };
99 };
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]100
Marek Vasut9fe526d2024-05-21 12:48:24 +0200[diff] [blame^]101 binman_imx_fit: fit {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]102 description = "Configuration to load ATF before U-Boot";
Marek Vasuta7416eb2023-05-28 23:00:30 +0200[diff] [blame]103#ifndef CONFIG_IMX_HAB
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]104 fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
Marek Vasuta7416eb2023-05-28 23:00:30 +0200[diff] [blame]105#endif
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]106 fit,fdt-list = "of-list";
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]107 #address-cells = <1>;
Marek Vasutf44c7382024-04-26 01:00:37 +0200[diff] [blame]108#ifdef CONFIG_FSPI_CONF_HEADER
109 offset = <0x58C00>;
110#else
111 offset = <0x57c00>;
112#endif
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]113
114 images {
115 uboot {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]116 arch = "arm64";
117 compression = "none";
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]118 description = "U-Boot (64-bit)";
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]119 load = <CONFIG_TEXT_BASE>;
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]120 type = "standalone";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]121
Patrick Wildta6ca6912022-01-13 15:22:17 +0100[diff] [blame]122 uboot-blob {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]123 filename = "u-boot-nodtb.bin";
Marcel Ziswiler3c2534a2021-10-23 01:15:16 +0200[diff] [blame]124 type = "blob-ext";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]125 };
126 };
127
Marek Vasut1de0eb12022-12-22 01:46:37 +0100[diff] [blame]128#ifndef CONFIG_ARMV8_PSCI
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]129 atf {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]130 arch = "arm64";
131 compression = "none";
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]132 description = "ARM Trusted Firmware";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]133 entry = <0x920000>;
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]134 load = <0x920000>;
135 type = "firmware";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]136
Patrick Wildta6ca6912022-01-13 15:22:17 +0100[diff] [blame]137 atf-blob {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]138 filename = "bl31.bin";
Marcel Ziswilerd87d2f12022-04-08 10:06:56 +0200[diff] [blame]139 type = "atf-bl31";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]140 };
141 };
Marek Vasut1de0eb12022-12-22 01:46:37 +0100[diff] [blame]142#endif
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]143
144 binman_fip: fip {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]145 arch = "arm64";
146 compression = "none";
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]147 description = "Trusted Firmware FIP";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]148 load = <0x40310000>;
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]149 type = "firmware";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]150 };
151
152 @fdt-SEQ {
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]153 compression = "none";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]154 description = "NAME";
155 type = "flat_dt";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]156
Patrick Wildta6ca6912022-01-13 15:22:17 +0100[diff] [blame]157 uboot-fdt-blob {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]158 filename = "u-boot.dtb";
Marcel Ziswiler3c2534a2021-10-23 01:15:16 +0200[diff] [blame]159 type = "blob-ext";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]160 };
161 };
162 };
163
164 configurations {
165 default = "@config-DEFAULT-SEQ";
166
Simon Glassceea7842023-08-23 19:18:01 -0600[diff] [blame]167 @config-SEQ {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]168 description = "NAME";
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]169 fdt = "fdt-SEQ";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]170 firmware = "uboot";
Marek Vasut1de0eb12022-12-22 01:46:37 +0100[diff] [blame]171#ifndef CONFIG_ARMV8_PSCI
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]172 loadables = "atf";
Marek Vasut1de0eb12022-12-22 01:46:37 +0100[diff] [blame]173#endif
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]174 };
175 };
176 };
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]177 };
178};
179
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]180&clk {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]181 bootph-all;
182 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]183 /delete-property/ assigned-clocks;
184 /delete-property/ assigned-clock-parents;
185 /delete-property/ assigned-clock-rates;
186};
187
188&iomuxc {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]189 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]190};
191
192&osc_24m {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]193 bootph-all;
194 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]195};
Marcel Ziswilerca453f22022-07-21 15:27:40 +0200[diff] [blame]196
Tim Harvey0951b9a2023-08-24 12:03:56 -0700[diff] [blame]197#ifdef CONFIG_FSL_CAAM
198&sec_jr0 {
199 bootph-pre-ram;
200};
201
202&sec_jr1 {
203 bootph-pre-ram;
204};
205
206&sec_jr2 {
207 bootph-pre-ram;
208};
209#endif
210
Marcel Ziswilerca453f22022-07-21 15:27:40 +0200[diff] [blame]211&spba1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]212 bootph-all;
213 bootph-pre-ram;
Marcel Ziswilerca453f22022-07-21 15:27:40 +0200[diff] [blame]214};
215
216&spba2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]217 bootph-all;
218 bootph-pre-ram;
Marcel Ziswilerca453f22022-07-21 15:27:40 +0200[diff] [blame]219};