Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_IMX8M=y |
Simon Glass | 72cc538 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 3 | CONFIG_TEXT_BASE=0x40200000 |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 4 | CONFIG_SPL_GPIO=y |
| 5 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 6 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| 7 | CONFIG_NR_DRAM_BANKS=2 |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 8 | CONFIG_ENV_SIZE=0x2000 |
| 9 | CONFIG_ENV_OFFSET=0xFFFFDE00 |
| 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
| 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
| 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
| 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
| 14 | CONFIG_DM_GPIO=y |
Marcel Ziswiler | f862146 | 2022-07-21 15:46:44 +0200 | [diff] [blame] | 15 | CONFIG_DEFAULT_DEVICE_TREE="imx8mp-verdin-wifi-dev" |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 16 | CONFIG_SPL_TEXT_BASE=0x920000 |
| 17 | CONFIG_TARGET_VERDIN_IMX8MP=y |
Tom Rini | ce53ec8 | 2022-08-23 15:24:14 -0400 | [diff] [blame] | 18 | CONFIG_SYS_PROMPT="Verdin iMX8MP # " |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 19 | CONFIG_SPL_MMC=y |
| 20 | CONFIG_SPL_SERIAL=y |
| 21 | CONFIG_SPL_DRIVERS_MISC=y |
| 22 | CONFIG_SPL=y |
| 23 | CONFIG_IMX_BOOTAUX=y |
| 24 | CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 |
Marcel Ziswiler | 48646d8 | 2022-09-22 23:28:32 +0200 | [diff] [blame] | 25 | CONFIG_SYS_LOAD_ADDR=0x48200000 |
Tom Rini | 76fbc6f | 2022-04-01 10:33:18 -0400 | [diff] [blame] | 26 | CONFIG_SYS_MEMTEST_START=0x40000000 |
| 27 | CONFIG_SYS_MEMTEST_END=0x80000000 |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 28 | CONFIG_DISTRO_DEFAULTS=y |
Tom Rini | 3a7c8a0 | 2022-03-11 07:12:48 -0500 | [diff] [blame] | 29 | CONFIG_REMAKE_ELF=y |
Tom Rini | 7f18432 | 2022-10-28 20:27:07 -0400 | [diff] [blame] | 30 | CONFIG_SYS_MONITOR_LEN=524288 |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 31 | CONFIG_FIT=y |
| 32 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
| 33 | CONFIG_FIT_VERBOSE=y |
| 34 | CONFIG_SPL_LOAD_FIT=y |
| 35 | # CONFIG_USE_SPL_FIT_GENERATOR is not set |
| 36 | CONFIG_OF_SYSTEM_SETUP=y |
| 37 | CONFIG_BOOTDELAY=1 |
| 38 | CONFIG_USE_PREBOOT=y |
Philippe Schenker | 3bf73ea | 2022-04-13 11:33:31 +0200 | [diff] [blame] | 39 | CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx8mp-verdin-${variant}-${fdt_board}.dtb" |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 40 | CONFIG_LOG=y |
| 41 | # CONFIG_DISPLAY_BOARDINFO is not set |
| 42 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 43 | CONFIG_BOARD_EARLY_INIT_F=y |
| 44 | CONFIG_BOARD_LATE_INIT=y |
Tom Rini | abb0f52 | 2022-05-16 17:20:26 -0400 | [diff] [blame] | 45 | CONFIG_SPL_MAX_SIZE=0x26000 |
Tom Rini | 65aa124 | 2022-05-27 10:19:45 -0400 | [diff] [blame] | 46 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 47 | CONFIG_SPL_BSS_START_ADDR=0x98fc00 |
Tom Rini | 0cb89e7 | 2022-05-19 15:09:22 -0400 | [diff] [blame] | 48 | CONFIG_SPL_BSS_MAX_SIZE=0x400 |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 49 | CONFIG_SPL_BOARD_INIT=y |
| 50 | CONFIG_SPL_BOOTROM_SUPPORT=y |
| 51 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
Tom Rini | 8a14ac4 | 2022-05-26 13:13:21 -0400 | [diff] [blame] | 52 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| 53 | CONFIG_SPL_STACK=0x960000 |
Tom Rini | 166e322 | 2022-05-27 12:48:32 -0400 | [diff] [blame] | 54 | CONFIG_SYS_SPL_MALLOC=y |
| 55 | CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y |
| 56 | CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 |
| 57 | CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 58 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y |
| 59 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 |
| 60 | CONFIG_SPL_I2C=y |
| 61 | CONFIG_SPL_POWER=y |
| 62 | CONFIG_SPL_WATCHDOG=y |
Tom Rini | ba5c2b0 | 2022-05-11 16:21:06 -0400 | [diff] [blame] | 63 | CONFIG_SYS_MAXARGS=64 |
Tom Rini | ae17fa3 | 2022-05-11 18:01:06 -0400 | [diff] [blame] | 64 | CONFIG_SYS_CBSIZE=2048 |
Tom Rini | cbfa139 | 2022-05-11 17:38:09 -0400 | [diff] [blame] | 65 | CONFIG_SYS_PBSIZE=2081 |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 66 | # CONFIG_BOOTM_NETBSD is not set |
| 67 | CONFIG_CMD_ASKENV=y |
| 68 | # CONFIG_CMD_EXPORTENV is not set |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 69 | CONFIG_CRC32_VERIFY=y |
| 70 | CONFIG_CMD_MD5SUM=y |
| 71 | CONFIG_MD5SUM_VERIFY=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 72 | CONFIG_CMD_MEMTEST=y |
| 73 | CONFIG_CMD_CLK=y |
| 74 | CONFIG_CMD_FUSE=y |
| 75 | CONFIG_CMD_GPIO=y |
| 76 | CONFIG_CMD_I2C=y |
| 77 | CONFIG_CMD_MMC=y |
| 78 | CONFIG_CMD_READ=y |
| 79 | CONFIG_CMD_USB=y |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 80 | CONFIG_CMD_BOOTCOUNT=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 81 | CONFIG_CMD_CACHE=y |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 82 | CONFIG_CMD_TIME=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 83 | CONFIG_CMD_UUID=y |
| 84 | CONFIG_CMD_REGULATOR=y |
| 85 | CONFIG_CMD_EXT4_WRITE=y |
| 86 | # CONFIG_ISO_PARTITION is not set |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 87 | # CONFIG_SPL_EFI_PARTITION is not set |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 88 | CONFIG_OF_CONTROL=y |
| 89 | CONFIG_SPL_OF_CONTROL=y |
| 90 | CONFIG_ENV_OVERWRITE=y |
| 91 | CONFIG_ENV_IS_IN_MMC=y |
| 92 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 93 | CONFIG_SYS_MMC_ENV_DEV=2 |
| 94 | CONFIG_SYS_MMC_ENV_PART=1 |
| 95 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
Tom Rini | fe58675 | 2022-03-11 09:12:07 -0500 | [diff] [blame] | 96 | CONFIG_USE_ETHPRIME=y |
| 97 | CONFIG_ETHPRIME="eth0" |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 98 | CONFIG_VERSION_VARIABLE=y |
| 99 | CONFIG_IP_DEFRAG=y |
| 100 | CONFIG_TFTP_BLOCKSIZE=4096 |
| 101 | CONFIG_SPL_DM=y |
| 102 | CONFIG_REGMAP=y |
| 103 | CONFIG_SYSCON=y |
| 104 | CONFIG_BOOTCOUNT_LIMIT=y |
| 105 | CONFIG_BOOTCOUNT_ENV=y |
| 106 | CONFIG_CLK_COMPOSITE_CCF=y |
| 107 | CONFIG_CLK_IMX8MP=y |
Tom Rini | f927925 | 2022-11-07 11:58:57 -0500 | [diff] [blame] | 108 | CONFIG_FSL_CAAM=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 109 | CONFIG_GPIO_HOG=y |
| 110 | CONFIG_MXC_GPIO=y |
| 111 | CONFIG_DM_PCA953X=y |
| 112 | CONFIG_DM_I2C=y |
| 113 | # CONFIG_SPL_DM_I2C is not set |
| 114 | CONFIG_SPL_SYS_I2C_LEGACY=y |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 115 | CONFIG_LED=y |
| 116 | CONFIG_LED_GPIO=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 117 | CONFIG_I2C_EEPROM=y |
| 118 | CONFIG_SUPPORT_EMMC_BOOT=y |
| 119 | CONFIG_MMC_IO_VOLTAGE=y |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 120 | CONFIG_SPL_MMC_IO_VOLTAGE=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 121 | CONFIG_MMC_UHS_SUPPORT=y |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 122 | CONFIG_SPL_MMC_UHS_SUPPORT=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 123 | CONFIG_MMC_HS400_ES_SUPPORT=y |
| 124 | CONFIG_MMC_HS400_SUPPORT=y |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 125 | CONFIG_SPL_MMC_HS400_SUPPORT=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 126 | CONFIG_FSL_USDHC=y |
| 127 | CONFIG_PHY_ADDR_ENABLE=y |
| 128 | CONFIG_PHY_MICREL=y |
| 129 | CONFIG_PHY_MICREL_KSZ90X1=y |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 130 | CONFIG_PHY_FIXED=y |
| 131 | CONFIG_DM_MDIO=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 132 | CONFIG_DM_ETH_PHY=y |
| 133 | CONFIG_DWC_ETH_QOS=y |
| 134 | CONFIG_DWC_ETH_QOS_IMX=y |
| 135 | CONFIG_FEC_MXC=y |
| 136 | CONFIG_RGMII=y |
| 137 | CONFIG_MII=y |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 138 | CONFIG_PHY_IMX8MQ_USB=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 139 | CONFIG_PINCTRL=y |
| 140 | CONFIG_SPL_PINCTRL=y |
| 141 | CONFIG_PINCTRL_IMX8M=y |
| 142 | CONFIG_SPL_POWER_LEGACY=y |
| 143 | CONFIG_POWER_DOMAIN=y |
| 144 | CONFIG_IMX8M_POWER_DOMAIN=y |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 145 | CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 146 | CONFIG_DM_REGULATOR=y |
| 147 | CONFIG_DM_REGULATOR_FIXED=y |
| 148 | CONFIG_DM_REGULATOR_GPIO=y |
| 149 | CONFIG_SPL_POWER_I2C=y |
Marcel Ziswiler | b2366b3 | 2022-04-08 10:06:57 +0200 | [diff] [blame] | 150 | CONFIG_DM_SERIAL=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 151 | CONFIG_MXC_UART=y |
| 152 | CONFIG_SYSRESET=y |
| 153 | CONFIG_SPL_SYSRESET=y |
| 154 | CONFIG_SYSRESET_PSCI=y |
| 155 | CONFIG_SYSRESET_WATCHDOG=y |
| 156 | CONFIG_DM_THERMAL=y |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 157 | CONFIG_IMX_TMU=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 158 | CONFIG_USB=y |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 159 | CONFIG_USB_XHCI_HCD=y |
| 160 | CONFIG_USB_XHCI_DWC3=y |
| 161 | CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 162 | CONFIG_USB_EHCI_HCD=y |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 163 | CONFIG_MXC_USB_OTG_HACTIVE=y |
| 164 | CONFIG_USB_DWC3=y |
| 165 | CONFIG_USB_DWC3_GENERIC=y |
| 166 | CONFIG_USB_KEYBOARD=y |
| 167 | CONFIG_USB_HOST_ETHER=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 168 | CONFIG_IMX_WATCHDOG=y |
Marcel Ziswiler | a2133fe | 2022-09-22 23:28:34 +0200 | [diff] [blame] | 169 | CONFIG_HEXDUMP=y |
Marcel Ziswiler | 36a439d | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 170 | CONFIG_OF_LIBFDT_OVERLAY=y |