| Yoshihiro Shimoda | ad1a3a9 | 2007-12-03 22:58:45 +0900 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
| 3 | * (C) Copyright 2007 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License as |
| 7 | * published by the Free Software Foundation; either version 2 of |
| 8 | * the License, or (at your option) any later version. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 18 | * MA 02111-1307 USA |
| 19 | */ |
| 20 | |
| 21 | #ifndef _ASM_CPU_SH3_H_ |
| 22 | #define _ASM_CPU_SH3_H_ |
| 23 | |
| 24 | /* cache control */ |
| 25 | #define CCR_CACHE_STOP 0x00000008 |
| 26 | #define CCR_CACHE_ENABLE 0x00000005 |
| 27 | #define CCR_CACHE_ICI 0x00000008 |
| 28 | |
| 29 | #define CACHE_OC_ADDRESS_ARRAY 0xf0000000 |
| 30 | #define CACHE_OC_WAY_SHIFT 13 |
| 31 | #define CACHE_OC_NUM_ENTRIES 256 |
| 32 | #define CACHE_OC_ENTRY_SHIFT 4 |
| 33 | |
| 34 | #if defined(CONFIG_CPU_SH7720) |
| 35 | #include <asm/cpu_sh7720.h> |
| 36 | #else |
| 37 | #error "Unknown SH3 variant" |
| 38 | #endif |
| 39 | |
| 40 | #endif /* _ASM_CPU_SH3_H_ */ |