blob: 9182c20bc9cc678299f3e53b594c5a86c88720c3 [file] [log] [blame]
Ying Zhang8876a512014-10-31 18:06:18 +08001/*
2 * Copyright 2014 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __VID_H_
8#define __VID_H_
9
10#define IR36021_LOOP1_MANUAL_ID_OFFSET 0x6A
11#define IR36021_LOOP1_VOUT_OFFSET 0x9A
12#define IR36021_MFR_ID_OFFSET 0x92
13#define IR36021_MFR_ID 0x43
Ying Zhang7ad5eff2016-01-22 12:15:12 +080014#define IR36021_INTEL_MODE_OOFSET 0x14
15#define IR36021_MODE_MASK 0x20
16#define IR36021_INTEL_MODE 0x00
17#define IR36021_AMD_MODE 0x20
Ying Zhang8876a512014-10-31 18:06:18 +080018
19/* step the IR regulator in 5mV increments */
20#define IR_VDD_STEP_DOWN 5
21#define IR_VDD_STEP_UP 5
22int adjust_vdd(ulong vdd_override);
23
24#endif /* __VID_H_ */