Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 331f7f98b10190fa72dd8d40b91eb725e9484a93 / . / configs / sifive_unmatched_defconfig
blob: 299580894c4e00e13ad5b6e096fd4c7923f5418a [file] [log] [blame]
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]1CONFIG_RISCV=y
Tom Rini1c05dc92021-10-15 08:06:20 -0400[diff] [blame]2# CONFIG_SPL_USE_ARCH_MEMMOVE is not set
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]3CONFIG_SYS_MALLOC_LEN=0x800000
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]4CONFIG_SYS_MALLOC_F_LEN=0x3000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]5CONFIG_SPL_GPIO=y
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
7CONFIG_SPL_DM_SPI=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]8CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00"
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]9CONFIG_SPL_MMC=y
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]10CONFIG_SPL=y
Thomas Skibof50fad62021-11-24 14:32:09 -0800[diff] [blame]11CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]12CONFIG_SPL_SPI=y
Tom Rini50e6f1b2021-12-12 22:12:32 -0500[diff] [blame]13CONFIG_SYS_PCI_64BIT=y
Heinrich Schuchardt2db3de02021-08-25 18:21:57 +0200[diff] [blame]14CONFIG_AHCI=y
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]15CONFIG_TARGET_SIFIVE_UNMATCHED=y
16CONFIG_ARCH_RV64I=y
17CONFIG_RISCV_SMODE=y
18CONFIG_DISTRO_DEFAULTS=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]19CONFIG_SYS_LOAD_ADDR=0x80200000
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]20CONFIG_FIT=y
21CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]22CONFIG_USE_PREBOOT=y
23CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};"
Dimitri John Ledkovda9e1472021-06-16 16:39:06 +0100[diff] [blame]24CONFIG_DEFAULT_FDT_FILE="sifive/hifive-unmatched-a00.dtb"
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]25CONFIG_DISPLAY_CPUINFO=y
26CONFIG_DISPLAY_BOARDINFO=y
27CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Rini4abdf142021-08-17 17:59:41 -0400[diff] [blame]28CONFIG_ID_EEPROM=y
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]29CONFIG_SPL_SEPARATE_BSS=y
Thomas Skibof50fad62021-11-24 14:32:09 -0800[diff] [blame]30CONFIG_SPL_DM_SPI_FLASH=y
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]31CONFIG_SPL_DM_RESET=y
Thomas Skibof50fad62021-11-24 14:32:09 -0800[diff] [blame]32CONFIG_SPL_SPI_LOAD=y
Tom Rini8828b1b2021-06-07 08:09:35 -0400[diff] [blame]33CONFIG_CMD_EEPROM=y
34CONFIG_CMD_MEMINFO=y
35CONFIG_CMD_PWM=y
36CONFIG_CMD_GPT_RENAME=y
Tom Rini8828b1b2021-06-07 08:09:35 -0400[diff] [blame]37CONFIG_CMD_PCI=y
38CONFIG_CMD_USB=y
Thomas Skibof50fad62021-11-24 14:32:09 -0800[diff] [blame]39CONFIG_ENV_SPI_BUS=1
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]40CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Heinrich Schuchardt2db3de02021-08-25 18:21:57 +0200[diff] [blame]41CONFIG_SCSI_AHCI=y
42CONFIG_AHCI_PCI=y
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]43CONFIG_SPL_CLK=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]44CONFIG_SYS_I2C_EEPROM_ADDR=0x54
Tom Rinib3e3fe42021-12-27 13:53:48 +0000[diff] [blame]45CONFIG_SPI_FLASH_ISSI=y
Tom Rini8828b1b2021-06-07 08:09:35 -0400[diff] [blame]46CONFIG_E1000=y
47CONFIG_NVME=y
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]48CONFIG_PCI=y
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]49CONFIG_PCIE_DW_SIFIVE=y
Tom Rini8828b1b2021-06-07 08:09:35 -0400[diff] [blame]50CONFIG_DM_RESET=y
Heinrich Schuchardt2db3de02021-08-25 18:21:57 +0200[diff] [blame]51CONFIG_SCSI=y
52CONFIG_DM_SCSI=y
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]53CONFIG_USB=y
Green Wan2e5da522021-05-27 06:52:13 -0700[diff] [blame]54CONFIG_USB_XHCI_HCD=y
55CONFIG_USB_XHCI_PCI=y