blob: 5fd6a95c4d175727c930279156676fa8635ba506 [file] [log] [blame]
wdenke65527f2004-02-12 00:47:09 +00001/*
2 * Configuation settings for the Motorola MC5272C3 board.
3 *
4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
wdenkabf7a7c2003-12-08 01:34:36 +000024
wdenke65527f2004-02-12 00:47:09 +000025/*
26 * board/config.h - configuration options, board specific
27 */
wdenkabf7a7c2003-12-08 01:34:36 +000028
wdenke65527f2004-02-12 00:47:09 +000029#ifndef _M5272C3_H
30#define _M5272C3_H
31
32/*
33 * High Level Configuration Options
34 * (easy to change)
35 */
36#define CONFIG_MCF52x2 /* define processor family */
37#define CONFIG_M5272 /* define processor type */
wdenkabf7a7c2003-12-08 01:34:36 +000038
39#define FEC_ENET
40
wdenke65527f2004-02-12 00:47:09 +000041#define CONFIG_BAUDRATE 19200
42#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
43
44#define CONFIG_WATCHDOG
45#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
46
47#define CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
48
49/* Configuration for environment
50 * Environment is embedded in u-boot in the second sector of the flash
51 */
52#ifndef CONFIG_MONITOR_IS_IN_RAM
53#define CFG_ENV_OFFSET 0x4000
54#define CFG_ENV_SECT_SIZE 0x2000
55#define CFG_ENV_IS_IN_FLASH 1
56#define CFG_ENV_IS_EMBEDDED 1
57#else
58#define CFG_ENV_ADDR 0xffe04000
59#define CFG_ENV_SECT_SIZE 0x2000
60#define CFG_ENV_IS_IN_FLASH 1
61#endif
62
63#define CONFIG_COMMANDS ( CONFIG_CMD_DFL & ~(CFG_CMD_LOADS | CFG_CMD_LOADB) | \
64 CFG_CMD_MII)
65
66/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
67#include <cmd_confdefs.h>
68#define CONFIG_BOOTDELAY 5
69
70#define CFG_PROMPT "-> "
71#define CFG_LONGHELP /* undef to save memory */
72
73#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
74#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
75#else
76#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
77#endif
78#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
79#define CFG_MAXARGS 16 /* max number of command args */
80#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
81
82#define CFG_LOAD_ADDR 0x20000
83
84#define CFG_MEMTEST_START 0x400
85#define CFG_MEMTEST_END 0x380000
86
87#define CFG_HZ 1000
88#define CFG_CLK 66000000
89
90/*
91 * Low Level Configuration Settings
92 * (address mappings, register initial values, etc.)
93 * You should know what you are doing if you make changes here.
94 */
95
96#define CFG_MBAR 0x10000000 /* Register Base Addrs */
97
98#define CFG_SCR 0x0003;
99#define CFG_SPR 0xffff;
100
101#define CFG_DISCOVER_PHY
102#define CFG_ENET_BD_BASE 0x380000
103
104/*-----------------------------------------------------------------------
105 * Definitions for initial stack pointer and data area (in DPRAM)
106 */
107#define CFG_INIT_RAM_ADDR 0x20000000
108#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
109#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
110#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
111#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
112
113/*-----------------------------------------------------------------------
114 * Start addresses for the final memory configuration
115 * (Set up by the startup code)
116 * Please note that CFG_SDRAM_BASE _must_ start at 0
117 */
118#define CFG_SDRAM_BASE 0x00000000
119#define CFG_SDRAM_SIZE 4 /* SDRAM size in MB */
120#define CFG_FLASH_BASE 0xffe00000
121
122#ifdef CONFIG_MONITOR_IS_IN_RAM
123#define CFG_MONITOR_BASE 0x20000
124#else
125#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
126#endif
127
128#define CFG_MONITOR_LEN 0x20000
129#define CFG_MALLOC_LEN (256 << 10)
130#define CFG_BOOTPARAMS_LEN 64*1024
131
132/*
133 * For booting Linux, the board info and command line data
134 * have to be in the first 8 MB of memory, since this is
135 * the maximum mapped by the Linux kernel during initialization ??
136 */
137#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
138
139/*-----------------------------------------------------------------------
140 * FLASH organization
141 */
142#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
143#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
144#define CFG_FLASH_ERASE_TOUT 1000
145
146/*-----------------------------------------------------------------------
147 * Cache Configuration
148 */
149#define CFG_CACHELINE_SIZE 16
150
151/*-----------------------------------------------------------------------
152 * Memory bank definitions
153 */
154#define CFG_BR0_PRELIM 0xFFE00201
155#define CFG_OR0_PRELIM 0xFFE00014
156
157#define CFG_BR1_PRELIM 0
158#define CFG_OR1_PRELIM 0
159
160#define CFG_BR2_PRELIM 0x30000001
161#define CFG_OR2_PRELIM 0xFFF80000
162
163#define CFG_BR3_PRELIM 0
164#define CFG_OR3_PRELIM 0
165
166#define CFG_BR4_PRELIM 0
167#define CFG_OR4_PRELIM 0
168
169#define CFG_BR5_PRELIM 0
170#define CFG_OR5_PRELIM 0
171
172#define CFG_BR6_PRELIM 0
173#define CFG_OR6_PRELIM 0
174
175#define CFG_BR7_PRELIM 0x00000701
176#define CFG_OR7_PRELIM 0xFFC0007C
177
178/*-----------------------------------------------------------------------
179 * Port configuration
180 */
181#define CFG_PACNT 0x00000000
182#define CFG_PADDR 0x0000
183#define CFG_PADAT 0x0000
184#define CFG_PBCNT 0x55554155 /* Ethernet/UART configuration */
185#define CFG_PBDDR 0x0000
186#define CFG_PBDAT 0x0000
187#define CFG_PDCNT 0x00000000
wdenkabf7a7c2003-12-08 01:34:36 +0000188
wdenke65527f2004-02-12 00:47:09 +0000189#endif /* _M5272C3_H */