| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Simon Glass | 8fa4d5a | 2015-08-30 16:55:27 -0600 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2015 Google, Inc |
| Simon Glass | 8fa4d5a | 2015-08-30 16:55:27 -0600 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef _ASM_ARCH_GPIO_H |
| 7 | #define _ASM_ARCH_GPIO_H |
| 8 | |
| 9 | struct rockchip_gpio_regs { |
| 10 | u32 swport_dr; |
| 11 | u32 swport_ddr; |
| 12 | u32 reserved0[(0x30 - 0x08) / 4]; |
| 13 | u32 inten; |
| 14 | u32 intmask; |
| 15 | u32 inttype_level; |
| 16 | u32 int_polarity; |
| 17 | u32 int_status; |
| 18 | u32 int_rawstatus; |
| 19 | u32 debounce; |
| 20 | u32 porta_eoi; |
| 21 | u32 ext_port; |
| 22 | u32 reserved1[(0x60 - 0x54) / 4]; |
| 23 | u32 ls_sync; |
| 24 | }; |
| 25 | check_member(rockchip_gpio_regs, ls_sync, 0x60); |
| 26 | |
| Simon Glass | b3e0a5a | 2019-01-21 14:53:33 -0700 | [diff] [blame^] | 27 | enum gpio_pu_pd { |
| 28 | GPIO_PULL_NORMAL = 0, |
| 29 | GPIO_PULL_UP, |
| 30 | GPIO_PULL_DOWN, |
| 31 | GPIO_PULL_REPEAT, |
| 32 | }; |
| 33 | |
| Simon Glass | 8fa4d5a | 2015-08-30 16:55:27 -0600 | [diff] [blame] | 34 | #endif |