Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / f62397ac149b9afdfa7dd9d6b2b7ff390228d201 / . / arch / arm / dts / rk3566-quartz64-a.dts
blob: 25a8c781f4e755fda3b7364ae514359a3cad422d [file] [log] [blame]
Jonas Karlman42785572023-07-30 12:26:42 +0000[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/pinctrl/rockchip.h>
7#include <dt-bindings/soc/rockchip,vop2.h>
8#include "rk3566.dtsi"
9
10/ {
11 model = "Pine64 RK3566 Quartz64-A Board";
12 compatible = "pine64,quartz64-a", "rockchip,rk3566";
13
14 aliases {
15 ethernet0 = &gmac1;
16 mmc0 = &sdmmc0;
17 mmc1 = &sdhci;
18 };
19
20 chosen: chosen {
21 stdout-path = "serial2:1500000n8";
22 };
23
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
27 clock-output-names = "gmac1_clkin";
28 #clock-cells = <0>;
29 };
30
31 fan: gpio_fan {
32 compatible = "gpio-fan";
33 gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
34 gpio-fan,speed-map = <0 0
35 4500 1>;
36 pinctrl-names = "default";
37 pinctrl-0 = <&fan_en_h>;
38 #cooling-cells = <2>;
39 };
40
41 hdmi-con {
42 compatible = "hdmi-connector";
43 type = "a";
44
45 port {
46 hdmi_con_in: endpoint {
47 remote-endpoint = <&hdmi_out_con>;
48 };
49 };
50 };
51
52 leds {
53 compatible = "gpio-leds";
54
55 led-work {
56 label = "work-led";
57 default-state = "off";
58 gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
59 pinctrl-names = "default";
60 pinctrl-0 = <&work_led_enable_h>;
61 retain-state-suspended;
62 };
63
64 led-diy {
65 label = "diy-led";
66 default-state = "on";
67 gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
68 linux,default-trigger = "heartbeat";
69 pinctrl-names = "default";
70 pinctrl-0 = <&diy_led_enable_h>;
71 retain-state-suspended;
72 };
73 };
74
75 rk817-sound {
76 compatible = "simple-audio-card";
77 simple-audio-card,format = "i2s";
78 simple-audio-card,name = "Analog RK817";
79 simple-audio-card,mclk-fs = <256>;
80
81 simple-audio-card,cpu {
82 sound-dai = <&i2s1_8ch>;
83 };
84
85 simple-audio-card,codec {
86 sound-dai = <&rk817>;
87 };
88 };
89
90 sdio_pwrseq: sdio-pwrseq {
91 compatible = "mmc-pwrseq-simple";
92 clocks = <&rk817 1>;
93 clock-names = "ext_clock";
94 pinctrl-names = "default";
95 pinctrl-0 = <&wifi_enable_h>;
96 post-power-on-delay-ms = <100>;
97 power-off-delay-us = <5000000>;
98 reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
99 };
100
101 spdif_dit: spdif-dit {
102 compatible = "linux,spdif-dit";
103 #sound-dai-cells = <0>;
104 };
105
106 spdif_sound: spdif-sound {
107 compatible = "simple-audio-card";
108 simple-audio-card,name = "SPDIF";
109
110 simple-audio-card,cpu {
111 sound-dai = <&spdif>;
112 };
113
114 simple-audio-card,codec {
115 sound-dai = <&spdif_dit>;
116 };
117 };
118
119 vcc12v_dcin: vcc12v_dcin {
120 compatible = "regulator-fixed";
121 regulator-name = "vcc12v_dcin";
122 regulator-always-on;
123 regulator-boot-on;
124 regulator-min-microvolt = <12000000>;
125 regulator-max-microvolt = <12000000>;
126 };
127
128 /* vbus feeds the rk817 usb input.
129 * With no battery attached, also feeds vcc_bat+
130 * via ON/OFF_BAT jumper
131 */
132 vbus: vbus {
133 compatible = "regulator-fixed";
134 regulator-name = "vbus";
135 regulator-always-on;
136 regulator-boot-on;
137 regulator-min-microvolt = <5000000>;
138 regulator-max-microvolt = <5000000>;
139 vin-supply = <&vcc12v_dcin>;
140 };
141
142 vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
143 compatible = "regulator-fixed";
144 enable-active-high;
145 gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
146 pinctrl-names = "default";
147 pinctrl-0 = <&pcie_enable_h>;
148 regulator-name = "vcc3v3_pcie_p";
149 regulator-min-microvolt = <3300000>;
150 regulator-max-microvolt = <3300000>;
151 vin-supply = <&vcc_3v3>;
152 };
153
154 vcc5v0_usb: vcc5v0_usb {
155 compatible = "regulator-fixed";
156 regulator-name = "vcc5v0_usb";
157 regulator-always-on;
158 regulator-boot-on;
159 regulator-min-microvolt = <5000000>;
160 regulator-max-microvolt = <5000000>;
161 vin-supply = <&vcc12v_dcin>;
162 };
163
164 /* all four ports are controlled by one gpio
165 * the host ports are sourced from vcc5v0_usb
166 * the otg port is sourced from vcc5v0_midu
167 */
168 vcc5v0_usb20_host: vcc5v0_usb20_host {
169 compatible = "regulator-fixed";
170 enable-active-high;
171 gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&vcc5v0_usb20_host_en>;
174 regulator-name = "vcc5v0_usb20_host";
175 regulator-min-microvolt = <5000000>;
176 regulator-max-microvolt = <5000000>;
177 vin-supply = <&vcc5v0_usb>;
178 };
179
180 vcc5v0_usb20_otg: vcc5v0_usb20_otg {
181 compatible = "regulator-fixed";
182 enable-active-high;
183 gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
184 regulator-name = "vcc5v0_usb20_otg";
185 regulator-min-microvolt = <5000000>;
186 regulator-max-microvolt = <5000000>;
187 vin-supply = <&dcdc_boost>;
188 };
189
190 vcc3v3_sd: vcc3v3_sd {
191 compatible = "regulator-fixed";
192 gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
193 pinctrl-names = "default";
194 pinctrl-0 = <&vcc_sd_h>;
195 regulator-boot-on;
196 regulator-name = "vcc3v3_sd";
197 regulator-min-microvolt = <3300000>;
198 regulator-max-microvolt = <3300000>;
199 vin-supply = <&vcc_3v3>;
200 };
201
202 /* sourced from vbus and vcc_bat+ via rk817 sw5 */
203 vcc_sys: vcc_sys {
204 compatible = "regulator-fixed";
205 regulator-name = "vcc_sys";
206 regulator-always-on;
207 regulator-boot-on;
208 regulator-min-microvolt = <4400000>;
209 regulator-max-microvolt = <4400000>;
210 vin-supply = <&vbus>;
211 };
212
213 /* sourced from vcc_sys, sdio module operates internally at 3.3v */
214 vcc_wl: vcc_wl {
215 compatible = "regulator-fixed";
216 regulator-name = "vcc_wl";
217 regulator-always-on;
218 regulator-boot-on;
219 regulator-min-microvolt = <3300000>;
220 regulator-max-microvolt = <3300000>;
221 vin-supply = <&vcc_sys>;
222 };
223};
224
225&combphy1 {
226 status = "okay";
227};
228
229&combphy2 {
230 status = "okay";
231};
232
233&cpu0 {
234 cpu-supply = <&vdd_cpu>;
235};
236
237&cpu1 {
238 cpu-supply = <&vdd_cpu>;
239};
240
241&cpu2 {
242 cpu-supply = <&vdd_cpu>;
243};
244
245&cpu3 {
246 cpu-supply = <&vdd_cpu>;
247};
248
249&cpu_thermal {
250 trips {
251 cpu_hot: cpu_hot {
252 temperature = <55000>;
253 hysteresis = <2000>;
254 type = "active";
255 };
256 };
257
258 cooling-maps {
259 map1 {
260 trip = <&cpu_hot>;
261 cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
262 };
263 };
264};
265
266&gmac1 {
267 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
268 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
269 clock_in_out = "input";
270 phy-supply = <&vcc_3v3>;
271 phy-mode = "rgmii";
272 pinctrl-names = "default";
273 pinctrl-0 = <&gmac1m0_miim
274 &gmac1m0_tx_bus2
275 &gmac1m0_rx_bus2
276 &gmac1m0_rgmii_clk
277 &gmac1m0_clkinout
278 &gmac1m0_rgmii_bus>;
279 snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
280 snps,reset-active-low;
281 /* Reset time is 20ms, 100ms for rtl8211f */
282 snps,reset-delays-us = <0 20000 100000>;
283 tx_delay = <0x30>;
284 rx_delay = <0x10>;
285 phy-handle = <&rgmii_phy1>;
286 status = "okay";
287};
288
289&gpu {
290 mali-supply = <&vdd_gpu>;
291 status = "okay";
292};
293
294&hdmi {
295 avdd-0v9-supply = <&vdda_0v9>;
296 avdd-1v8-supply = <&vcc_1v8>;
297 status = "okay";
298};
299
300&hdmi_in {
301 hdmi_in_vp0: endpoint {
302 remote-endpoint = <&vp0_out_hdmi>;
303 };
304};
305
306&hdmi_out {
307 hdmi_out_con: endpoint {
308 remote-endpoint = <&hdmi_con_in>;
309 };
310};
311
312&hdmi_sound {
313 status = "okay";
314};
315
316&i2c0 {
317 status = "okay";
318
319 vdd_cpu: regulator@1c {
320 compatible = "tcs,tcs4525";
321 reg = <0x1c>;
322 fcs,suspend-voltage-selector = <1>;
323 regulator-name = "vdd_cpu";
324 regulator-min-microvolt = <800000>;
325 regulator-max-microvolt = <1150000>;
326 regulator-ramp-delay = <2300>;
327 regulator-always-on;
328 regulator-boot-on;
329 vin-supply = <&vcc_sys>;
330
331 regulator-state-mem {
332 regulator-off-in-suspend;
333 };
334 };
335
336 rk817: pmic@20 {
337 compatible = "rockchip,rk817";
338 reg = <0x20>;
339 interrupt-parent = <&gpio0>;
340 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
341 assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
342 assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
343 clock-names = "mclk";
344 clocks = <&cru I2S1_MCLKOUT_TX>;
345 clock-output-names = "rk808-clkout1", "rk808-clkout2";
346 #clock-cells = <1>;
347 pinctrl-names = "default";
348 pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
349 rockchip,system-power-controller;
350 #sound-dai-cells = <0>;
351 wakeup-source;
352
353 vcc1-supply = <&vcc_sys>;
354 vcc2-supply = <&vcc_sys>;
355 vcc3-supply = <&vcc_sys>;
356 vcc4-supply = <&vcc_sys>;
357 vcc5-supply = <&vcc_sys>;
358 vcc6-supply = <&vcc_sys>;
359 vcc7-supply = <&vcc_sys>;
360 vcc8-supply = <&vcc_sys>;
361 vcc9-supply = <&dcdc_boost>;
362
363 regulators {
364 vdd_logic: DCDC_REG1 {
365 regulator-always-on;
366 regulator-boot-on;
367 regulator-min-microvolt = <500000>;
368 regulator-max-microvolt = <1350000>;
369 regulator-init-microvolt = <900000>;
370 regulator-ramp-delay = <6001>;
371 regulator-initial-mode = <0x2>;
372 regulator-name = "vdd_logic";
373 regulator-state-mem {
374 regulator-on-in-suspend;
375 regulator-suspend-microvolt = <900000>;
376 };
377 };
378
379 vdd_gpu: DCDC_REG2 {
380 regulator-always-on;
381 regulator-boot-on;
382 regulator-min-microvolt = <500000>;
383 regulator-max-microvolt = <1350000>;
384 regulator-init-microvolt = <900000>;
385 regulator-ramp-delay = <6001>;
386 regulator-initial-mode = <0x2>;
387 regulator-name = "vdd_gpu";
388 regulator-state-mem {
389 regulator-off-in-suspend;
390 };
391 };
392
393 vcc_ddr: DCDC_REG3 {
394 regulator-always-on;
395 regulator-boot-on;
396 regulator-initial-mode = <0x2>;
397 regulator-name = "vcc_ddr";
398 regulator-state-mem {
399 regulator-on-in-suspend;
400 };
401 };
402
403 vcc_3v3: DCDC_REG4 {
404 regulator-always-on;
405 regulator-boot-on;
406 regulator-min-microvolt = <3300000>;
407 regulator-max-microvolt = <3300000>;
408 regulator-initial-mode = <0x2>;
409 regulator-name = "vcc_3v3";
410 regulator-state-mem {
411 regulator-off-in-suspend;
412 };
413 };
414
415 vcca1v8_pmu: LDO_REG1 {
416 regulator-always-on;
417 regulator-boot-on;
418 regulator-min-microvolt = <1800000>;
419 regulator-max-microvolt = <1800000>;
420 regulator-name = "vcca1v8_pmu";
421 regulator-state-mem {
422 regulator-on-in-suspend;
423 regulator-suspend-microvolt = <1800000>;
424 };
425 };
426
427 vdda_0v9: LDO_REG2 {
428 regulator-always-on;
429 regulator-boot-on;
430 regulator-min-microvolt = <900000>;
431 regulator-max-microvolt = <900000>;
432 regulator-name = "vdda_0v9";
433 regulator-state-mem {
434 regulator-off-in-suspend;
435 };
436 };
437
438 vdda0v9_pmu: LDO_REG3 {
439 regulator-always-on;
440 regulator-boot-on;
441 regulator-min-microvolt = <900000>;
442 regulator-max-microvolt = <900000>;
443 regulator-name = "vdda0v9_pmu";
444 regulator-state-mem {
445 regulator-on-in-suspend;
446 regulator-suspend-microvolt = <900000>;
447 };
448 };
449
450 vccio_acodec: LDO_REG4 {
451 regulator-always-on;
452 regulator-boot-on;
453 regulator-min-microvolt = <3300000>;
454 regulator-max-microvolt = <3300000>;
455 regulator-name = "vccio_acodec";
456 regulator-state-mem {
457 regulator-off-in-suspend;
458 };
459 };
460
461 vccio_sd: LDO_REG5 {
462 regulator-always-on;
463 regulator-boot-on;
464 regulator-min-microvolt = <1800000>;
465 regulator-max-microvolt = <3300000>;
466 regulator-name = "vccio_sd";
467 regulator-state-mem {
468 regulator-off-in-suspend;
469 };
470 };
471
472 vcc3v3_pmu: LDO_REG6 {
473 regulator-always-on;
474 regulator-boot-on;
475 regulator-min-microvolt = <3300000>;
476 regulator-max-microvolt = <3300000>;
477 regulator-name = "vcc3v3_pmu";
478 regulator-state-mem {
479 regulator-on-in-suspend;
480 regulator-suspend-microvolt = <3300000>;
481 };
482 };
483
484 vcc_1v8: LDO_REG7 {
485 regulator-always-on;
486 regulator-boot-on;
487 regulator-min-microvolt = <1800000>;
488 regulator-max-microvolt = <1800000>;
489 regulator-name = "vcc_1v8";
490 regulator-state-mem {
491 regulator-off-in-suspend;
492 };
493 };
494
495 vcc1v8_dvp: LDO_REG8 {
496 regulator-always-on;
497 regulator-boot-on;
498 regulator-min-microvolt = <1800000>;
499 regulator-max-microvolt = <1800000>;
500 regulator-name = "vcc1v8_dvp";
501 regulator-state-mem {
502 regulator-off-in-suspend;
503 };
504 };
505
506 vcc2v8_dvp: LDO_REG9 {
507 regulator-always-on;
508 regulator-boot-on;
509 regulator-min-microvolt = <2800000>;
510 regulator-max-microvolt = <2800000>;
511 regulator-name = "vcc2v8_dvp";
512 regulator-state-mem {
513 regulator-off-in-suspend;
514 };
515 };
516
517 dcdc_boost: BOOST {
518 regulator-always-on;
519 regulator-boot-on;
520 regulator-min-microvolt = <5000000>;
521 regulator-max-microvolt = <5000000>;
522 regulator-name = "boost";
523 regulator-state-mem {
524 regulator-off-in-suspend;
525 };
526 };
527
528 otg_switch: OTG_SWITCH {
529 regulator-name = "otg_switch";
530 regulator-state-mem {
531 regulator-off-in-suspend;
532 };
533 };
534 };
535 };
536};
537
538/* i2c3 is exposed on con40
539 * pin 3 - i2c3_sda_m0, pullup to vcc_3v3
540 * pin 5 - i2c3_scl_m0, pullup to vcc_3v3
541 */
542&i2c3 {
543 status = "okay";
544};
545
546&i2s0_8ch {
547 status = "okay";
548};
549
550&i2s1_8ch {
551 pinctrl-names = "default";
552 pinctrl-0 = <&i2s1m0_sclktx
553 &i2s1m0_lrcktx
554 &i2s1m0_sdi0
555 &i2s1m0_sdo0>;
556 rockchip,trcm-sync-tx-only;
557 status = "okay";
558};
559
560&mdio1 {
561 rgmii_phy1: ethernet-phy@0 {
562 compatible = "ethernet-phy-ieee802.3-c22";
563 reg = <0>;
564 };
565};
566
567&pcie2x1 {
568 pinctrl-names = "default";
569 pinctrl-0 = <&pcie_reset_h>;
570 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
571 vpcie3v3-supply = <&vcc3v3_pcie_p>;
572 status = "okay";
573};
574
575&pinctrl {
576 bt {
577 bt_enable_h: bt-enable-h {
578 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
579 };
580
581 bt_host_wake_l: bt-host-wake-l {
582 rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
583 };
584
585 bt_wake_l: bt-wake-l {
586 rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
587 };
588 };
589
590 fan {
591 fan_en_h: fan-en-h {
592 rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
593 };
594 };
595
596 leds {
597 work_led_enable_h: work-led-enable-h {
598 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
599 };
600
601 diy_led_enable_h: diy-led-enable-h {
602 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
603 };
604 };
605
606 pcie {
607 pcie_enable_h: pcie-enable-h {
608 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
609 };
610
611 pcie_reset_h: pcie-reset-h {
612 rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
613 };
614 };
615
616 pmic {
617 pmic_int_l: pmic-int-l {
618 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
619 };
620 };
621
622 usb2 {
623 vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
624 rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
625 };
626 };
627
628 sdio-pwrseq {
629 wifi_enable_h: wifi-enable-h {
630 rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
631 };
632 };
633
634 vcc_sd {
635 vcc_sd_h: vcc-sd-h {
636 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
637 };
638 };
639};
640
641&pmu_io_domains {
642 pmuio1-supply = <&vcc3v3_pmu>;
643 pmuio2-supply = <&vcc3v3_pmu>;
644 vccio1-supply = <&vccio_acodec>;
645 vccio2-supply = <&vcc_1v8>;
646 vccio3-supply = <&vccio_sd>;
647 vccio4-supply = <&vcc_1v8>;
648 vccio5-supply = <&vcc_3v3>;
649 vccio6-supply = <&vcc1v8_dvp>;
650 vccio7-supply = <&vcc_3v3>;
651 status = "okay";
652};
653
654&sdhci {
655 bus-width = <8>;
656 mmc-hs200-1_8v;
657 non-removable;
658 vmmc-supply = <&vcc_3v3>;
659 vqmmc-supply = <&vcc_1v8>;
660 status = "okay";
661};
662
663&sdmmc0 {
664 bus-width = <4>;
665 cap-sd-highspeed;
666 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
667 disable-wp;
668 pinctrl-names = "default";
669 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
670 sd-uhs-sdr104;
671 vmmc-supply = <&vcc3v3_sd>;
672 vqmmc-supply = <&vccio_sd>;
673 status = "okay";
674};
675
676&sdmmc1 {
677 bus-width = <4>;
678 cap-sd-highspeed;
679 cap-sdio-irq;
680 keep-power-in-suspend;
681 mmc-pwrseq = <&sdio_pwrseq>;
682 non-removable;
683 pinctrl-names = "default";
684 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
685 sd-uhs-sdr104;
686 vmmc-supply = <&vcc_wl>;
687 vqmmc-supply = <&vcc_1v8>;
688 status = "okay";
689};
690
691&sfc {
692 pinctrl-0 = <&fspi_pins>;
693 pinctrl-names = "default";
694 #address-cells = <1>;
695 #size-cells = <0>;
696 status = "disabled";
697
698 flash@0 {
699 compatible = "jedec,spi-nor";
700 reg = <0>;
701 spi-max-frequency = <24000000>;
702 spi-rx-bus-width = <4>;
703 spi-tx-bus-width = <1>;
704 };
705};
706
707/* spdif is exposed on con40 pin 18 */
708&spdif {
709 status = "okay";
710};
711
712/* spi1 is exposed on con40
713 * pin 11 - spi1_mosi_m1
714 * pin 13 - spi1_miso_m1
715 * pin 15 - spi1_clk_m1
716 * pin 17 - spi1_cs0_m1
717 */
718&spi1 {
719 pinctrl-names = "default";
720 pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
721};
722
723&tsadc {
724 /* tshut mode 0:CRU 1:GPIO */
725 rockchip,hw-tshut-mode = <1>;
726 /* tshut polarity 0:LOW 1:HIGH */
727 rockchip,hw-tshut-polarity = <0>;
728 status = "okay";
729};
730
731/* uart0 is exposed on con40
732 * pin 12 - uart0_tx
733 * pin 14 - uart0_rx
734 */
735&uart0 {
736 pinctrl-names = "default";
737 pinctrl-0 = <&uart0_xfer>;
738 status = "okay";
739};
740
741&uart1 {
742 pinctrl-names = "default";
743 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
744 status = "okay";
745 uart-has-rtscts;
746
747 bluetooth {
748 compatible = "brcm,bcm43438-bt";
749 clocks = <&rk817 1>;
750 clock-names = "lpo";
751 host-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
752 device-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
753 shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
754 pinctrl-names = "default";
755 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
756 vbat-supply = <&vcc_sys>;
757 vddio-supply = <&vcca1v8_pmu>;
758 max-speed = <3000000>;
759 };
760};
761
762/* uart2 is exposed on con40
763 * pin 8 - uart2_tx_m0_debug
764 * pin 10 - uart2_rx_m0_debug
765 */
766&uart2 {
767 status = "okay";
768};
769
770&usb_host0_ehci {
771 status = "okay";
772};
773
774&usb_host0_ohci {
775 status = "okay";
776};
777
778&usb_host1_ehci {
779 status = "okay";
780};
781
782&usb_host1_ohci {
783 status = "okay";
784};
785
786&usb_host0_xhci {
787 dr_mode = "host";
788 status = "okay";
789};
790
791/* usb3 controller is muxed with sata1 */
792&usb_host1_xhci {
793 status = "okay";
794};
795
796&usb2phy0 {
797 status = "okay";
798};
799
800&usb2phy0_host {
801 phy-supply = <&vcc5v0_usb20_host>;
802 status = "okay";
803};
804
805&usb2phy0_otg {
806 phy-supply = <&vcc5v0_usb20_otg>;
807 status = "okay";
808};
809
810&usb2phy1 {
811 status = "okay";
812};
813
814&usb2phy1_host {
815 phy-supply = <&vcc5v0_usb20_host>;
816 status = "okay";
817};
818
819&usb2phy1_otg {
820 phy-supply = <&vcc5v0_usb20_host>;
821 status = "okay";
822};
823
824&vop {
825 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
826 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
827 status = "okay";
828};
829
830&vop_mmu {
831 status = "okay";
832};
833
834&vp0 {
835 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
836 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
837 remote-endpoint = <&hdmi_in_vp0>;
838 };
839};