Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_IMX8M=y |
| 3 | CONFIG_SYS_TEXT_BASE=0x40200000 |
Simon Glass | 035939e | 2021-07-10 21:14:30 -0600 | [diff] [blame] | 4 | CONFIG_SPL_GPIO=y |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 5 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 6 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| 7 | CONFIG_SYS_MALLOC_F_LEN=0x10000 |
| 8 | CONFIG_SYS_MEMTEST_START=0x40000000 |
| 9 | CONFIG_SYS_MEMTEST_END=0x80000000 |
| 10 | CONFIG_ENV_SIZE=0x8000 |
| 11 | CONFIG_ENV_OFFSET=0xff0000 |
Tom Rini | e065fb1 | 2021-08-28 21:34:49 -0400 | [diff] [blame] | 12 | CONFIG_SYS_I2C_MXC_I2C1=y |
| 13 | CONFIG_SYS_I2C_MXC_I2C2=y |
| 14 | CONFIG_SYS_I2C_MXC_I2C3=y |
| 15 | CONFIG_SYS_MALLOC_LEN=0x2000000 |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 16 | CONFIG_DM_GPIO=y |
Tom Rini | a20e51f | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 17 | CONFIG_DEFAULT_DEVICE_TREE="imx8mm-venice" |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 18 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
| 19 | CONFIG_TARGET_IMX8MM_VENICE=y |
Simon Glass | b58bfe0 | 2021-08-08 12:20:09 -0600 | [diff] [blame] | 20 | CONFIG_SPL_MMC=y |
Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame^] | 21 | CONFIG_SPL_SERIAL=y |
Simon Glass | 284cb9c | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 22 | CONFIG_SPL_DRIVERS_MISC=y |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 23 | CONFIG_SPL=y |
| 24 | CONFIG_ENV_OFFSET_REDUND=0xff8000 |
Tom Rini | 7ce6b42 | 2021-05-25 11:58:50 -0400 | [diff] [blame] | 25 | CONFIG_LTO=y |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 26 | CONFIG_DISTRO_DEFAULTS=y |
Tom Rini | 0997ee0 | 2021-08-23 10:25:31 -0400 | [diff] [blame] | 27 | CONFIG_SYS_LOAD_ADDR=0x40480000 |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 28 | CONFIG_FIT=y |
| 29 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
| 30 | CONFIG_SPL_LOAD_FIT=y |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 31 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" |
Tim Harvey | 60c1bfd | 2021-07-27 15:19:40 -0700 | [diff] [blame] | 32 | CONFIG_OF_BOARD_SETUP=y |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 33 | CONFIG_OF_SYSTEM_SETUP=y |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 34 | # CONFIG_USE_BOOTCOMMAND is not set |
| 35 | CONFIG_USE_PREBOOT=y |
| 36 | CONFIG_PREBOOT="gsc wd-disable" |
| 37 | CONFIG_BOARD_LATE_INIT=y |
| 38 | CONFIG_SPL_SEPARATE_BSS=y |
Simon Glass | bccfc2e | 2021-07-10 21:14:36 -0600 | [diff] [blame] | 39 | CONFIG_SPL_I2C=y |
Simon Glass | e91ac4c | 2021-07-10 21:14:24 -0600 | [diff] [blame] | 40 | CONFIG_SPL_POWER=y |
Simon Glass | 1ba1d4e | 2021-07-10 21:14:28 -0600 | [diff] [blame] | 41 | CONFIG_SPL_WATCHDOG=y |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 42 | CONFIG_SYS_PROMPT="u-boot=> " |
| 43 | # CONFIG_CMD_EXPORTENV is not set |
| 44 | # CONFIG_CMD_IMPORTENV is not set |
| 45 | # CONFIG_CMD_CRC32 is not set |
| 46 | CONFIG_CMD_MEMTEST=y |
| 47 | CONFIG_CMD_CLK=y |
| 48 | CONFIG_CMD_FUSE=y |
| 49 | CONFIG_CMD_GPIO=y |
| 50 | CONFIG_CMD_I2C=y |
| 51 | CONFIG_CMD_MMC=y |
| 52 | CONFIG_CMD_CACHE=y |
| 53 | CONFIG_CMD_TIME=y |
| 54 | CONFIG_CMD_UUID=y |
| 55 | CONFIG_CMD_PMIC=y |
| 56 | CONFIG_CMD_REGULATOR=y |
| 57 | CONFIG_CMD_EXT4_WRITE=y |
| 58 | # CONFIG_ISO_PARTITION is not set |
| 59 | # CONFIG_SPL_EFI_PARTITION is not set |
| 60 | CONFIG_OF_CONTROL=y |
| 61 | CONFIG_SPL_OF_CONTROL=y |
Tim Harvey | 6603b5e | 2021-07-27 15:19:41 -0700 | [diff] [blame] | 62 | CONFIG_OF_LIST="imx8mm-venice-gw71xx-0x imx8mm-venice-gw72xx-0x imx8mm-venice-gw73xx-0x imx8mm-venice-gw7901 imx8mm-venice-gw7902" |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 63 | CONFIG_ENV_IS_IN_MMC=y |
| 64 | CONFIG_SYS_REDUNDAND_ENVIRONMENT=y |
| 65 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
| 66 | CONFIG_NET_RANDOM_ETHADDR=y |
| 67 | CONFIG_IP_DEFRAG=y |
| 68 | CONFIG_TFTP_BLOCKSIZE=4096 |
| 69 | CONFIG_SPL_DM=y |
| 70 | CONFIG_SPL_CLK_COMPOSITE_CCF=y |
| 71 | CONFIG_CLK_COMPOSITE_CCF=y |
| 72 | CONFIG_SPL_CLK_IMX8MM=y |
| 73 | CONFIG_CLK_IMX8MM=y |
| 74 | CONFIG_MXC_GPIO=y |
| 75 | CONFIG_DM_I2C=y |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 76 | CONFIG_LED=y |
| 77 | CONFIG_LED_BLINK=y |
| 78 | CONFIG_LED_GPIO=y |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 79 | CONFIG_SUPPORT_EMMC_BOOT=y |
| 80 | CONFIG_MMC_IO_VOLTAGE=y |
| 81 | CONFIG_SPL_MMC_IO_VOLTAGE=y |
| 82 | CONFIG_MMC_UHS_SUPPORT=y |
| 83 | CONFIG_SPL_MMC_UHS_SUPPORT=y |
| 84 | CONFIG_MMC_HS400_ES_SUPPORT=y |
| 85 | CONFIG_MMC_HS400_SUPPORT=y |
| 86 | CONFIG_SPL_MMC_HS400_SUPPORT=y |
| 87 | CONFIG_FSL_USDHC=y |
| 88 | CONFIG_PHYLIB=y |
| 89 | CONFIG_PHY_TI_DP83867=y |
Tim Harvey | d86dff4 | 2021-06-30 16:50:10 -0700 | [diff] [blame] | 90 | CONFIG_PHY_FIXED=y |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 91 | CONFIG_DM_ETH=y |
Tim Harvey | d86dff4 | 2021-06-30 16:50:10 -0700 | [diff] [blame] | 92 | CONFIG_DM_MDIO=y |
| 93 | CONFIG_DM_DSA=y |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 94 | CONFIG_PHY_GIGE=y |
| 95 | CONFIG_FEC_MXC=y |
Tim Harvey | d86dff4 | 2021-06-30 16:50:10 -0700 | [diff] [blame] | 96 | CONFIG_KSZ9477=y |
Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 97 | CONFIG_MII=y |
| 98 | CONFIG_PINCTRL=y |
| 99 | CONFIG_SPL_PINCTRL=y |
| 100 | CONFIG_PINCTRL_IMX8M=y |
| 101 | CONFIG_DM_PMIC=y |
| 102 | CONFIG_DM_PMIC_BD71837=y |
| 103 | CONFIG_SPL_DM_PMIC_BD71837=y |
| 104 | CONFIG_DM_PMIC_MP5416=y |
| 105 | CONFIG_SPL_DM_PMIC_MP5416=y |
| 106 | CONFIG_DM_REGULATOR=y |
| 107 | CONFIG_DM_REGULATOR_FIXED=y |
| 108 | CONFIG_DM_REGULATOR_GPIO=y |
| 109 | CONFIG_MXC_UART=y |
| 110 | CONFIG_SYSRESET=y |
| 111 | CONFIG_SPL_SYSRESET=y |
| 112 | CONFIG_SYSRESET_PSCI=y |
| 113 | CONFIG_SYSRESET_WATCHDOG=y |
| 114 | CONFIG_DM_THERMAL=y |
| 115 | CONFIG_IMX_TMU=y |
| 116 | CONFIG_IMX_WATCHDOG=y |
| 117 | CONFIG_HEXDUMP=y |