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git01.mediatek.com / filogic / uboot / 68d77afe0de9917942b2880ff5966a7c74285540 / . / arch / arm / dts / imx8mm-u-boot.dtsi
blob: 06f2f73a03f3236aa5acf260a72643d149ed5a24 [file] [log] [blame]
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2020 Jagan Teki <jagan@amarulasolutions.com>
4 */
5
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]6/ {
7 binman: binman {
8 multiple-images;
9 };
Tim Harveyb34f5a12023-08-24 12:01:42 -0700[diff] [blame]10
11#ifdef CONFIG_OPTEE
12 firmware {
13 optee {
14 compatible = "linaro,optee-tz";
15 method = "smc";
16 };
17 };
18#endif
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]19};
20
Tim Harvey0951b9a2023-08-24 12:03:56 -0700[diff] [blame]21#ifdef CONFIG_FSL_CAAM
22&crypto {
23 bootph-pre-ram;
24};
25#endif
26
Marcel Ziswiler6dd051a2022-11-07 22:22:41 +0100[diff] [blame]27&soc {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]28 bootph-all;
29 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]30};
31
32&aips1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]33 bootph-all;
34 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]35};
36
37&aips2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]38 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]39};
40
41&aips3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]42 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]43};
44
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]45&binman {
46 u-boot-spl-ddr {
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]47 align = <4>;
48 align-size = <4>;
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]49 filename = "u-boot-spl-ddr.bin";
50 pad-byte = <0xff>;
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]51
52 u-boot-spl {
53 align-end = <4>;
Marcel Ziswiler74d5d4f2021-10-23 01:15:15 +0200[diff] [blame]54 filename = "u-boot-spl.bin";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]55 };
56
Peng Fan5db610f42022-07-26 16:41:20 +0800[diff] [blame]57 ddr-1d-imem-fw {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]58 filename = "lpddr4_pmu_train_1d_imem.bin";
Peng Fan68811572022-07-26 16:41:22 +0800[diff] [blame]59 align-end = <4>;
Marcel Ziswiler3c2534a2021-10-23 01:15:16 +0200[diff] [blame]60 type = "blob-ext";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]61 };
62
Peng Fan5db610f42022-07-26 16:41:20 +0800[diff] [blame]63 ddr-1d-dmem-fw {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]64 filename = "lpddr4_pmu_train_1d_dmem.bin";
Peng Fan68811572022-07-26 16:41:22 +0800[diff] [blame]65 align-end = <4>;
Marcel Ziswiler3c2534a2021-10-23 01:15:16 +0200[diff] [blame]66 type = "blob-ext";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]67 };
68
Peng Fan5db610f42022-07-26 16:41:20 +0800[diff] [blame]69 ddr-2d-imem-fw {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]70 filename = "lpddr4_pmu_train_2d_imem.bin";
Peng Fan68811572022-07-26 16:41:22 +0800[diff] [blame]71 align-end = <4>;
Marcel Ziswiler3c2534a2021-10-23 01:15:16 +0200[diff] [blame]72 type = "blob-ext";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]73 };
74
Peng Fan5db610f42022-07-26 16:41:20 +0800[diff] [blame]75 ddr-2d-dmem-fw {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]76 filename = "lpddr4_pmu_train_2d_dmem.bin";
Peng Fan68811572022-07-26 16:41:22 +0800[diff] [blame]77 align-end = <4>;
Marcel Ziswiler3c2534a2021-10-23 01:15:16 +0200[diff] [blame]78 type = "blob-ext";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]79 };
80 };
81
82 spl {
83 filename = "spl.bin";
84
85 mkimage {
86 args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000";
87
88 blob {
89 filename = "u-boot-spl-ddr.bin";
90 };
91 };
92 };
93
94 itb {
95 filename = "u-boot.itb";
96
97 fit {
98 description = "Configuration to load ATF before U-Boot";
Marek Vasuta7416eb2023-05-28 23:00:30 +0200[diff] [blame]99#ifndef CONFIG_IMX_HAB
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]100 fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
Marek Vasuta7416eb2023-05-28 23:00:30 +0200[diff] [blame]101#endif
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]102 fit,fdt-list = "of-list";
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]103 #address-cells = <1>;
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]104
105 images {
106 uboot {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]107 arch = "arm64";
108 compression = "none";
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]109 description = "U-Boot (64-bit)";
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]110 load = <CONFIG_TEXT_BASE>;
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]111 type = "standalone";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]112
Patrick Wildta6ca6912022-01-13 15:22:17 +0100[diff] [blame]113 uboot-blob {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]114 filename = "u-boot-nodtb.bin";
Marcel Ziswiler3c2534a2021-10-23 01:15:16 +0200[diff] [blame]115 type = "blob-ext";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]116 };
117 };
118
Marek Vasut1de0eb12022-12-22 01:46:37 +0100[diff] [blame]119#ifndef CONFIG_ARMV8_PSCI
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]120 atf {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]121 arch = "arm64";
122 compression = "none";
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]123 description = "ARM Trusted Firmware";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]124 entry = <0x920000>;
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]125 load = <0x920000>;
126 type = "firmware";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]127
Patrick Wildta6ca6912022-01-13 15:22:17 +0100[diff] [blame]128 atf-blob {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]129 filename = "bl31.bin";
Marcel Ziswilerd87d2f12022-04-08 10:06:56 +0200[diff] [blame]130 type = "atf-bl31";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]131 };
132 };
Marek Vasut1de0eb12022-12-22 01:46:37 +0100[diff] [blame]133#endif
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]134
135 binman_fip: fip {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]136 arch = "arm64";
137 compression = "none";
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]138 description = "Trusted Firmware FIP";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]139 load = <0x40310000>;
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]140 type = "firmware";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]141 };
142
143 @fdt-SEQ {
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]144 compression = "none";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]145 description = "NAME";
146 type = "flat_dt";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]147
Patrick Wildta6ca6912022-01-13 15:22:17 +0100[diff] [blame]148 uboot-fdt-blob {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]149 filename = "u-boot.dtb";
Marcel Ziswiler3c2534a2021-10-23 01:15:16 +0200[diff] [blame]150 type = "blob-ext";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]151 };
152 };
153 };
154
155 configurations {
156 default = "@config-DEFAULT-SEQ";
157
Simon Glassceea7842023-08-23 19:18:01 -0600[diff] [blame]158 @config-SEQ {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]159 description = "NAME";
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]160 fdt = "fdt-SEQ";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]161 firmware = "uboot";
Marek Vasut1de0eb12022-12-22 01:46:37 +0100[diff] [blame]162#ifndef CONFIG_ARMV8_PSCI
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]163 loadables = "atf";
Marek Vasut1de0eb12022-12-22 01:46:37 +0100[diff] [blame]164#endif
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]165 };
166 };
167 };
168 };
169
170 imx-boot {
171 filename = "flash.bin";
172 pad-byte = <0x00>;
173
Mamta Shuklacd76f3a2022-07-12 14:36:18 +0000[diff] [blame]174#ifdef CONFIG_FSPI_CONF_HEADER
175 fspi_conf_block {
176 filename = CONFIG_FSPI_CONF_FILE;
177 type = "blob-ext";
178 size = <0x1000>;
179 };
180
181 spl {
182 filename = "spl.bin";
183 offset = <0x1000>;
184 type = "blob-ext";
185 };
186
187 binman_uboot: uboot {
188 filename = "u-boot.itb";
189 offset = <0x58C00>;
190 type = "blob-ext";
191 };
192#else
Marcel Ziswiler3c2534a2021-10-23 01:15:16 +0200[diff] [blame]193 spl {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]194 filename = "spl.bin";
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]195 offset = <0x0>;
Marcel Ziswiler3c2534a2021-10-23 01:15:16 +0200[diff] [blame]196 type = "blob-ext";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]197 };
198
Marcel Ziswiler3c2534a2021-10-23 01:15:16 +0200[diff] [blame]199 binman_uboot: uboot {
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]200 filename = "u-boot.itb";
Marcel Ziswiler0e2d37e2021-10-23 01:15:14 +0200[diff] [blame]201 offset = <0x57c00>;
Marcel Ziswiler3c2534a2021-10-23 01:15:16 +0200[diff] [blame]202 type = "blob-ext";
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]203 };
Mamta Shuklacd76f3a2022-07-12 14:36:18 +0000[diff] [blame]204#endif
Marcel Ziswilerd56d1172021-10-23 01:15:13 +0200[diff] [blame]205 };
206};
207
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]208&clk {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]209 bootph-all;
210 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]211 /delete-property/ assigned-clocks;
212 /delete-property/ assigned-clock-parents;
213 /delete-property/ assigned-clock-rates;
214};
215
216&iomuxc {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]217 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]218};
219
220&osc_24m {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]221 bootph-all;
222 bootph-pre-ram;
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]223};
Marcel Ziswilerca453f22022-07-21 15:27:40 +0200[diff] [blame]224
Tim Harvey0951b9a2023-08-24 12:03:56 -0700[diff] [blame]225#ifdef CONFIG_FSL_CAAM
226&sec_jr0 {
227 bootph-pre-ram;
228};
229
230&sec_jr1 {
231 bootph-pre-ram;
232};
233
234&sec_jr2 {
235 bootph-pre-ram;
236};
237#endif
238
Marcel Ziswilerca453f22022-07-21 15:27:40 +0200[diff] [blame]239&spba1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]240 bootph-all;
241 bootph-pre-ram;
Marcel Ziswilerca453f22022-07-21 15:27:40 +0200[diff] [blame]242};
243
244&spba2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]245 bootph-all;
246 bootph-pre-ram;
Marcel Ziswilerca453f22022-07-21 15:27:40 +0200[diff] [blame]247};