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wdenk5b1d7132002-11-03 00:07:02 +00001/*
2 * (C) Copyright 2000 - 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
20
21#ifndef __U_BOOT_H__
22#define __U_BOOT_H__
23
24/*
25 * Board information passed to Linux kernel from U-Boot
26 *
27 * include/asm-ppc/u-boot.h
28 */
29
30#ifndef __ASSEMBLY__
31#include <linux/types.h>
32
33typedef struct bd_info {
34 unsigned long bi_memstart; /* start of DRAM memory */
35 unsigned long bi_memsize; /* size of DRAM memory in bytes */
36 unsigned long bi_flashstart; /* start of FLASH memory */
37 unsigned long bi_flashsize; /* size of FLASH memory */
38 unsigned long bi_flashoffset; /* reserved area for startup monitor */
39 unsigned long bi_sramstart; /* start of SRAM memory */
40 unsigned long bi_sramsize; /* size of SRAM memory */
wdenk9c53f402003-10-15 23:53:47 +000041#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \
42 || defined(CONFIG_E500)
wdenk5b1d7132002-11-03 00:07:02 +000043 unsigned long bi_immr_base; /* base of IMMR register */
44#endif
wdenkbe9c1cb2004-02-24 02:00:03 +000045#if defined(CONFIG_MPC5xxx)
wdenk21136db2003-07-16 21:53:01 +000046 unsigned long bi_mbar_base; /* base of internal registers */
47#endif
Eran Liberty9095d4a2005-07-28 10:08:46 -050048#if defined(CONFIG_MPC83XX)
49 unsigned long bi_immrbar;
50#endif
wdenk337f5652004-10-28 00:09:35 +000051#if defined(CONFIG_MPC8220)
52 unsigned long bi_mbar_base; /* base of internal registers */
53 unsigned long bi_inpfreq; /* Input Freq, In MHz */
54 unsigned long bi_pcifreq; /* PCI Freq, in MHz */
55 unsigned long bi_pevfreq; /* PEV Freq, in MHz */
56 unsigned long bi_flbfreq; /* Flexbus Freq, in MHz */
57 unsigned long bi_vcofreq; /* VCO Freq, in MHz */
58#endif
wdenk5b1d7132002-11-03 00:07:02 +000059 unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */
60 unsigned long bi_ip_addr; /* IP Address */
61 unsigned char bi_enetaddr[6]; /* Ethernet adress */
62 unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
63 unsigned long bi_intfreq; /* Internal Freq, in MHz */
64 unsigned long bi_busfreq; /* Bus Freq, in MHz */
Jon Loeligerf5ad3782005-07-23 10:37:35 -050065#if defined(CONFIG_CPM2)
wdenk5b1d7132002-11-03 00:07:02 +000066 unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
67 unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
68 unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
69 unsigned long bi_vco; /* VCO Out from PLL, in MHz */
70#endif
wdenkbe9c1cb2004-02-24 02:00:03 +000071#if defined(CONFIG_MPC5xxx)
wdenk21136db2003-07-16 21:53:01 +000072 unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
73 unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
74#endif
wdenk5b1d7132002-11-03 00:07:02 +000075 unsigned long bi_baudrate; /* Console Baudrate */
wdenk232fe0b2003-09-02 22:48:03 +000076#if defined(CONFIG_405) || \
77 defined(CONFIG_405GP) || \
wdenk5b1d7132002-11-03 00:07:02 +000078 defined(CONFIG_405CR) || \
wdenk232fe0b2003-09-02 22:48:03 +000079 defined(CONFIG_405EP) || \
80 defined(CONFIG_440)
wdenk5b1d7132002-11-03 00:07:02 +000081 unsigned char bi_s_version[4]; /* Version of this structure */
Wolfgang Denk0ee70772005-09-23 11:05:55 +020082 unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */
wdenk5b1d7132002-11-03 00:07:02 +000083 unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
84 unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
85 unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
86 unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
87#endif
88#if defined(CONFIG_HYMOD)
89 hymod_conf_t bi_hymod_conf; /* hymod configuration information */
90#endif
wdenk0aeb8532004-10-10 21:21:55 +000091
wdenk54070ab2004-12-31 09:32:47 +000092#ifdef CONFIG_HAS_ETH1
wdenk5b1d7132002-11-03 00:07:02 +000093 /* second onboard ethernet port */
94 unsigned char bi_enet1addr[6];
95#endif
wdenk54070ab2004-12-31 09:32:47 +000096#ifdef CONFIG_HAS_ETH2
wdenk5b1d7132002-11-03 00:07:02 +000097 /* third onboard ethernet port */
98 unsigned char bi_enet2addr[6];
99#endif
wdenk54070ab2004-12-31 09:32:47 +0000100#ifdef CONFIG_HAS_ETH3
wdenk544e9732004-02-06 23:19:44 +0000101 unsigned char bi_enet3addr[6];
102#endif
wdenk0aeb8532004-10-10 21:21:55 +0000103
Stefan Roeseb30f2a12005-08-08 12:42:22 +0200104#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined (CONFIG_440GX) || \
105 defined(CONFIG_440EP) || defined(CONFIG_440GR)
wdenkc6abb7e2003-11-17 21:14:37 +0000106 unsigned int bi_opbfreq; /* OPB clock in Hz */
107 int bi_iic_fast[2]; /* Use fast i2c mode */
108#endif
wdenk5b1d7132002-11-03 00:07:02 +0000109#if defined(CONFIG_NX823)
110 unsigned char bi_sernum[8];
111#endif
Stefan Roese0c7ffc02005-08-16 18:18:00 +0200112#if defined(CONFIG_4xx)
Stefan Roeseb30f2a12005-08-08 12:42:22 +0200113#if defined(CONFIG_440GX)
wdenk56ed43e2004-02-22 23:46:08 +0000114 int bi_phynum[4]; /* Determines phy mapping */
115 int bi_phymode[4]; /* Determines phy mode */
Stefan Roese0c7ffc02005-08-16 18:18:00 +0200116#elif defined(CONFIG_405EP) || defined(CONFIG_440)
117 int bi_phynum[2]; /* Determines phy mapping */
118 int bi_phymode[2]; /* Determines phy mode */
119#else
120 int bi_phynum[1]; /* Determines phy mapping */
121 int bi_phymode[1]; /* Determines phy mode */
wdenk56ed43e2004-02-22 23:46:08 +0000122#endif
Stefan Roese0c7ffc02005-08-16 18:18:00 +0200123#endif /* defined(CONFIG_4xx) */
wdenk5b1d7132002-11-03 00:07:02 +0000124} bd_t;
125
126#endif /* __ASSEMBLY__ */
127#endif /* __U_BOOT_H__ */