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git01.mediatek.com / filogic / uboot / f390a212f44304786d3008734dcae8a3381e4ca3 / . / arch / arm / dts / zynqmp-zcu106-revA.dts
blob: 18a403288f9d54d82b5824effa078d1efe1b2f58 [file] [log] [blame]
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * dts file for Xilinx ZynqMP ZCU106
4 *
5 * (C) Copyright 2016, Xilinx, Inc.
6 *
7 * Michal Simek <michal.simek@xilinx.com>
8 */
9
10/dts-v1/;
11
12#include "zynqmp.dtsi"
13#include "zynqmp-clk-ccf.dtsi"
14#include <dt-bindings/input/input.h>
15#include <dt-bindings/gpio/gpio.h>
16#include <dt-bindings/phy/phy.h>
17
18/ {
19 model = "ZynqMP ZCU106 RevA";
20 compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp";
21
22 aliases {
23 ethernet0 = &gem3;
24 gpio0 = &gpio;
25 i2c0 = &i2c0;
26 i2c1 = &i2c1;
27 mmc0 = &sdhci1;
28 rtc0 = &rtc;
29 serial0 = &uart0;
30 serial1 = &uart1;
31 serial2 = &dcc;
32 spi0 = &qspi;
33 usb0 = &usb0;
34 };
35
36 chosen {
37 bootargs = "earlycon";
38 stdout-path = "serial0:115200n8";
Michal Simek53b97e62019-01-18 09:10:39 +0100[diff] [blame]39 xlnx,eeprom = &eeprom;
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]40 };
41
42 memory@0 {
43 device_type = "memory";
44 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
45 };
46
47 gpio-keys {
48 compatible = "gpio-keys";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]49 autorepeat;
50 sw19 {
51 label = "sw19";
52 gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
53 linux,code = <KEY_DOWN>;
54 gpio-key,wakeup;
55 autorepeat;
56 };
57 };
58
59 leds {
60 compatible = "gpio-leds";
61 heartbeat_led {
62 label = "heartbeat";
63 gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
64 linux,default-trigger = "heartbeat";
65 };
66 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]67
68 ina226-u76 {
69 compatible = "iio-hwmon";
70 io-channels = <&u76 0>, <&u76 1>, <&u76 2>, <&u76 3>;
71 };
72 ina226-u77 {
73 compatible = "iio-hwmon";
74 io-channels = <&u77 0>, <&u77 1>, <&u77 2>, <&u77 3>;
75 };
76 ina226-u78 {
77 compatible = "iio-hwmon";
78 io-channels = <&u78 0>, <&u78 1>, <&u78 2>, <&u78 3>;
79 };
80 ina226-u87 {
81 compatible = "iio-hwmon";
82 io-channels = <&u87 0>, <&u87 1>, <&u87 2>, <&u87 3>;
83 };
84 ina226-u85 {
85 compatible = "iio-hwmon";
86 io-channels = <&u85 0>, <&u85 1>, <&u85 2>, <&u85 3>;
87 };
88 ina226-u86 {
89 compatible = "iio-hwmon";
90 io-channels = <&u86 0>, <&u86 1>, <&u86 2>, <&u86 3>;
91 };
92 ina226-u93 {
93 compatible = "iio-hwmon";
94 io-channels = <&u93 0>, <&u93 1>, <&u93 2>, <&u93 3>;
95 };
96 ina226-u88 {
97 compatible = "iio-hwmon";
98 io-channels = <&u88 0>, <&u88 1>, <&u88 2>, <&u88 3>;
99 };
100 ina226-u15 {
101 compatible = "iio-hwmon";
102 io-channels = <&u15 0>, <&u15 1>, <&u15 2>, <&u15 3>;
103 };
104 ina226-u92 {
105 compatible = "iio-hwmon";
106 io-channels = <&u92 0>, <&u92 1>, <&u92 2>, <&u92 3>;
107 };
108 ina226-u79 {
109 compatible = "iio-hwmon";
110 io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>;
111 };
112 ina226-u81 {
113 compatible = "iio-hwmon";
114 io-channels = <&u81 0>, <&u81 1>, <&u81 2>, <&u81 3>;
115 };
116 ina226-u80 {
117 compatible = "iio-hwmon";
118 io-channels = <&u80 0>, <&u80 1>, <&u80 2>, <&u80 3>;
119 };
120 ina226-u84 {
121 compatible = "iio-hwmon";
122 io-channels = <&u84 0>, <&u84 1>, <&u84 2>, <&u84 3>;
123 };
124 ina226-u16 {
125 compatible = "iio-hwmon";
126 io-channels = <&u16 0>, <&u16 1>, <&u16 2>, <&u16 3>;
127 };
128 ina226-u65 {
129 compatible = "iio-hwmon";
130 io-channels = <&u65 0>, <&u65 1>, <&u65 2>, <&u65 3>;
131 };
132 ina226-u74 {
133 compatible = "iio-hwmon";
134 io-channels = <&u74 0>, <&u74 1>, <&u74 2>, <&u74 3>;
135 };
136 ina226-u75 {
137 compatible = "iio-hwmon";
138 io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
139 };
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]140};
141
142&can1 {
143 status = "okay";
144};
145
146&dcc {
147 status = "okay";
148};
149
150&fpd_dma_chan1 {
151 status = "okay";
152};
153
154&fpd_dma_chan2 {
155 status = "okay";
156};
157
158&fpd_dma_chan3 {
159 status = "okay";
160};
161
162&fpd_dma_chan4 {
163 status = "okay";
164};
165
166&fpd_dma_chan5 {
167 status = "okay";
168};
169
170&fpd_dma_chan6 {
171 status = "okay";
172};
173
174&fpd_dma_chan7 {
175 status = "okay";
176};
177
178&fpd_dma_chan8 {
179 status = "okay";
180};
181
182&gem3 {
183 status = "okay";
184 phy-handle = <&phy0>;
185 phy-mode = "rgmii-id";
Michal Simek393decf2019-08-08 12:44:22 +0200[diff] [blame]186 phy0: ethernet-phy@c {
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]187 reg = <0xc>;
188 ti,rx-internal-delay = <0x8>;
189 ti,tx-internal-delay = <0xa>;
190 ti,fifo-depth = <0x1>;
191 };
192};
193
194&gpio {
195 status = "okay";
196};
197
198&gpu {
199 status = "okay";
200};
201
202&i2c0 {
203 status = "okay";
204 clock-frequency = <400000>;
205
206 tca6416_u97: gpio@20 {
207 compatible = "ti,tca6416";
208 reg = <0x20>;
209 gpio-controller; /* interrupt not connected */
210 #gpio-cells = <2>;
211 /*
212 * IRQ not connected
213 * Lines:
214 * 0 - SFP_SI5328_INT_ALM
215 * 1 - HDMI_SI5328_INT_ALM
216 * 5 - IIC_MUX_RESET_B
217 * 6 - GEM3_EXP_RESET_B
218 * 10 - FMC_HPC0_PRSNT_M2C_B
219 * 11 - FMC_HPC1_PRSNT_M2C_B
220 * 2-4, 7, 12-17 - not connected
221 */
222 };
223
224 tca6416_u61: gpio@21 {
225 compatible = "ti,tca6416";
226 reg = <0x21>;
227 gpio-controller;
228 #gpio-cells = <2>;
229 /*
230 * IRQ not connected
231 * Lines:
232 * 0 - VCCPSPLL_EN
233 * 1 - MGTRAVCC_EN
234 * 2 - MGTRAVTT_EN
235 * 3 - VCCPSDDRPLL_EN
236 * 4 - MIO26_PMU_INPUT_LS
237 * 5 - PL_PMBUS_ALERT
238 * 6 - PS_PMBUS_ALERT
239 * 7 - MAXIM_PMBUS_ALERT
240 * 10 - PL_DDR4_VTERM_EN
241 * 11 - PL_DDR4_VPP_2V5_EN
242 * 12 - PS_DIMM_VDDQ_TO_PSVCCO_ON
243 * 13 - PS_DIMM_SUSPEND_EN
244 * 14 - PS_DDR4_VTERM_EN
245 * 15 - PS_DDR4_VPP_2V5_EN
246 * 16 - 17 - not connected
247 */
248 };
249
250 i2c-mux@75 { /* u60 */
251 compatible = "nxp,pca9544";
252 #address-cells = <1>;
253 #size-cells = <0>;
254 reg = <0x75>;
255 i2c@0 {
256 #address-cells = <1>;
257 #size-cells = <0>;
258 reg = <0>;
259 /* PS_PMBUS */
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]260 u76: ina226@40 { /* u76 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]261 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]262 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]263 label = "ina226-u76";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]264 reg = <0x40>;
265 shunt-resistor = <5000>;
266 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]267 u77: ina226@41 { /* u77 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]268 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]269 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]270 label = "ina226-u77";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]271 reg = <0x41>;
272 shunt-resistor = <5000>;
273 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]274 u78: ina226@42 { /* u78 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]275 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]276 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]277 label = "ina226-u78";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]278 reg = <0x42>;
279 shunt-resistor = <5000>;
280 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]281 u87: ina226@43 { /* u87 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]282 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]283 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]284 label = "ina226-u87";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]285 reg = <0x43>;
286 shunt-resistor = <5000>;
287 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]288 u85: ina226@44 { /* u85 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]289 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]290 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]291 label = "ina226-u85";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]292 reg = <0x44>;
293 shunt-resistor = <5000>;
294 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]295 u86: ina226@45 { /* u86 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]296 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]297 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]298 label = "ina226-u86";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]299 reg = <0x45>;
300 shunt-resistor = <5000>;
301 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]302 u93: ina226@46 { /* u93 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]303 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]304 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]305 label = "ina226-u93";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]306 reg = <0x46>;
307 shunt-resistor = <5000>;
308 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]309 u88: ina226@47 { /* u88 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]310 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]311 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]312 label = "ina226-u88";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]313 reg = <0x47>;
314 shunt-resistor = <5000>;
315 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]316 u15: ina226@4a { /* u15 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]317 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]318 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]319 label = "ina226-u15";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]320 reg = <0x4a>;
321 shunt-resistor = <5000>;
322 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]323 u92: ina226@4b { /* u92 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]324 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]325 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]326 label = "ina226-u92";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]327 reg = <0x4b>;
328 shunt-resistor = <5000>;
329 };
330 };
331 i2c@1 {
332 #address-cells = <1>;
333 #size-cells = <0>;
334 reg = <1>;
335 /* PL_PMBUS */
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]336 u79: ina226@40 { /* u79 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]337 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]338 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]339 label = "ina226-u79";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]340 reg = <0x40>;
341 shunt-resistor = <2000>;
342 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]343 u81: ina226@41 { /* u81 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]344 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]345 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]346 label = "ina226-u81";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]347 reg = <0x41>;
348 shunt-resistor = <5000>;
349 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]350 u80: ina226@42 { /* u80 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]351 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]352 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]353 label = "ina226-u80";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]354 reg = <0x42>;
355 shunt-resistor = <5000>;
356 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]357 u84: ina226@43 { /* u84 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]358 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]359 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]360 label = "ina226-u84";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]361 reg = <0x43>;
362 shunt-resistor = <5000>;
363 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]364 u16: ina226@44 { /* u16 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]365 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]366 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]367 label = "ina226-u16";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]368 reg = <0x44>;
369 shunt-resistor = <5000>;
370 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]371 u65: ina226@45 { /* u65 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]372 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]373 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]374 label = "ina226-u65";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]375 reg = <0x45>;
376 shunt-resistor = <5000>;
377 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]378 u74: ina226@46 { /* u74 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]379 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]380 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]381 label = "ina226-u74";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]382 reg = <0x46>;
383 shunt-resistor = <5000>;
384 };
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]385 u75: ina226@47 { /* u75 */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]386 compatible = "ti,ina226";
Michal Simek2ec41ef2019-08-26 09:46:36 +0200[diff] [blame]387 #io-channel-cells = <1>;
Michal Simek9df54d12019-08-26 10:18:13 +0200[diff] [blame]388 label = "ina226-u75";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]389 reg = <0x47>;
390 shunt-resistor = <5000>;
391 };
392 };
393 i2c@2 {
394 #address-cells = <1>;
395 #size-cells = <0>;
396 reg = <2>;
397 /* MAXIM_PMBUS - 00 */
398 max15301@a { /* u46 */
399 compatible = "maxim,max15301";
400 reg = <0xa>;
401 };
402 max15303@b { /* u4 */
403 compatible = "maxim,max15303";
404 reg = <0xb>;
405 };
406 max15303@10 { /* u13 */
407 compatible = "maxim,max15303";
408 reg = <0x10>;
409 };
410 max15301@13 { /* u47 */
411 compatible = "maxim,max15301";
412 reg = <0x13>;
413 };
414 max15303@14 { /* u7 */
415 compatible = "maxim,max15303";
416 reg = <0x14>;
417 };
418 max15303@15 { /* u6 */
419 compatible = "maxim,max15303";
420 reg = <0x15>;
421 };
422 max15303@16 { /* u10 */
423 compatible = "maxim,max15303";
424 reg = <0x16>;
425 };
426 max15303@17 { /* u9 */
427 compatible = "maxim,max15303";
428 reg = <0x17>;
429 };
430 max15301@18 { /* u63 */
431 compatible = "maxim,max15301";
432 reg = <0x18>;
433 };
434 max15303@1a { /* u49 */
435 compatible = "maxim,max15303";
436 reg = <0x1a>;
437 };
438 max15303@1b { /* u8 */
439 compatible = "maxim,max15303";
440 reg = <0x1b>;
441 };
442 max15303@1d { /* u18 */
443 compatible = "maxim,max15303";
444 reg = <0x1d>;
445 };
446
447 max20751@72 { /* u95 */
448 compatible = "maxim,max20751";
449 reg = <0x72>;
450 };
451 max20751@73 { /* u96 */
452 compatible = "maxim,max20751";
453 reg = <0x73>;
454 };
455 };
456 /* Bus 3 is not connected */
457 };
458};
459
460&i2c1 {
461 status = "okay";
462 clock-frequency = <400000>;
463
464 /* PL i2c via PCA9306 - u45 */
465 i2c-mux@74 { /* u34 */
466 compatible = "nxp,pca9548";
467 #address-cells = <1>;
468 #size-cells = <0>;
469 reg = <0x74>;
470 i2c@0 {
471 #address-cells = <1>;
472 #size-cells = <0>;
473 reg = <0>;
474 /*
475 * IIC_EEPROM 1kB memory which uses 256B blocks
476 * where every block has different address.
477 * 0 - 256B address 0x54
478 * 256B - 512B address 0x55
479 * 512B - 768B address 0x56
480 * 768B - 1024B address 0x57
481 */
482 eeprom: eeprom@54 { /* u23 */
483 compatible = "atmel,24c08";
484 reg = <0x54>;
485 };
486 };
487 i2c@1 {
488 #address-cells = <1>;
489 #size-cells = <0>;
490 reg = <1>;
491 si5341: clock-generator@36 { /* SI5341 - u69 */
492 compatible = "si5341";
493 reg = <0x36>;
494 };
495
496 };
497 i2c@2 {
498 #address-cells = <1>;
499 #size-cells = <0>;
500 reg = <2>;
501 si570_1: clock-generator@5d { /* USER SI570 - u42 */
502 #clock-cells = <0>;
503 compatible = "silabs,si570";
504 reg = <0x5d>;
505 temperature-stability = <50>;
506 factory-fout = <300000000>;
507 clock-frequency = <300000000>;
Michal Simek3cf07bf2018-07-18 12:10:02 +0200[diff] [blame]508 clock-output-names = "si570_user";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]509 };
510 };
511 i2c@3 {
512 #address-cells = <1>;
513 #size-cells = <0>;
514 reg = <3>;
515 si570_2: clock-generator@5d { /* USER MGT SI570 - u56 */
516 #clock-cells = <0>;
517 compatible = "silabs,si570";
518 reg = <0x5d>;
519 temperature-stability = <50>; /* copy from zc702 */
520 factory-fout = <156250000>;
521 clock-frequency = <148500000>;
Michal Simek3cf07bf2018-07-18 12:10:02 +0200[diff] [blame]522 clock-output-names = "si570_mgt";
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]523 };
524 };
525 i2c@4 {
526 #address-cells = <1>;
527 #size-cells = <0>;
528 reg = <4>;
529 si5328: clock-generator@69 {/* SI5328 - u20 */
530 compatible = "silabs,si5328";
531 reg = <0x69>;
532 };
533 };
534 i2c@5 {
535 #address-cells = <1>;
536 #size-cells = <0>;
537 reg = <5>; /* FAN controller */
538 temp@4c {/* lm96163 - u128 */
539 compatible = "national,lm96163";
540 reg = <0x4c>;
541 };
542 };
543 /* 6 - 7 unconnected */
544 };
545
546 i2c-mux@75 {
547 compatible = "nxp,pca9548"; /* u135 */
548 #address-cells = <1>;
549 #size-cells = <0>;
550 reg = <0x75>;
551
552 i2c@0 {
553 #address-cells = <1>;
554 #size-cells = <0>;
555 reg = <0>;
556 /* HPC0_IIC */
557 };
558 i2c@1 {
559 #address-cells = <1>;
560 #size-cells = <0>;
561 reg = <1>;
562 /* HPC1_IIC */
563 };
564 i2c@2 {
565 #address-cells = <1>;
566 #size-cells = <0>;
567 reg = <2>;
568 /* SYSMON */
569 };
570 i2c@3 {
571 #address-cells = <1>;
572 #size-cells = <0>;
573 reg = <3>;
574 /* DDR4 SODIMM */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]575 };
576 i2c@4 {
577 #address-cells = <1>;
578 #size-cells = <0>;
579 reg = <4>;
580 /* SEP 3 */
581 };
582 i2c@5 {
583 #address-cells = <1>;
584 #size-cells = <0>;
585 reg = <5>;
586 /* SEP 2 */
587 };
588 i2c@6 {
589 #address-cells = <1>;
590 #size-cells = <0>;
591 reg = <6>;
592 /* SEP 1 */
593 };
594 i2c@7 {
595 #address-cells = <1>;
596 #size-cells = <0>;
597 reg = <7>;
598 /* SEP 0 */
599 };
600 };
601};
602
603&qspi {
604 status = "okay";
605 is-dual = <1>;
606 flash@0 {
Neil Armstronga009fa72019-02-10 10:16:20 +0000[diff] [blame]607 compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
Michal Simek1a79c272018-03-28 15:43:51 +0200[diff] [blame]608 #address-cells = <1>;
609 #size-cells = <1>;
610 reg = <0x0>;
611 spi-tx-bus-width = <1>;
612 spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
613 spi-max-frequency = <108000000>; /* Based on DC1 spec */
614 partition@qspi-fsbl-uboot { /* for testing purpose */
615 label = "qspi-fsbl-uboot";
616 reg = <0x0 0x100000>;
617 };
618 partition@qspi-linux { /* for testing purpose */
619 label = "qspi-linux";
620 reg = <0x100000 0x500000>;
621 };
622 partition@qspi-device-tree { /* for testing purpose */
623 label = "qspi-device-tree";
624 reg = <0x600000 0x20000>;
625 };
626 partition@qspi-rootfs { /* for testing purpose */
627 label = "qspi-rootfs";
628 reg = <0x620000 0x5E0000>;
629 };
630 };
631};
632
633&rtc {
634 status = "okay";
635};
636
637&sata {
638 status = "okay";
639 /* SATA OOB timing settings */
640 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
641 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
642 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
643 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
644 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
645 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
646 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
647 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
648 phy-names = "sata-phy";
649 phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>;
650};
651
652/* SD1 with level shifter */
653&sdhci1 {
654 status = "okay";
655 no-1-8-v;
656 xlnx,mio_bank = <1>;
657};
658
659&serdes {
660 status = "okay";
661};
662
663&uart0 {
664 status = "okay";
665};
666
667&uart1 {
668 status = "okay";
669};
670
671/* ULPI SMSC USB3320 */
672&usb0 {
673 status = "okay";
674};
675
676&dwc3_0 {
677 status = "okay";
678 dr_mode = "host";
679 snps,usb3_lpm_capable;
680 phy-names = "usb3-phy";
681 phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;
682};
683
684&watchdog0 {
685 status = "okay";
686};