| Simon Glass | b37e815 | 2014-06-02 22:04:55 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Source for AM33XX SoC |
| 3 | * |
| 4 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public License |
| 7 | * version 2. This program is licensed "as is" without any warranty of any |
| 8 | * kind, whether express or implied. |
| 9 | */ |
| 10 | |
| 11 | #include <dt-bindings/gpio/gpio.h> |
| 12 | #include <dt-bindings/pinctrl/am33xx.h> |
| 13 | |
| 14 | #include "skeleton.dtsi" |
| 15 | |
| 16 | / { |
| 17 | compatible = "ti,am33xx"; |
| 18 | interrupt-parent = <&intc>; |
| 19 | |
| 20 | aliases { |
| 21 | serial0 = &uart0; |
| 22 | serial1 = &uart1; |
| 23 | serial2 = &uart2; |
| 24 | serial3 = &uart3; |
| 25 | serial4 = &uart4; |
| 26 | serial5 = &uart5; |
| 27 | d_can0 = &dcan0; |
| 28 | d_can1 = &dcan1; |
| 29 | usb0 = &usb0; |
| 30 | usb1 = &usb1; |
| 31 | phy0 = &usb0_phy; |
| 32 | phy1 = &usb1_phy; |
| 33 | }; |
| 34 | |
| 35 | cpus { |
| 36 | #address-cells = <1>; |
| 37 | #size-cells = <0>; |
| 38 | cpu@0 { |
| 39 | compatible = "arm,cortex-a8"; |
| 40 | device_type = "cpu"; |
| 41 | reg = <0>; |
| 42 | |
| 43 | /* |
| 44 | * To consider voltage drop between PMIC and SoC, |
| 45 | * tolerance value is reduced to 2% from 4% and |
| 46 | * voltage value is increased as a precaution. |
| 47 | */ |
| 48 | operating-points = < |
| 49 | /* kHz uV */ |
| 50 | 720000 1285000 |
| 51 | 600000 1225000 |
| 52 | 500000 1125000 |
| 53 | 275000 1125000 |
| 54 | >; |
| 55 | voltage-tolerance = <2>; /* 2 percentage */ |
| 56 | clock-latency = <300000>; /* From omap-cpufreq driver */ |
| 57 | }; |
| 58 | }; |
| 59 | |
| 60 | /* |
| 61 | * The soc node represents the soc top level view. It is uses for IPs |
| 62 | * that are not memory mapped in the MPU view or for the MPU itself. |
| 63 | */ |
| 64 | soc { |
| 65 | compatible = "ti,omap-infra"; |
| 66 | mpu { |
| 67 | compatible = "ti,omap3-mpu"; |
| 68 | ti,hwmods = "mpu"; |
| 69 | }; |
| 70 | }; |
| 71 | |
| 72 | am33xx_pinmux: pinmux@44e10800 { |
| 73 | compatible = "pinctrl-single"; |
| 74 | reg = <0x44e10800 0x0238>; |
| 75 | #address-cells = <1>; |
| 76 | #size-cells = <0>; |
| 77 | pinctrl-single,register-width = <32>; |
| 78 | pinctrl-single,function-mask = <0x7f>; |
| 79 | }; |
| 80 | |
| 81 | /* |
| 82 | * XXX: Use a flat representation of the AM33XX interconnect. |
| 83 | * The real AM33XX interconnect network is quite complex.Since |
| 84 | * that will not bring real advantage to represent that in DT |
| 85 | * for the moment, just use a fake OCP bus entry to represent |
| 86 | * the whole bus hierarchy. |
| 87 | */ |
| 88 | ocp { |
| 89 | compatible = "simple-bus"; |
| 90 | #address-cells = <1>; |
| 91 | #size-cells = <1>; |
| 92 | ranges; |
| 93 | ti,hwmods = "l3_main"; |
| 94 | |
| 95 | intc: interrupt-controller@48200000 { |
| 96 | compatible = "ti,omap2-intc"; |
| 97 | interrupt-controller; |
| 98 | #interrupt-cells = <1>; |
| 99 | ti,intc-size = <128>; |
| 100 | reg = <0x48200000 0x1000>; |
| 101 | }; |
| 102 | |
| 103 | gpio0: gpio@44e07000 { |
| 104 | compatible = "ti,omap4-gpio"; |
| 105 | ti,hwmods = "gpio1"; |
| 106 | gpio-controller; |
| 107 | #gpio-cells = <2>; |
| 108 | interrupt-controller; |
| 109 | #interrupt-cells = <1>; |
| 110 | reg = <0x44e07000 0x1000>; |
| 111 | interrupts = <96>; |
| 112 | }; |
| 113 | |
| 114 | gpio1: gpio@4804c000 { |
| 115 | compatible = "ti,omap4-gpio"; |
| 116 | ti,hwmods = "gpio2"; |
| 117 | gpio-controller; |
| 118 | #gpio-cells = <2>; |
| 119 | interrupt-controller; |
| 120 | #interrupt-cells = <1>; |
| 121 | reg = <0x4804c000 0x1000>; |
| 122 | interrupts = <98>; |
| 123 | }; |
| 124 | |
| 125 | gpio2: gpio@481ac000 { |
| 126 | compatible = "ti,omap4-gpio"; |
| 127 | ti,hwmods = "gpio3"; |
| 128 | gpio-controller; |
| 129 | #gpio-cells = <2>; |
| 130 | interrupt-controller; |
| 131 | #interrupt-cells = <1>; |
| 132 | reg = <0x481ac000 0x1000>; |
| 133 | interrupts = <32>; |
| 134 | }; |
| 135 | |
| 136 | gpio3: gpio@481ae000 { |
| 137 | compatible = "ti,omap4-gpio"; |
| 138 | ti,hwmods = "gpio4"; |
| 139 | gpio-controller; |
| 140 | #gpio-cells = <2>; |
| 141 | interrupt-controller; |
| 142 | #interrupt-cells = <1>; |
| 143 | reg = <0x481ae000 0x1000>; |
| 144 | interrupts = <62>; |
| 145 | }; |
| 146 | |
| 147 | uart0: serial@44e09000 { |
| 148 | compatible = "ti,omap3-uart"; |
| 149 | ti,hwmods = "uart1"; |
| 150 | clock-frequency = <48000000>; |
| 151 | reg = <0x44e09000 0x2000>; |
| 152 | interrupts = <72>; |
| 153 | status = "disabled"; |
| 154 | }; |
| 155 | |
| 156 | uart1: serial@48022000 { |
| 157 | compatible = "ti,omap3-uart"; |
| 158 | ti,hwmods = "uart2"; |
| 159 | clock-frequency = <48000000>; |
| 160 | reg = <0x48022000 0x2000>; |
| 161 | interrupts = <73>; |
| 162 | status = "disabled"; |
| 163 | }; |
| 164 | |
| 165 | uart2: serial@48024000 { |
| 166 | compatible = "ti,omap3-uart"; |
| 167 | ti,hwmods = "uart3"; |
| 168 | clock-frequency = <48000000>; |
| 169 | reg = <0x48024000 0x2000>; |
| 170 | interrupts = <74>; |
| 171 | status = "disabled"; |
| 172 | }; |
| 173 | |
| 174 | uart3: serial@481a6000 { |
| 175 | compatible = "ti,omap3-uart"; |
| 176 | ti,hwmods = "uart4"; |
| 177 | clock-frequency = <48000000>; |
| 178 | reg = <0x481a6000 0x2000>; |
| 179 | interrupts = <44>; |
| 180 | status = "disabled"; |
| 181 | }; |
| 182 | |
| 183 | uart4: serial@481a8000 { |
| 184 | compatible = "ti,omap3-uart"; |
| 185 | ti,hwmods = "uart5"; |
| 186 | clock-frequency = <48000000>; |
| 187 | reg = <0x481a8000 0x2000>; |
| 188 | interrupts = <45>; |
| 189 | status = "disabled"; |
| 190 | }; |
| 191 | |
| 192 | uart5: serial@481aa000 { |
| 193 | compatible = "ti,omap3-uart"; |
| 194 | ti,hwmods = "uart6"; |
| 195 | clock-frequency = <48000000>; |
| 196 | reg = <0x481aa000 0x2000>; |
| 197 | interrupts = <46>; |
| 198 | status = "disabled"; |
| 199 | }; |
| 200 | |
| 201 | i2c0: i2c@44e0b000 { |
| 202 | compatible = "ti,omap4-i2c"; |
| 203 | #address-cells = <1>; |
| 204 | #size-cells = <0>; |
| 205 | ti,hwmods = "i2c1"; |
| 206 | reg = <0x44e0b000 0x1000>; |
| 207 | interrupts = <70>; |
| 208 | status = "disabled"; |
| 209 | }; |
| 210 | |
| 211 | i2c1: i2c@4802a000 { |
| 212 | compatible = "ti,omap4-i2c"; |
| 213 | #address-cells = <1>; |
| 214 | #size-cells = <0>; |
| 215 | ti,hwmods = "i2c2"; |
| 216 | reg = <0x4802a000 0x1000>; |
| 217 | interrupts = <71>; |
| 218 | status = "disabled"; |
| 219 | }; |
| 220 | |
| 221 | i2c2: i2c@4819c000 { |
| 222 | compatible = "ti,omap4-i2c"; |
| 223 | #address-cells = <1>; |
| 224 | #size-cells = <0>; |
| 225 | ti,hwmods = "i2c3"; |
| 226 | reg = <0x4819c000 0x1000>; |
| 227 | interrupts = <30>; |
| 228 | status = "disabled"; |
| 229 | }; |
| 230 | |
| 231 | wdt2: wdt@44e35000 { |
| 232 | compatible = "ti,omap3-wdt"; |
| 233 | ti,hwmods = "wd_timer2"; |
| 234 | reg = <0x44e35000 0x1000>; |
| 235 | interrupts = <91>; |
| 236 | }; |
| 237 | |
| 238 | dcan0: d_can@481cc000 { |
| 239 | compatible = "bosch,d_can"; |
| 240 | ti,hwmods = "d_can0"; |
| 241 | reg = <0x481cc000 0x2000 |
| 242 | 0x44e10644 0x4>; |
| 243 | interrupts = <52>; |
| 244 | status = "disabled"; |
| 245 | }; |
| 246 | |
| 247 | dcan1: d_can@481d0000 { |
| 248 | compatible = "bosch,d_can"; |
| 249 | ti,hwmods = "d_can1"; |
| 250 | reg = <0x481d0000 0x2000 |
| 251 | 0x44e10644 0x4>; |
| 252 | interrupts = <55>; |
| 253 | status = "disabled"; |
| 254 | }; |
| 255 | |
| 256 | timer1: timer@44e31000 { |
| 257 | compatible = "ti,am335x-timer-1ms"; |
| 258 | reg = <0x44e31000 0x400>; |
| 259 | interrupts = <67>; |
| 260 | ti,hwmods = "timer1"; |
| 261 | ti,timer-alwon; |
| 262 | }; |
| 263 | |
| 264 | timer2: timer@48040000 { |
| 265 | compatible = "ti,am335x-timer"; |
| 266 | reg = <0x48040000 0x400>; |
| 267 | interrupts = <68>; |
| 268 | ti,hwmods = "timer2"; |
| 269 | }; |
| 270 | |
| 271 | timer3: timer@48042000 { |
| 272 | compatible = "ti,am335x-timer"; |
| 273 | reg = <0x48042000 0x400>; |
| 274 | interrupts = <69>; |
| 275 | ti,hwmods = "timer3"; |
| 276 | }; |
| 277 | |
| 278 | timer4: timer@48044000 { |
| 279 | compatible = "ti,am335x-timer"; |
| 280 | reg = <0x48044000 0x400>; |
| 281 | interrupts = <92>; |
| 282 | ti,hwmods = "timer4"; |
| 283 | ti,timer-pwm; |
| 284 | }; |
| 285 | |
| 286 | timer5: timer@48046000 { |
| 287 | compatible = "ti,am335x-timer"; |
| 288 | reg = <0x48046000 0x400>; |
| 289 | interrupts = <93>; |
| 290 | ti,hwmods = "timer5"; |
| 291 | ti,timer-pwm; |
| 292 | }; |
| 293 | |
| 294 | timer6: timer@48048000 { |
| 295 | compatible = "ti,am335x-timer"; |
| 296 | reg = <0x48048000 0x400>; |
| 297 | interrupts = <94>; |
| 298 | ti,hwmods = "timer6"; |
| 299 | ti,timer-pwm; |
| 300 | }; |
| 301 | |
| 302 | timer7: timer@4804a000 { |
| 303 | compatible = "ti,am335x-timer"; |
| 304 | reg = <0x4804a000 0x400>; |
| 305 | interrupts = <95>; |
| 306 | ti,hwmods = "timer7"; |
| 307 | ti,timer-pwm; |
| 308 | }; |
| 309 | |
| 310 | rtc@44e3e000 { |
| 311 | compatible = "ti,da830-rtc"; |
| 312 | reg = <0x44e3e000 0x1000>; |
| 313 | interrupts = <75 |
| 314 | 76>; |
| 315 | ti,hwmods = "rtc"; |
| 316 | }; |
| 317 | |
| 318 | spi0: spi@48030000 { |
| 319 | compatible = "ti,omap4-mcspi"; |
| 320 | #address-cells = <1>; |
| 321 | #size-cells = <0>; |
| 322 | reg = <0x48030000 0x400>; |
| 323 | interrupts = <65>; |
| 324 | ti,spi-num-cs = <2>; |
| 325 | ti,hwmods = "spi0"; |
| 326 | status = "disabled"; |
| 327 | }; |
| 328 | |
| 329 | spi1: spi@481a0000 { |
| 330 | compatible = "ti,omap4-mcspi"; |
| 331 | #address-cells = <1>; |
| 332 | #size-cells = <0>; |
| 333 | reg = <0x481a0000 0x400>; |
| 334 | interrupts = <125>; |
| 335 | ti,spi-num-cs = <2>; |
| 336 | ti,hwmods = "spi1"; |
| 337 | status = "disabled"; |
| 338 | }; |
| 339 | |
| 340 | usb: usb@47400000 { |
| 341 | compatible = "ti,am33xx-usb"; |
| 342 | reg = <0x47400000 0x1000>; |
| 343 | ranges; |
| 344 | #address-cells = <1>; |
| 345 | #size-cells = <1>; |
| 346 | ti,hwmods = "usb_otg_hs"; |
| 347 | status = "disabled"; |
| 348 | |
| 349 | ctrl_mod: control@44e10000 { |
| 350 | compatible = "ti,am335x-usb-ctrl-module"; |
| 351 | reg = <0x44e10620 0x10 |
| 352 | 0x44e10648 0x4>; |
| 353 | reg-names = "phy_ctrl", "wakeup"; |
| 354 | status = "disabled"; |
| 355 | }; |
| 356 | |
| 357 | usb0_phy: usb-phy@47401300 { |
| 358 | compatible = "ti,am335x-usb-phy"; |
| 359 | reg = <0x47401300 0x100>; |
| 360 | reg-names = "phy"; |
| 361 | status = "disabled"; |
| 362 | ti,ctrl_mod = <&ctrl_mod>; |
| 363 | }; |
| 364 | |
| 365 | usb0: usb@47401000 { |
| 366 | compatible = "ti,musb-am33xx"; |
| 367 | status = "disabled"; |
| 368 | reg = <0x47401400 0x400 |
| 369 | 0x47401000 0x200>; |
| 370 | reg-names = "mc", "control"; |
| 371 | |
| 372 | interrupts = <18>; |
| 373 | interrupt-names = "mc"; |
| 374 | dr_mode = "otg"; |
| 375 | mentor,multipoint = <1>; |
| 376 | mentor,num-eps = <16>; |
| 377 | mentor,ram-bits = <12>; |
| 378 | mentor,power = <500>; |
| 379 | phys = <&usb0_phy>; |
| 380 | |
| 381 | dmas = <&cppi41dma 0 0 &cppi41dma 1 0 |
| 382 | &cppi41dma 2 0 &cppi41dma 3 0 |
| 383 | &cppi41dma 4 0 &cppi41dma 5 0 |
| 384 | &cppi41dma 6 0 &cppi41dma 7 0 |
| 385 | &cppi41dma 8 0 &cppi41dma 9 0 |
| 386 | &cppi41dma 10 0 &cppi41dma 11 0 |
| 387 | &cppi41dma 12 0 &cppi41dma 13 0 |
| 388 | &cppi41dma 14 0 &cppi41dma 0 1 |
| 389 | &cppi41dma 1 1 &cppi41dma 2 1 |
| 390 | &cppi41dma 3 1 &cppi41dma 4 1 |
| 391 | &cppi41dma 5 1 &cppi41dma 6 1 |
| 392 | &cppi41dma 7 1 &cppi41dma 8 1 |
| 393 | &cppi41dma 9 1 &cppi41dma 10 1 |
| 394 | &cppi41dma 11 1 &cppi41dma 12 1 |
| 395 | &cppi41dma 13 1 &cppi41dma 14 1>; |
| 396 | dma-names = |
| 397 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", |
| 398 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", |
| 399 | "rx14", "rx15", |
| 400 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", |
| 401 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", |
| 402 | "tx14", "tx15"; |
| 403 | }; |
| 404 | |
| 405 | usb1_phy: usb-phy@47401b00 { |
| 406 | compatible = "ti,am335x-usb-phy"; |
| 407 | reg = <0x47401b00 0x100>; |
| 408 | reg-names = "phy"; |
| 409 | status = "disabled"; |
| 410 | ti,ctrl_mod = <&ctrl_mod>; |
| 411 | }; |
| 412 | |
| 413 | usb1: usb@47401800 { |
| 414 | compatible = "ti,musb-am33xx"; |
| 415 | status = "disabled"; |
| 416 | reg = <0x47401c00 0x400 |
| 417 | 0x47401800 0x200>; |
| 418 | reg-names = "mc", "control"; |
| 419 | interrupts = <19>; |
| 420 | interrupt-names = "mc"; |
| 421 | dr_mode = "otg"; |
| 422 | mentor,multipoint = <1>; |
| 423 | mentor,num-eps = <16>; |
| 424 | mentor,ram-bits = <12>; |
| 425 | mentor,power = <500>; |
| 426 | phys = <&usb1_phy>; |
| 427 | |
| 428 | dmas = <&cppi41dma 15 0 &cppi41dma 16 0 |
| 429 | &cppi41dma 17 0 &cppi41dma 18 0 |
| 430 | &cppi41dma 19 0 &cppi41dma 20 0 |
| 431 | &cppi41dma 21 0 &cppi41dma 22 0 |
| 432 | &cppi41dma 23 0 &cppi41dma 24 0 |
| 433 | &cppi41dma 25 0 &cppi41dma 26 0 |
| 434 | &cppi41dma 27 0 &cppi41dma 28 0 |
| 435 | &cppi41dma 29 0 &cppi41dma 15 1 |
| 436 | &cppi41dma 16 1 &cppi41dma 17 1 |
| 437 | &cppi41dma 18 1 &cppi41dma 19 1 |
| 438 | &cppi41dma 20 1 &cppi41dma 21 1 |
| 439 | &cppi41dma 22 1 &cppi41dma 23 1 |
| 440 | &cppi41dma 24 1 &cppi41dma 25 1 |
| 441 | &cppi41dma 26 1 &cppi41dma 27 1 |
| 442 | &cppi41dma 28 1 &cppi41dma 29 1>; |
| 443 | dma-names = |
| 444 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", |
| 445 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", |
| 446 | "rx14", "rx15", |
| 447 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", |
| 448 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", |
| 449 | "tx14", "tx15"; |
| 450 | }; |
| 451 | |
| 452 | cppi41dma: dma-controller@07402000 { |
| 453 | compatible = "ti,am3359-cppi41"; |
| 454 | reg = <0x47400000 0x1000 |
| 455 | 0x47402000 0x1000 |
| 456 | 0x47403000 0x1000 |
| 457 | 0x47404000 0x4000>; |
| 458 | reg-names = "glue", "controller", "scheduler", "queuemgr"; |
| 459 | interrupts = <17>; |
| 460 | interrupt-names = "glue"; |
| 461 | #dma-cells = <2>; |
| 462 | #dma-channels = <30>; |
| 463 | #dma-requests = <256>; |
| 464 | status = "disabled"; |
| 465 | }; |
| 466 | }; |
| 467 | |
| 468 | epwmss0: epwmss@48300000 { |
| 469 | compatible = "ti,am33xx-pwmss"; |
| 470 | reg = <0x48300000 0x10>; |
| 471 | ti,hwmods = "epwmss0"; |
| 472 | #address-cells = <1>; |
| 473 | #size-cells = <1>; |
| 474 | status = "disabled"; |
| 475 | ranges = <0x48300100 0x48300100 0x80 /* ECAP */ |
| 476 | 0x48300180 0x48300180 0x80 /* EQEP */ |
| 477 | 0x48300200 0x48300200 0x80>; /* EHRPWM */ |
| 478 | |
| 479 | ecap0: ecap@48300100 { |
| 480 | compatible = "ti,am33xx-ecap"; |
| 481 | #pwm-cells = <3>; |
| 482 | reg = <0x48300100 0x80>; |
| 483 | ti,hwmods = "ecap0"; |
| 484 | status = "disabled"; |
| 485 | }; |
| 486 | |
| 487 | ehrpwm0: ehrpwm@48300200 { |
| 488 | compatible = "ti,am33xx-ehrpwm"; |
| 489 | #pwm-cells = <3>; |
| 490 | reg = <0x48300200 0x80>; |
| 491 | ti,hwmods = "ehrpwm0"; |
| 492 | status = "disabled"; |
| 493 | }; |
| 494 | }; |
| 495 | |
| 496 | epwmss1: epwmss@48302000 { |
| 497 | compatible = "ti,am33xx-pwmss"; |
| 498 | reg = <0x48302000 0x10>; |
| 499 | ti,hwmods = "epwmss1"; |
| 500 | #address-cells = <1>; |
| 501 | #size-cells = <1>; |
| 502 | status = "disabled"; |
| 503 | ranges = <0x48302100 0x48302100 0x80 /* ECAP */ |
| 504 | 0x48302180 0x48302180 0x80 /* EQEP */ |
| 505 | 0x48302200 0x48302200 0x80>; /* EHRPWM */ |
| 506 | |
| 507 | ecap1: ecap@48302100 { |
| 508 | compatible = "ti,am33xx-ecap"; |
| 509 | #pwm-cells = <3>; |
| 510 | reg = <0x48302100 0x80>; |
| 511 | ti,hwmods = "ecap1"; |
| 512 | status = "disabled"; |
| 513 | }; |
| 514 | |
| 515 | ehrpwm1: ehrpwm@48302200 { |
| 516 | compatible = "ti,am33xx-ehrpwm"; |
| 517 | #pwm-cells = <3>; |
| 518 | reg = <0x48302200 0x80>; |
| 519 | ti,hwmods = "ehrpwm1"; |
| 520 | status = "disabled"; |
| 521 | }; |
| 522 | }; |
| 523 | |
| 524 | epwmss2: epwmss@48304000 { |
| 525 | compatible = "ti,am33xx-pwmss"; |
| 526 | reg = <0x48304000 0x10>; |
| 527 | ti,hwmods = "epwmss2"; |
| 528 | #address-cells = <1>; |
| 529 | #size-cells = <1>; |
| 530 | status = "disabled"; |
| 531 | ranges = <0x48304100 0x48304100 0x80 /* ECAP */ |
| 532 | 0x48304180 0x48304180 0x80 /* EQEP */ |
| 533 | 0x48304200 0x48304200 0x80>; /* EHRPWM */ |
| 534 | |
| 535 | ecap2: ecap@48304100 { |
| 536 | compatible = "ti,am33xx-ecap"; |
| 537 | #pwm-cells = <3>; |
| 538 | reg = <0x48304100 0x80>; |
| 539 | ti,hwmods = "ecap2"; |
| 540 | status = "disabled"; |
| 541 | }; |
| 542 | |
| 543 | ehrpwm2: ehrpwm@48304200 { |
| 544 | compatible = "ti,am33xx-ehrpwm"; |
| 545 | #pwm-cells = <3>; |
| 546 | reg = <0x48304200 0x80>; |
| 547 | ti,hwmods = "ehrpwm2"; |
| 548 | status = "disabled"; |
| 549 | }; |
| 550 | }; |
| 551 | |
| 552 | mac: ethernet@4a100000 { |
| 553 | compatible = "ti,cpsw"; |
| 554 | ti,hwmods = "cpgmac0"; |
| 555 | cpdma_channels = <8>; |
| 556 | ale_entries = <1024>; |
| 557 | bd_ram_size = <0x2000>; |
| 558 | no_bd_ram = <0>; |
| 559 | rx_descs = <64>; |
| 560 | mac_control = <0x20>; |
| 561 | slaves = <2>; |
| 562 | active_slave = <0>; |
| 563 | cpts_clock_mult = <0x80000000>; |
| 564 | cpts_clock_shift = <29>; |
| 565 | reg = <0x4a100000 0x800 |
| 566 | 0x4a101200 0x100>; |
| 567 | #address-cells = <1>; |
| 568 | #size-cells = <1>; |
| 569 | interrupt-parent = <&intc>; |
| 570 | /* |
| 571 | * c0_rx_thresh_pend |
| 572 | * c0_rx_pend |
| 573 | * c0_tx_pend |
| 574 | * c0_misc_pend |
| 575 | */ |
| 576 | interrupts = <40 41 42 43>; |
| 577 | ranges; |
| 578 | |
| 579 | davinci_mdio: mdio@4a101000 { |
| 580 | compatible = "ti,davinci_mdio"; |
| 581 | #address-cells = <1>; |
| 582 | #size-cells = <0>; |
| 583 | ti,hwmods = "davinci_mdio"; |
| 584 | bus_freq = <1000000>; |
| 585 | reg = <0x4a101000 0x100>; |
| 586 | }; |
| 587 | |
| 588 | cpsw_emac0: slave@4a100200 { |
| 589 | /* Filled in by U-Boot */ |
| 590 | mac-address = [ 00 00 00 00 00 00 ]; |
| 591 | }; |
| 592 | |
| 593 | cpsw_emac1: slave@4a100300 { |
| 594 | /* Filled in by U-Boot */ |
| 595 | mac-address = [ 00 00 00 00 00 00 ]; |
| 596 | }; |
| 597 | }; |
| 598 | |
| 599 | ocmcram: ocmcram@40300000 { |
| 600 | compatible = "ti,am3352-ocmcram"; |
| 601 | reg = <0x40300000 0x10000>; |
| 602 | ti,hwmods = "ocmcram"; |
| 603 | }; |
| 604 | |
| 605 | wkup_m3: wkup_m3@44d00000 { |
| 606 | compatible = "ti,am3353-wkup-m3"; |
| 607 | reg = <0x44d00000 0x4000 /* M3 UMEM */ |
| 608 | 0x44d80000 0x2000>; /* M3 DMEM */ |
| 609 | ti,hwmods = "wkup_m3"; |
| 610 | }; |
| 611 | |
| 612 | elm: elm@48080000 { |
| 613 | compatible = "ti,am3352-elm"; |
| 614 | reg = <0x48080000 0x2000>; |
| 615 | interrupts = <4>; |
| 616 | ti,hwmods = "elm"; |
| 617 | status = "disabled"; |
| 618 | }; |
| 619 | |
| 620 | tscadc: tscadc@44e0d000 { |
| 621 | compatible = "ti,am3359-tscadc"; |
| 622 | reg = <0x44e0d000 0x1000>; |
| 623 | interrupt-parent = <&intc>; |
| 624 | interrupts = <16>; |
| 625 | ti,hwmods = "adc_tsc"; |
| 626 | status = "disabled"; |
| 627 | |
| 628 | tsc { |
| 629 | compatible = "ti,am3359-tsc"; |
| 630 | }; |
| 631 | am335x_adc: adc { |
| 632 | #io-channel-cells = <1>; |
| 633 | compatible = "ti,am3359-adc"; |
| 634 | }; |
| 635 | }; |
| 636 | |
| 637 | gpmc: gpmc@50000000 { |
| 638 | compatible = "ti,am3352-gpmc"; |
| 639 | ti,hwmods = "gpmc"; |
| 640 | reg = <0x50000000 0x2000>; |
| 641 | interrupts = <100>; |
| 642 | gpmc,num-cs = <7>; |
| 643 | gpmc,num-waitpins = <2>; |
| 644 | #address-cells = <2>; |
| 645 | #size-cells = <1>; |
| 646 | status = "disabled"; |
| 647 | }; |
| 648 | }; |
| 649 | }; |