Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Altera SPI driver |
| 3 | * |
| 4 | * based on bfin_spi.c |
| 5 | * Copyright (c) 2005-2008 Analog Devices Inc. |
| 6 | * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw> |
| 7 | * |
Jagannadha Sutradharudu Teki | d92799e | 2013-10-14 13:31:24 +0530 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 9 | */ |
| 10 | #include <common.h> |
| 11 | #include <asm/io.h> |
| 12 | #include <malloc.h> |
| 13 | #include <spi.h> |
| 14 | |
Marek Vasut | 7bb4fc3 | 2014-10-22 21:56:04 +0200 | [diff] [blame] | 15 | #ifndef CONFIG_ALTERA_SPI_IDLE_VAL |
| 16 | #define CONFIG_ALTERA_SPI_IDLE_VAL 0xff |
| 17 | #endif |
| 18 | |
| 19 | #ifndef CONFIG_SYS_ALTERA_SPI_LIST |
| 20 | #define CONFIG_SYS_ALTERA_SPI_LIST { CONFIG_SYS_SPI_BASE } |
| 21 | #endif |
| 22 | |
Marek Vasut | 4206602 | 2014-10-22 21:55:58 +0200 | [diff] [blame] | 23 | struct altera_spi_regs { |
| 24 | u32 rxdata; |
| 25 | u32 txdata; |
| 26 | u32 status; |
| 27 | u32 control; |
| 28 | u32 _reserved; |
| 29 | u32 slave_sel; |
| 30 | }; |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 31 | |
Marek Vasut | 470dc3d | 2014-10-22 21:55:59 +0200 | [diff] [blame] | 32 | #define ALTERA_SPI_STATUS_ROE_MSK (1 << 3) |
| 33 | #define ALTERA_SPI_STATUS_TOE_MSK (1 << 4) |
| 34 | #define ALTERA_SPI_STATUS_TMT_MSK (1 << 5) |
| 35 | #define ALTERA_SPI_STATUS_TRDY_MSK (1 << 6) |
| 36 | #define ALTERA_SPI_STATUS_RRDY_MSK (1 << 7) |
| 37 | #define ALTERA_SPI_STATUS_E_MSK (1 << 8) |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 38 | |
Marek Vasut | 470dc3d | 2014-10-22 21:55:59 +0200 | [diff] [blame] | 39 | #define ALTERA_SPI_CONTROL_IROE_MSK (1 << 3) |
| 40 | #define ALTERA_SPI_CONTROL_ITOE_MSK (1 << 4) |
| 41 | #define ALTERA_SPI_CONTROL_ITRDY_MSK (1 << 6) |
| 42 | #define ALTERA_SPI_CONTROL_IRRDY_MSK (1 << 7) |
| 43 | #define ALTERA_SPI_CONTROL_IE_MSK (1 << 8) |
| 44 | #define ALTERA_SPI_CONTROL_SSO_MSK (1 << 10) |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 45 | |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 46 | static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST; |
| 47 | |
| 48 | struct altera_spi_slave { |
Marek Vasut | 4206602 | 2014-10-22 21:55:58 +0200 | [diff] [blame] | 49 | struct spi_slave slave; |
| 50 | struct altera_spi_regs *regs; |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 51 | }; |
| 52 | #define to_altera_spi_slave(s) container_of(s, struct altera_spi_slave, slave) |
| 53 | |
Marek Vasut | a49ffc3 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 54 | __weak int spi_cs_is_valid(unsigned int bus, unsigned int cs) |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 55 | { |
| 56 | return bus < ARRAY_SIZE(altera_spi_base_list) && cs < 32; |
| 57 | } |
| 58 | |
Marek Vasut | a49ffc3 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 59 | __weak void spi_cs_activate(struct spi_slave *slave) |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 60 | { |
| 61 | struct altera_spi_slave *altspi = to_altera_spi_slave(slave); |
Marek Vasut | 4206602 | 2014-10-22 21:55:58 +0200 | [diff] [blame] | 62 | writel(1 << slave->cs, &altspi->regs->slave_sel); |
| 63 | writel(ALTERA_SPI_CONTROL_SSO_MSK, &altspi->regs->control); |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 64 | } |
| 65 | |
Marek Vasut | a49ffc3 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 66 | __weak void spi_cs_deactivate(struct spi_slave *slave) |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 67 | { |
| 68 | struct altera_spi_slave *altspi = to_altera_spi_slave(slave); |
Marek Vasut | 4206602 | 2014-10-22 21:55:58 +0200 | [diff] [blame] | 69 | writel(0, &altspi->regs->control); |
| 70 | writel(0, &altspi->regs->slave_sel); |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 71 | } |
| 72 | |
| 73 | void spi_init(void) |
| 74 | { |
| 75 | } |
| 76 | |
Thomas Chou | 55be2b5 | 2010-12-27 09:30:17 +0800 | [diff] [blame] | 77 | void spi_set_speed(struct spi_slave *slave, uint hz) |
| 78 | { |
| 79 | /* altera spi core does not support programmable speed */ |
| 80 | } |
| 81 | |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 82 | struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, |
| 83 | unsigned int max_hz, unsigned int mode) |
| 84 | { |
| 85 | struct altera_spi_slave *altspi; |
| 86 | |
| 87 | if (!spi_cs_is_valid(bus, cs)) |
| 88 | return NULL; |
| 89 | |
Simon Glass | d034a95 | 2013-03-18 19:23:40 +0000 | [diff] [blame] | 90 | altspi = spi_alloc_slave(struct altera_spi_slave, bus, cs); |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 91 | if (!altspi) |
| 92 | return NULL; |
| 93 | |
Marek Vasut | 4206602 | 2014-10-22 21:55:58 +0200 | [diff] [blame] | 94 | altspi->regs = (struct altera_spi_regs *)altera_spi_base_list[bus]; |
Marek Vasut | a49ffc3 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 95 | debug("%s: bus:%i cs:%i base:%p\n", __func__, bus, cs, altspi->regs); |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 96 | |
| 97 | return &altspi->slave; |
| 98 | } |
| 99 | |
| 100 | void spi_free_slave(struct spi_slave *slave) |
| 101 | { |
| 102 | struct altera_spi_slave *altspi = to_altera_spi_slave(slave); |
| 103 | free(altspi); |
| 104 | } |
| 105 | |
| 106 | int spi_claim_bus(struct spi_slave *slave) |
| 107 | { |
| 108 | struct altera_spi_slave *altspi = to_altera_spi_slave(slave); |
| 109 | |
| 110 | debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); |
Marek Vasut | 4206602 | 2014-10-22 21:55:58 +0200 | [diff] [blame] | 111 | writel(0, &altspi->regs->control); |
| 112 | writel(0, &altspi->regs->slave_sel); |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 113 | return 0; |
| 114 | } |
| 115 | |
| 116 | void spi_release_bus(struct spi_slave *slave) |
| 117 | { |
| 118 | struct altera_spi_slave *altspi = to_altera_spi_slave(slave); |
| 119 | |
| 120 | debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); |
Marek Vasut | 4206602 | 2014-10-22 21:55:58 +0200 | [diff] [blame] | 121 | writel(0, &altspi->regs->slave_sel); |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 122 | } |
| 123 | |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 124 | int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, |
| 125 | void *din, unsigned long flags) |
| 126 | { |
| 127 | struct altera_spi_slave *altspi = to_altera_spi_slave(slave); |
| 128 | /* assume spi core configured to do 8 bit transfers */ |
Marek Vasut | 5c97e30 | 2014-10-22 21:56:02 +0200 | [diff] [blame] | 129 | unsigned int bytes = bitlen / 8; |
| 130 | const unsigned char *txp = dout; |
| 131 | unsigned char *rxp = din; |
| 132 | uint32_t reg, data, start; |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 133 | |
| 134 | debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__, |
Marek Vasut | a49ffc3 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 135 | slave->bus, slave->cs, bitlen, bytes, flags); |
| 136 | |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 137 | if (bitlen == 0) |
| 138 | goto done; |
| 139 | |
| 140 | if (bitlen % 8) { |
| 141 | flags |= SPI_XFER_END; |
| 142 | goto done; |
| 143 | } |
| 144 | |
| 145 | /* empty read buffer */ |
Marek Vasut | 4206602 | 2014-10-22 21:55:58 +0200 | [diff] [blame] | 146 | if (readl(&altspi->regs->status) & ALTERA_SPI_STATUS_RRDY_MSK) |
| 147 | readl(&altspi->regs->rxdata); |
Marek Vasut | a49ffc3 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 148 | |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 149 | if (flags & SPI_XFER_BEGIN) |
| 150 | spi_cs_activate(slave); |
| 151 | |
| 152 | while (bytes--) { |
Marek Vasut | 5c97e30 | 2014-10-22 21:56:02 +0200 | [diff] [blame] | 153 | if (txp) |
| 154 | data = *txp++; |
| 155 | else |
| 156 | data = CONFIG_ALTERA_SPI_IDLE_VAL; |
Marek Vasut | a49ffc3 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 157 | |
Marek Vasut | 5c97e30 | 2014-10-22 21:56:02 +0200 | [diff] [blame] | 158 | debug("%s: tx:%x ", __func__, data); |
| 159 | writel(data, &altspi->regs->txdata); |
Marek Vasut | a49ffc3 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 160 | |
Marek Vasut | ec6938e | 2014-10-22 21:56:01 +0200 | [diff] [blame] | 161 | start = get_timer(0); |
| 162 | while (1) { |
| 163 | reg = readl(&altspi->regs->status); |
| 164 | if (reg & ALTERA_SPI_STATUS_RRDY_MSK) |
| 165 | break; |
| 166 | if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) { |
| 167 | printf("%s: Transmission timed out!\n", __func__); |
| 168 | goto done; |
| 169 | } |
| 170 | } |
Marek Vasut | a49ffc3 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 171 | |
Marek Vasut | 5c97e30 | 2014-10-22 21:56:02 +0200 | [diff] [blame] | 172 | data = readl(&altspi->regs->rxdata); |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 173 | if (rxp) |
Marek Vasut | 5c97e30 | 2014-10-22 21:56:02 +0200 | [diff] [blame] | 174 | *rxp++ = data & 0xff; |
Marek Vasut | a49ffc3 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 175 | |
Marek Vasut | 5c97e30 | 2014-10-22 21:56:02 +0200 | [diff] [blame] | 176 | debug("rx:%x\n", data); |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 177 | } |
Marek Vasut | a49ffc3 | 2014-10-22 21:56:00 +0200 | [diff] [blame] | 178 | |
| 179 | done: |
Thomas Chou | 3a673f1 | 2010-04-30 11:34:16 +0800 | [diff] [blame] | 180 | if (flags & SPI_XFER_END) |
| 181 | spi_cs_deactivate(slave); |
| 182 | |
| 183 | return 0; |
| 184 | } |