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Tom Rinia2f4c912013-08-09 11:22:17 -04001/*
2 * ti_armv7_common.h
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 *
8 * The various ARMv7 SoCs from TI all share a number of IP blocks when
9 * implementing a given feature. Rather than define these in every
10 * board or even SoC common file, we define a common file to be re-used
11 * in all cases. While technically true that some of these details are
12 * configurable at the board design, they are common throughout SoC
13 * reference platforms as well as custom designs and become de facto
14 * standards.
15 */
16
17#ifndef __CONFIG_TI_ARMV7_COMMON_H__
18#define __CONFIG_TI_ARMV7_COMMON_H__
19
Tom Rinia2f4c912013-08-09 11:22:17 -040020/*
21 * We typically do not contain NOR flash. In the cases where we do, we
22 * undefine this later.
23 */
24#define CONFIG_SYS_NO_FLASH
25
26/* Support both device trees and ATAGs. */
Tom Rinia2f4c912013-08-09 11:22:17 -040027#define CONFIG_CMDLINE_TAG
28#define CONFIG_SETUP_MEMORY_TAGS
29#define CONFIG_INITRD_TAG
30
31/*
32 * Our DDR memory always starts at 0x80000000 and U-Boot shall have
33 * relocated itself to higher in memory by the time this value is used.
Tom Rini96886f22014-03-28 15:03:29 -040034 * However, set this to a 32MB offset to allow for easier Linux kernel
35 * booting as the default is often used as the kernel load address.
36 */
37#define CONFIG_SYS_LOAD_ADDR 0x82000000
38
39/*
40 * We setup defaults based on constraints from the Linux kernel, which should
41 * also be safe elsewhere. We have the default load at 32MB into DDR (for
42 * the kernel), FDT above 128MB (the maximum location for the end of the
43 * kernel), and the ramdisk 512KB above that (allowing for hopefully never
44 * seen large trees). We say all of this must be within the first 256MB
45 * as that will normally be within the kernel lowmem and thus visible via
46 * bootm_size and we only run on platforms with 256MB or more of memory.
Tom Rinia2f4c912013-08-09 11:22:17 -040047 */
Tom Rini96886f22014-03-28 15:03:29 -040048#define DEFAULT_LINUX_BOOT_ENV \
49 "loadaddr=0x82000000\0" \
50 "kernel_addr_r=0x82000000\0" \
51 "fdtaddr=0x88000000\0" \
52 "fdt_addr_r=0x88000000\0" \
53 "rdaddr=0x88080000\0" \
54 "ramdisk_addr_r=0x88080000\0" \
Sjoerd Simons3a3b3d12015-08-28 15:01:55 +020055 "scriptaddr=0x80000000\0" \
56 "pxefile_addr_r=0x80100000\0" \
Tom Rini96886f22014-03-28 15:03:29 -040057 "bootm_size=0x10000000\0"
Tom Rinia2f4c912013-08-09 11:22:17 -040058
Lokesh Vutlab207c472015-08-28 13:35:07 +053059#define DEFAULT_MMC_TI_ARGS \
60 "mmcdev=0\0" \
61 "mmcrootfstype=ext4 rootwait\0" \
B, Ravi5e5b9de2016-06-03 20:44:02 +053062 "finduuid=part uuid mmc ${bootpart} uuid\0" \
Lokesh Vutla5c426e32015-08-28 13:35:08 +053063 "args_mmc=run finduuid;setenv bootargs console=${console} " \
Lokesh Vutlab207c472015-08-28 13:35:07 +053064 "${optargs} " \
Lokesh Vutla5c426e32015-08-28 13:35:08 +053065 "root=PARTUUID=${uuid} rw " \
Lokesh Vutlad6c5a552016-03-09 15:39:35 +053066 "rootfstype=${mmcrootfstype}\0" \
67 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
68 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
69 "source ${loadaddr}\0" \
70 "bootenvfile=uEnv.txt\0" \
71 "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \
72 "env import -t ${loadaddr} ${filesize}\0" \
73 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}\0" \
74 "envboot=mmc dev ${mmcdev}; " \
75 "if mmc rescan; then " \
76 "echo SD/MMC found on device ${mmcdev};" \
77 "if run loadbootscript; then " \
78 "run bootscript;" \
79 "else " \
80 "if run loadbootenv; then " \
81 "echo Loaded env from ${bootenvfile};" \
82 "run importbootenv;" \
83 "fi;" \
84 "if test -n $uenvcmd; then " \
85 "echo Running uenvcmd ...;" \
86 "run uenvcmd;" \
87 "fi;" \
88 "fi;" \
89 "fi;\0" \
Lokesh Vutlab207c472015-08-28 13:35:07 +053090
Tom Rinia2f4c912013-08-09 11:22:17 -040091/*
Enric Balletbò i Serra07322c52013-12-06 21:30:21 +010092 * DDR information. If the CONFIG_NR_DRAM_BANKS is not defined,
93 * we say (for simplicity) that we have 1 bank, always, even when
94 * we have more. We always start at 0x80000000, and we place the
95 * initial stack pointer in our SRAM. Otherwise, we can define
96 * CONFIG_NR_DRAM_BANKS before including this file.
Tom Rinia2f4c912013-08-09 11:22:17 -040097 */
Enric Balletbò i Serra07322c52013-12-06 21:30:21 +010098#ifndef CONFIG_NR_DRAM_BANKS
Tom Rinia2f4c912013-08-09 11:22:17 -040099#define CONFIG_NR_DRAM_BANKS 1
Enric Balletbò i Serra07322c52013-12-06 21:30:21 +0100100#endif
Tom Rinia2f4c912013-08-09 11:22:17 -0400101#define CONFIG_SYS_SDRAM_BASE 0x80000000
Nishanth Menonb4471512015-07-22 18:05:45 -0500102
103#ifndef CONFIG_SYS_INIT_SP_ADDR
Tom Rinia2f4c912013-08-09 11:22:17 -0400104#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
105 GENERATED_GBL_DATA_SIZE)
Nishanth Menonb4471512015-07-22 18:05:45 -0500106#endif
Tom Rinia2f4c912013-08-09 11:22:17 -0400107
108/* Timer information. */
109#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Tom Rinia2f4c912013-08-09 11:22:17 -0400110
Mugunthan V N71202842016-07-18 15:10:59 +0530111/*
112 * Disable DM_* for SPL build and can be re-enabled after adding
113 * DM support in SPL
114 */
115#ifdef CONFIG_SPL_BUILD
116#undef CONFIG_DM_I2C
117#endif
118
Tom Rinia2f4c912013-08-09 11:22:17 -0400119/* I2C IP block */
120#define CONFIG_I2C
Mugunthan V Nf2cc5c32016-07-18 15:11:02 +0530121#ifndef CONFIG_DM_I2C
Heiko Schocherf53f2b82013-10-22 11:03:18 +0200122#define CONFIG_SYS_I2C
Mugunthan V Nf2cc5c32016-07-18 15:11:02 +0530123#else
124/*
125 * Enable CONFIG_DM_I2C_COMPAT temporarily until all the i2c client
126 * devices are adopted to DM
127 */
128#define CONFIG_DM_I2C_COMPAT
129#endif
Tom Rinia2f4c912013-08-09 11:22:17 -0400130
131/* MMC/SD IP block */
132#define CONFIG_MMC
133#define CONFIG_GENERIC_MMC
Tom Rinia2f4c912013-08-09 11:22:17 -0400134
135/* McSPI IP block */
136#define CONFIG_SPI
Tom Rinia2f4c912013-08-09 11:22:17 -0400137
138/* GPIO block */
Tom Rinia2f4c912013-08-09 11:22:17 -0400139
140/*
Tom Rinia2f4c912013-08-09 11:22:17 -0400141 * The following are general good-enough settings for U-Boot. We set a
142 * large malloc pool as we generally have a lot of DDR, and we opt for
143 * function over binary size in the main portion of U-Boot as this is
144 * generally easily constrained later if needed. We enable the config
145 * options that give us information in the environment about what board
146 * we are on so we do not need to rely on the command prompt. We set a
147 * console baudrate of 115200 and use the default baud rate table.
148 */
Tom Rinibc3a5572016-09-19 13:05:34 -0400149#define CONFIG_SYS_MALLOC_LEN SZ_32M
Tom Rinic5e96362013-08-20 08:53:49 -0400150#define CONFIG_BAUDRATE 115200
151#define CONFIG_ENV_VARS_UBOOT_CONFIG /* Strongly encouraged */
152#define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */
153
154/* As stated above, the following choices are optional. */
155#define CONFIG_SYS_LONGHELP
Tom Rinia2f4c912013-08-09 11:22:17 -0400156#define CONFIG_AUTO_COMPLETE
157#define CONFIG_CMDLINE_EDITING
Tom Rinia2f4c912013-08-09 11:22:17 -0400158
159/* We set the max number of command args high to avoid HUSH bugs. */
160#define CONFIG_SYS_MAXARGS 64
161
162/* Console I/O Buffer Size */
163#define CONFIG_SYS_CBSIZE 512
164/* Print Buffer Size */
165#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
166 + sizeof(CONFIG_SYS_PROMPT) + 16)
167/* Boot Argument Buffer Size */
168#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
169
Tom Rinia2f4c912013-08-09 11:22:17 -0400170/*
171 * When we have SPI, NOR or NAND flash we expect to be making use of
172 * mtdparts, both for ease of use in U-Boot and for passing information
173 * on to the Linux kernel.
174 */
Nishanth Menonb4471512015-07-22 18:05:45 -0500175#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND) || defined(CONFIG_NAND_DAVINCI)
Tom Rinia2f4c912013-08-09 11:22:17 -0400176#define CONFIG_MTD_DEVICE /* Required for mtdparts */
177#define CONFIG_CMD_MTDPARTS
178#endif
179
Guillaume GARDETaf02aa12014-11-03 14:26:17 +0100180#define CONFIG_SUPPORT_RAW_INITRD
Tom Rinia2f4c912013-08-09 11:22:17 -0400181
182/*
183 * Common filesystems support. When we have removable storage we
184 * enabled a number of useful commands and support.
185 */
186#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE)
187#define CONFIG_DOS_PARTITION
Tom Rinia2f4c912013-08-09 11:22:17 -0400188#define CONFIG_FAT_WRITE
Nishanth Menon53e42b72014-12-18 14:32:14 -0600189#define CONFIG_PARTITION_UUIDS
190#define CONFIG_CMD_PART
Tom Rinia2f4c912013-08-09 11:22:17 -0400191#endif
192
193/*
194 * Our platforms make use of SPL to initalize the hardware (primarily
Andrew F. Davise2f61e72016-08-30 14:06:28 -0500195 * memory) enough for full U-Boot to be loaded. We make use of the general
196 * SPL framework found under common/spl/. Given our generally common memory
197 * map, we set a number of related defaults and sizes here.
Tom Rinia2f4c912013-08-09 11:22:17 -0400198 */
Sourav Poddar5248bba2014-05-19 16:53:37 -0400199#if !defined(CONFIG_NOR_BOOT) && \
200 !(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX))
Tom Rinia2f4c912013-08-09 11:22:17 -0400201#define CONFIG_SPL_FRAMEWORK
Andrew F. Davise2f61e72016-08-30 14:06:28 -0500202
203/*
204 * We also support Falcon Mode so that the Linux kernel can be booted
205 * directly from SPL. This is not currently available on HS devices.
206 */
Tom Rinia2f4c912013-08-09 11:22:17 -0400207
208/*
Tom Rinibe737992014-07-18 11:51:32 -0400209 * Place the image at the start of the ROM defined image space (per
210 * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined
Tom Rinicfff4aa2016-08-26 13:30:43 -0400211 * downloaded image area minus 1KiB for scratch space. We initalize DRAM as
212 * soon as we can so that we can place stack, malloc and BSS there. We load
213 * U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict
214 * with older SPLs). We have our BSS be placed 2MiB after this, to allow for
215 * the default Linux kernel address of 0x80008000 to work with most sized
216 * kernels, in the Falcon Mode case. We have the SPL malloc pool at the end
217 * of the BSS area. We suggest that the stack be placed at 32MiB after the
218 * start of DRAM to allow room for all of the above (handled in Kconfig).
Tom Rinia2f4c912013-08-09 11:22:17 -0400219 */
Tom Rinie10247f2014-04-03 15:17:15 -0400220#ifndef CONFIG_SYS_TEXT_BASE
Tom Rinia2f4c912013-08-09 11:22:17 -0400221#define CONFIG_SYS_TEXT_BASE 0x80800000
Tom Rinie10247f2014-04-03 15:17:15 -0400222#endif
223#ifndef CONFIG_SPL_BSS_START_ADDR
Tom Rinia2f4c912013-08-09 11:22:17 -0400224#define CONFIG_SPL_BSS_START_ADDR 0x80a00000
225#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
Tom Rinie10247f2014-04-03 15:17:15 -0400226#endif
227#ifndef CONFIG_SYS_SPL_MALLOC_START
Tom Rinia2f4c912013-08-09 11:22:17 -0400228#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
229 CONFIG_SPL_BSS_MAX_SIZE)
Tom Rinibc3a5572016-09-19 13:05:34 -0400230#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_8M
Tom Rinie10247f2014-04-03 15:17:15 -0400231#endif
Tom Rinicfff4aa2016-08-26 13:30:43 -0400232#ifndef CONFIG_SPL_MAX_SIZE
233#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
234 CONFIG_SPL_TEXT_BASE)
235#endif
236
Tom Rinia2f4c912013-08-09 11:22:17 -0400237
Tom Rinia2f4c912013-08-09 11:22:17 -0400238/* FAT sd card locations. */
Paul Kocialkowski341e8cd2014-11-08 23:14:55 +0100239#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
Guillaume GARDET602a16c2014-10-15 17:53:11 +0200240#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Tom Rinia2f4c912013-08-09 11:22:17 -0400241
242#ifdef CONFIG_SPL_OS_BOOT
Tom Rinia2f4c912013-08-09 11:22:17 -0400243/* FAT */
Guillaume GARDET602a16c2014-10-15 17:53:11 +0200244#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
245#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
Tom Rinia2f4c912013-08-09 11:22:17 -0400246
247/* RAW SD card / eMMC */
248#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
249#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
250#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
251
Tom Rinia2f4c912013-08-09 11:22:17 -0400252/* spl export command */
253#define CONFIG_CMD_SPL
254#endif
255
Nishanth Menon657f11c2015-07-22 18:05:42 -0500256#define CONFIG_SYS_THUMB_BUILD
Tom Rinia2f4c912013-08-09 11:22:17 -0400257
Tom Rinif48e5ee2013-08-20 08:53:44 -0400258/* General parts of the framework, required. */
Tom Rinia2f4c912013-08-09 11:22:17 -0400259#define CONFIG_SPL_BOARD_INIT
260
261#ifdef CONFIG_NAND
Tom Rinia2f4c912013-08-09 11:22:17 -0400262#define CONFIG_SPL_NAND_BASE
263#define CONFIG_SPL_NAND_DRIVERS
264#define CONFIG_SPL_NAND_ECC
Tom Rinia2f4c912013-08-09 11:22:17 -0400265#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
Tom Rinia2f4c912013-08-09 11:22:17 -0400266#endif
267#endif /* !CONFIG_NOR_BOOT */
268
Cooper Jr., Franklin07610ab2015-04-21 07:51:04 -0500269/* Generic Environment Variables */
270
271#ifdef CONFIG_CMD_NET
272#define NETARGS \
273 "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
274 "::off\0" \
275 "nfsopts=nolock\0" \
276 "rootpath=/export/rootfs\0" \
277 "netloadimage=tftp ${loadaddr} ${bootfile}\0" \
278 "netloadfdt=tftp ${fdtaddr} ${fdtfile}\0" \
279 "netargs=setenv bootargs console=${console} " \
280 "${optargs} " \
281 "root=/dev/nfs " \
282 "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
283 "ip=dhcp\0" \
284 "netboot=echo Booting from network ...; " \
285 "setenv autoload no; " \
286 "dhcp; " \
287 "run netloadimage; " \
288 "run netloadfdt; " \
289 "run netargs; " \
290 "bootz ${loadaddr} - ${fdtaddr}\0"
Cooper Jr., Franklindcee9cf2015-06-10 08:54:02 -0500291#else
292#define NETARGS ""
Cooper Jr., Franklin07610ab2015-04-21 07:51:04 -0500293#endif
294
Matwey V. Kornilov5c15b912015-10-29 21:54:15 +0300295#include <config_distro_defaults.h>
296
Tom Rinia2f4c912013-08-09 11:22:17 -0400297#endif /* __CONFIG_TI_ARMV7_COMMON_H__ */