wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | |
Wolfgang Denk | 6405a15 | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 10 | DECLARE_GLOBAL_DATA_PTR; |
| 11 | |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 12 | #ifdef CONFIG_HARD_I2C |
| 13 | |
| 14 | #include <mpc5xxx.h> |
| 15 | #include <i2c.h> |
| 16 | |
Heiko Schocher | 3496b18 | 2010-11-10 08:57:55 +0100 | [diff] [blame] | 17 | #if !defined(CONFIG_I2C_MULTI_BUS) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 18 | #if (CONFIG_SYS_I2C_MODULE == 2) |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 19 | #define I2C_BASE MPC5XXX_I2C2 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 20 | #elif (CONFIG_SYS_I2C_MODULE == 1) |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 21 | #define I2C_BASE MPC5XXX_I2C1 |
dzu | 6217792 | 2003-09-30 14:08:43 +0000 | [diff] [blame] | 22 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 23 | #error CONFIG_SYS_I2C_MODULE is not properly configured |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 24 | #endif |
Heiko Schocher | 3496b18 | 2010-11-10 08:57:55 +0100 | [diff] [blame] | 25 | #else |
| 26 | static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = |
| 27 | CONFIG_SYS_SPD_BUS_NUM; |
| 28 | static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED, |
| 29 | CONFIG_SYS_I2C_SPEED}; |
| 30 | |
| 31 | static const unsigned long i2c_dev[2] = { |
| 32 | MPC5XXX_I2C1, |
| 33 | MPC5XXX_I2C2, |
| 34 | }; |
| 35 | |
| 36 | #define I2C_BASE ((struct mpc5xxx_i2c *)i2c_dev[i2c_bus_num]) |
| 37 | #endif |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 38 | |
Jon Smirl | c831da9 | 2009-04-04 17:44:51 -0400 | [diff] [blame] | 39 | #define I2C_TIMEOUT 6667 |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 40 | #define I2C_RETRIES 3 |
| 41 | |
dzu | 6217792 | 2003-09-30 14:08:43 +0000 | [diff] [blame] | 42 | struct mpc5xxx_i2c_tap { |
| 43 | int scl2tap; |
| 44 | int tap2tap; |
| 45 | }; |
| 46 | |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 47 | static int mpc_reg_in (volatile u32 *reg); |
| 48 | static void mpc_reg_out (volatile u32 *reg, int val, int mask); |
| 49 | static int wait_for_bb (void); |
| 50 | static int wait_for_pin (int *status); |
| 51 | static int do_address (uchar chip, char rdwr_flag); |
| 52 | static int send_bytes (uchar chip, char *buf, int len); |
| 53 | static int receive_bytes (uchar chip, char *buf, int len); |
dzu | 6217792 | 2003-09-30 14:08:43 +0000 | [diff] [blame] | 54 | static int mpc_get_fdr (int); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 55 | |
| 56 | static int mpc_reg_in(volatile u32 *reg) |
| 57 | { |
Wolfgang Denk | 7fb5266 | 2005-10-13 16:45:02 +0200 | [diff] [blame] | 58 | int ret = *reg >> 24; |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 59 | __asm__ __volatile__ ("eieio"); |
Wolfgang Denk | 7fb5266 | 2005-10-13 16:45:02 +0200 | [diff] [blame] | 60 | return ret; |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 61 | } |
| 62 | |
| 63 | static void mpc_reg_out(volatile u32 *reg, int val, int mask) |
| 64 | { |
| 65 | int tmp; |
| 66 | |
| 67 | if (!mask) { |
| 68 | *reg = val << 24; |
| 69 | } else { |
| 70 | tmp = mpc_reg_in(reg); |
| 71 | *reg = ((tmp & ~mask) | (val & mask)) << 24; |
| 72 | } |
| 73 | __asm__ __volatile__ ("eieio"); |
| 74 | |
| 75 | return; |
| 76 | } |
| 77 | |
| 78 | static int wait_for_bb(void) |
| 79 | { |
| 80 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; |
| 81 | int timeout = I2C_TIMEOUT; |
| 82 | int status; |
| 83 | |
| 84 | status = mpc_reg_in(®s->msr); |
| 85 | |
| 86 | while (timeout-- && (status & I2C_BB)) { |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 87 | mpc_reg_out(®s->mcr, I2C_STA, I2C_STA); |
Wolfgang Denk | cd478fc | 2011-11-04 15:55:06 +0000 | [diff] [blame] | 88 | (void)mpc_reg_in(®s->mdr); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 89 | mpc_reg_out(®s->mcr, 0, I2C_STA); |
| 90 | mpc_reg_out(®s->mcr, 0, 0); |
| 91 | mpc_reg_out(®s->mcr, I2C_EN, 0); |
Jon Smirl | c831da9 | 2009-04-04 17:44:51 -0400 | [diff] [blame] | 92 | udelay(15); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 93 | status = mpc_reg_in(®s->msr); |
| 94 | } |
| 95 | |
| 96 | return (status & I2C_BB); |
| 97 | } |
| 98 | |
| 99 | static int wait_for_pin(int *status) |
| 100 | { |
| 101 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; |
| 102 | int timeout = I2C_TIMEOUT; |
| 103 | |
| 104 | *status = mpc_reg_in(®s->msr); |
| 105 | |
| 106 | while (timeout-- && !(*status & I2C_IF)) { |
Jon Smirl | c831da9 | 2009-04-04 17:44:51 -0400 | [diff] [blame] | 107 | udelay(15); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 108 | *status = mpc_reg_in(®s->msr); |
| 109 | } |
| 110 | |
| 111 | if (!(*status & I2C_IF)) { |
| 112 | return -1; |
| 113 | } |
| 114 | |
| 115 | mpc_reg_out(®s->msr, 0, I2C_IF); |
| 116 | |
| 117 | return 0; |
| 118 | } |
| 119 | |
| 120 | static int do_address(uchar chip, char rdwr_flag) |
| 121 | { |
| 122 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; |
| 123 | int status; |
| 124 | |
| 125 | chip <<= 1; |
| 126 | |
| 127 | if (rdwr_flag) { |
| 128 | chip |= 1; |
| 129 | } |
| 130 | |
| 131 | mpc_reg_out(®s->mcr, I2C_TX, I2C_TX); |
| 132 | mpc_reg_out(®s->mdr, chip, 0); |
| 133 | |
wdenk | 9c53f40 | 2003-10-15 23:53:47 +0000 | [diff] [blame] | 134 | if (wait_for_pin(&status)) { |
| 135 | return -2; |
| 136 | } |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 137 | |
wdenk | 9c53f40 | 2003-10-15 23:53:47 +0000 | [diff] [blame] | 138 | if (status & I2C_RXAK) { |
| 139 | return -3; |
| 140 | } |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 141 | |
| 142 | return 0; |
| 143 | } |
| 144 | |
| 145 | static int send_bytes(uchar chip, char *buf, int len) |
| 146 | { |
| 147 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; |
| 148 | int wrcount; |
| 149 | int status; |
| 150 | |
| 151 | for (wrcount = 0; wrcount < len; ++wrcount) { |
| 152 | |
| 153 | mpc_reg_out(®s->mdr, buf[wrcount], 0); |
| 154 | |
| 155 | if (wait_for_pin(&status)) { |
| 156 | break; |
| 157 | } |
| 158 | |
| 159 | if (status & I2C_RXAK) { |
| 160 | break; |
| 161 | } |
| 162 | |
| 163 | } |
| 164 | |
| 165 | return !(wrcount == len); |
| 166 | } |
| 167 | |
| 168 | static int receive_bytes(uchar chip, char *buf, int len) |
| 169 | { |
| 170 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; |
| 171 | int dummy = 1; |
| 172 | int rdcount = 0; |
| 173 | int status; |
| 174 | int i; |
| 175 | |
| 176 | mpc_reg_out(®s->mcr, 0, I2C_TX); |
| 177 | |
| 178 | for (i = 0; i < len; ++i) { |
| 179 | buf[rdcount] = mpc_reg_in(®s->mdr); |
| 180 | |
| 181 | if (dummy) { |
| 182 | dummy = 0; |
| 183 | } else { |
| 184 | rdcount++; |
| 185 | } |
| 186 | |
| 187 | |
| 188 | if (wait_for_pin(&status)) { |
| 189 | return -4; |
| 190 | } |
| 191 | } |
| 192 | |
| 193 | mpc_reg_out(®s->mcr, I2C_TXAK, I2C_TXAK); |
| 194 | buf[rdcount++] = mpc_reg_in(®s->mdr); |
| 195 | |
| 196 | if (wait_for_pin(&status)) { |
| 197 | return -5; |
| 198 | } |
| 199 | |
| 200 | mpc_reg_out(®s->mcr, 0, I2C_TXAK); |
| 201 | |
| 202 | return 0; |
| 203 | } |
| 204 | |
Eric Millbrandt | 12990a4 | 2009-09-03 08:09:44 -0500 | [diff] [blame] | 205 | #if defined(CONFIG_SYS_I2C_INIT_MPC5XXX) |
| 206 | |
| 207 | #define FDR510(x) (u8) (((x & 0x20) >> 3) | (x & 0x3)) |
| 208 | #define FDR432(x) (u8) ((x & 0x1C) >> 2) |
| 209 | /* |
| 210 | * Reset any i2c devices that may have been interrupted during a system reset. |
| 211 | * Normally this would be accomplished by clocking the line until SCL and SDA |
| 212 | * are released and then sending a start condtiion (From an Atmel datasheet). |
| 213 | * There is no direct access to the i2c pins so instead create start commands |
| 214 | * through the i2c interface. Send a start command then delay for the SDA Hold |
| 215 | * time, repeat this by disabling/enabling the bus a total of 9 times. |
| 216 | */ |
| 217 | static void send_reset(void) |
| 218 | { |
| 219 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; |
| 220 | int i; |
| 221 | u32 delay; |
| 222 | u8 fdr; |
| 223 | int SDA_Tap[] = { 3, 3, 4, 4, 1, 1, 2, 2}; |
| 224 | struct mpc5xxx_i2c_tap scltap[] = { |
| 225 | {4, 1}, |
| 226 | {4, 2}, |
| 227 | {6, 4}, |
| 228 | {6, 8}, |
| 229 | {14, 16}, |
| 230 | {30, 32}, |
| 231 | {62, 64}, |
| 232 | {126, 128} |
| 233 | }; |
| 234 | |
| 235 | fdr = (u8)mpc_reg_in(®s->mfdr); |
| 236 | |
| 237 | delay = scltap[FDR432(fdr)].scl2tap + ((SDA_Tap[FDR510(fdr)] - 1) * \ |
| 238 | scltap[FDR432(fdr)].tap2tap) + 3; |
| 239 | |
| 240 | for (i = 0; i < 9; i++) { |
| 241 | mpc_reg_out(®s->mcr, I2C_EN|I2C_STA|I2C_TX, I2C_INIT_MASK); |
| 242 | udelay(delay); |
| 243 | mpc_reg_out(®s->mcr, 0, I2C_INIT_MASK); |
| 244 | udelay(delay); |
| 245 | } |
| 246 | |
| 247 | mpc_reg_out(®s->mcr, I2C_EN, I2C_INIT_MASK); |
| 248 | } |
| 249 | #endif /* CONFIG_SYS_I2c_INIT_MPC5XXX */ |
| 250 | |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 251 | /**************** I2C API ****************/ |
| 252 | |
| 253 | void i2c_init(int speed, int saddr) |
| 254 | { |
| 255 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; |
| 256 | |
| 257 | mpc_reg_out(®s->mcr, 0, 0); |
| 258 | mpc_reg_out(®s->madr, saddr << 1, 0); |
| 259 | |
| 260 | /* Set clock |
| 261 | */ |
dzu | 6217792 | 2003-09-30 14:08:43 +0000 | [diff] [blame] | 262 | mpc_reg_out(®s->mfdr, mpc_get_fdr(speed), 0); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 263 | |
| 264 | /* Enable module |
| 265 | */ |
| 266 | mpc_reg_out(®s->mcr, I2C_EN, I2C_INIT_MASK); |
| 267 | mpc_reg_out(®s->msr, 0, I2C_IF); |
| 268 | |
Eric Millbrandt | 12990a4 | 2009-09-03 08:09:44 -0500 | [diff] [blame] | 269 | #if defined(CONFIG_SYS_I2C_INIT_MPC5XXX) |
| 270 | send_reset(); |
| 271 | #endif |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 272 | return; |
| 273 | } |
| 274 | |
dzu | 6217792 | 2003-09-30 14:08:43 +0000 | [diff] [blame] | 275 | static int mpc_get_fdr(int speed) |
| 276 | { |
dzu | 6217792 | 2003-09-30 14:08:43 +0000 | [diff] [blame] | 277 | static int fdr = -1; |
dzu | 6217792 | 2003-09-30 14:08:43 +0000 | [diff] [blame] | 278 | |
| 279 | if (fdr == -1) { |
wdenk | 4b16c2e | 2003-11-07 13:42:26 +0000 | [diff] [blame] | 280 | ulong best_speed = 0; |
| 281 | ulong divider; |
dzu | 6217792 | 2003-09-30 14:08:43 +0000 | [diff] [blame] | 282 | ulong ipb, scl; |
| 283 | ulong bestmatch = 0xffffffffUL; |
| 284 | int best_i = 0, best_j = 0, i, j; |
| 285 | int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8}; |
| 286 | struct mpc5xxx_i2c_tap scltap[] = { |
| 287 | {4, 1}, |
| 288 | {4, 2}, |
| 289 | {6, 4}, |
| 290 | {6, 8}, |
| 291 | {14, 16}, |
| 292 | {30, 32}, |
| 293 | {62, 64}, |
| 294 | {126, 128} |
| 295 | }; |
| 296 | |
Simon Glass | 4f8c5f0 | 2012-12-13 20:48:53 +0000 | [diff] [blame] | 297 | ipb = gd->arch.ipb_clk; |
dzu | 6217792 | 2003-09-30 14:08:43 +0000 | [diff] [blame] | 298 | for (i = 7; i >= 0; i--) { |
| 299 | for (j = 7; j >= 0; j--) { |
wdenk | 9c53f40 | 2003-10-15 23:53:47 +0000 | [diff] [blame] | 300 | scl = 2 * (scltap[j].scl2tap + |
dzu | 6217792 | 2003-09-30 14:08:43 +0000 | [diff] [blame] | 301 | (SCL_Tap[i] - 1) * scltap[j].tap2tap + 2); |
| 302 | if (ipb <= speed*scl) { |
| 303 | if ((speed*scl - ipb) < bestmatch) { |
| 304 | bestmatch = speed*scl - ipb; |
| 305 | best_i = i; |
| 306 | best_j = j; |
| 307 | best_speed = ipb/scl; |
| 308 | } |
| 309 | } |
| 310 | } |
| 311 | } |
wdenk | 4b16c2e | 2003-11-07 13:42:26 +0000 | [diff] [blame] | 312 | divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2); |
| 313 | if (gd->flags & GD_FLG_RELOC) { |
| 314 | fdr = divider; |
| 315 | } else { |
Graeme Russ | 70600b0 | 2011-08-29 02:14:05 +0000 | [diff] [blame] | 316 | printf("%ld kHz, ", best_speed / 1000); |
wdenk | 4b16c2e | 2003-11-07 13:42:26 +0000 | [diff] [blame] | 317 | return divider; |
| 318 | } |
dzu | 6217792 | 2003-09-30 14:08:43 +0000 | [diff] [blame] | 319 | } |
| 320 | |
| 321 | return fdr; |
| 322 | } |
| 323 | |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 324 | int i2c_probe(uchar chip) |
| 325 | { |
| 326 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; |
| 327 | int i; |
| 328 | |
| 329 | for (i = 0; i < I2C_RETRIES; i++) { |
| 330 | mpc_reg_out(®s->mcr, I2C_STA, I2C_STA); |
| 331 | |
| 332 | if (! do_address(chip, 0)) { |
| 333 | mpc_reg_out(®s->mcr, 0, I2C_STA); |
wdenk | 604b7a1 | 2004-06-09 15:29:49 +0000 | [diff] [blame] | 334 | udelay(500); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 335 | break; |
| 336 | } |
| 337 | |
| 338 | mpc_reg_out(®s->mcr, 0, I2C_STA); |
| 339 | udelay(500); |
| 340 | } |
| 341 | |
| 342 | return (i == I2C_RETRIES); |
| 343 | } |
| 344 | |
| 345 | int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len) |
| 346 | { |
Wolfgang Denk | 7fb5266 | 2005-10-13 16:45:02 +0200 | [diff] [blame] | 347 | char xaddr[4]; |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 348 | struct mpc5xxx_i2c * regs = (struct mpc5xxx_i2c *)I2C_BASE; |
| 349 | int ret = -1; |
| 350 | |
| 351 | xaddr[0] = (addr >> 24) & 0xFF; |
| 352 | xaddr[1] = (addr >> 16) & 0xFF; |
| 353 | xaddr[2] = (addr >> 8) & 0xFF; |
| 354 | xaddr[3] = addr & 0xFF; |
| 355 | |
| 356 | if (wait_for_bb()) { |
Graeme Russ | 70600b0 | 2011-08-29 02:14:05 +0000 | [diff] [blame] | 357 | printf("i2c_read: bus is busy\n"); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 358 | goto Done; |
| 359 | } |
| 360 | |
| 361 | mpc_reg_out(®s->mcr, I2C_STA, I2C_STA); |
| 362 | if (do_address(chip, 0)) { |
Graeme Russ | 70600b0 | 2011-08-29 02:14:05 +0000 | [diff] [blame] | 363 | printf("i2c_read: failed to address chip\n"); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 364 | goto Done; |
| 365 | } |
| 366 | |
| 367 | if (send_bytes(chip, &xaddr[4-alen], alen)) { |
Graeme Russ | 70600b0 | 2011-08-29 02:14:05 +0000 | [diff] [blame] | 368 | printf("i2c_read: send_bytes failed\n"); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 369 | goto Done; |
| 370 | } |
| 371 | |
| 372 | mpc_reg_out(®s->mcr, I2C_RSTA, I2C_RSTA); |
| 373 | if (do_address(chip, 1)) { |
Graeme Russ | 70600b0 | 2011-08-29 02:14:05 +0000 | [diff] [blame] | 374 | printf("i2c_read: failed to address chip\n"); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 375 | goto Done; |
| 376 | } |
| 377 | |
Wolfgang Denk | 7fb5266 | 2005-10-13 16:45:02 +0200 | [diff] [blame] | 378 | if (receive_bytes(chip, (char *)buf, len)) { |
Graeme Russ | 70600b0 | 2011-08-29 02:14:05 +0000 | [diff] [blame] | 379 | printf("i2c_read: receive_bytes failed\n"); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 380 | goto Done; |
| 381 | } |
| 382 | |
| 383 | ret = 0; |
| 384 | Done: |
| 385 | mpc_reg_out(®s->mcr, 0, I2C_STA); |
| 386 | return ret; |
| 387 | } |
| 388 | |
| 389 | int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len) |
| 390 | { |
Wolfgang Denk | 7fb5266 | 2005-10-13 16:45:02 +0200 | [diff] [blame] | 391 | char xaddr[4]; |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 392 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; |
| 393 | int ret = -1; |
| 394 | |
| 395 | xaddr[0] = (addr >> 24) & 0xFF; |
| 396 | xaddr[1] = (addr >> 16) & 0xFF; |
| 397 | xaddr[2] = (addr >> 8) & 0xFF; |
| 398 | xaddr[3] = addr & 0xFF; |
| 399 | |
wdenk | 9c53f40 | 2003-10-15 23:53:47 +0000 | [diff] [blame] | 400 | if (wait_for_bb()) { |
Graeme Russ | 70600b0 | 2011-08-29 02:14:05 +0000 | [diff] [blame] | 401 | printf("i2c_write: bus is busy\n"); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 402 | goto Done; |
| 403 | } |
| 404 | |
wdenk | 9c53f40 | 2003-10-15 23:53:47 +0000 | [diff] [blame] | 405 | mpc_reg_out(®s->mcr, I2C_STA, I2C_STA); |
| 406 | if (do_address(chip, 0)) { |
Graeme Russ | 70600b0 | 2011-08-29 02:14:05 +0000 | [diff] [blame] | 407 | printf("i2c_write: failed to address chip\n"); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 408 | goto Done; |
| 409 | } |
| 410 | |
| 411 | if (send_bytes(chip, &xaddr[4-alen], alen)) { |
Graeme Russ | 70600b0 | 2011-08-29 02:14:05 +0000 | [diff] [blame] | 412 | printf("i2c_write: send_bytes failed\n"); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 413 | goto Done; |
| 414 | } |
| 415 | |
Wolfgang Denk | 7fb5266 | 2005-10-13 16:45:02 +0200 | [diff] [blame] | 416 | if (send_bytes(chip, (char *)buf, len)) { |
Graeme Russ | 70600b0 | 2011-08-29 02:14:05 +0000 | [diff] [blame] | 417 | printf("i2c_write: send_bytes failed\n"); |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 418 | goto Done; |
| 419 | } |
| 420 | |
| 421 | ret = 0; |
| 422 | Done: |
| 423 | mpc_reg_out(®s->mcr, 0, I2C_STA); |
| 424 | return ret; |
| 425 | } |
| 426 | |
Heiko Schocher | 3496b18 | 2010-11-10 08:57:55 +0100 | [diff] [blame] | 427 | #if defined(CONFIG_I2C_MULTI_BUS) |
| 428 | int i2c_set_bus_num(unsigned int bus) |
| 429 | { |
| 430 | if (bus > 1) |
| 431 | return -1; |
| 432 | |
| 433 | i2c_bus_num = bus; |
| 434 | i2c_init(i2c_bus_speed[bus], CONFIG_SYS_I2C_SLAVE); |
| 435 | return 0; |
| 436 | } |
| 437 | |
| 438 | int i2c_set_bus_speed(unsigned int speed) |
| 439 | { |
| 440 | i2c_init(speed, CONFIG_SYS_I2C_SLAVE); |
| 441 | return 0; |
| 442 | } |
| 443 | |
| 444 | unsigned int i2c_get_bus_num(void) |
| 445 | { |
| 446 | return i2c_bus_num; |
| 447 | } |
| 448 | |
| 449 | unsigned int i2c_get_bus_speed(void) |
| 450 | { |
| 451 | return i2c_bus_speed[i2c_bus_num]; |
| 452 | } |
| 453 | #endif |
| 454 | |
| 455 | |
wdenk | 2552190 | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 456 | #endif /* CONFIG_HARD_I2C */ |