Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 1 | /* |
Timur Tabi | 107e9cd | 2010-03-29 12:51:07 -0500 | [diff] [blame] | 2 | * Copyright 2006,2009-2010 Freescale Semiconductor, Inc. |
Jon Loeliger | e65e32e | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 3 | * Jeff Brown |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 4 | * Srikanth Srinivasan (srikanth.srinivasan@freescale.com) |
| 5 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| 10 | #include <watchdog.h> |
| 11 | #include <command.h> |
| 12 | #include <asm/cache.h> |
Becky Bruce | 7e07c77 | 2008-05-08 19:02:51 -0500 | [diff] [blame] | 13 | #include <asm/mmu.h> |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 14 | #include <mpc86xx.h> |
Becky Bruce | b0b3094 | 2008-01-23 16:31:06 -0600 | [diff] [blame] | 15 | #include <asm/fsl_law.h> |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 16 | |
Poonam Aggrwal | 4baef82 | 2009-07-31 12:08:14 +0530 | [diff] [blame] | 17 | DECLARE_GLOBAL_DATA_PTR; |
| 18 | |
Peter Tyser | 6945440 | 2009-02-05 11:25:25 -0600 | [diff] [blame] | 19 | /* |
| 20 | * Default board reset function |
| 21 | */ |
| 22 | static void |
| 23 | __board_reset(void) |
| 24 | { |
| 25 | /* Do nothing */ |
| 26 | } |
Peter Tyser | 21d2cd2 | 2009-04-20 11:08:46 -0500 | [diff] [blame] | 27 | void board_reset(void) __attribute__((weak, alias("__board_reset"))); |
Peter Tyser | 6945440 | 2009-02-05 11:25:25 -0600 | [diff] [blame] | 28 | |
| 29 | |
Jon Loeliger | a129544 | 2006-08-22 12:06:18 -0500 | [diff] [blame] | 30 | int |
| 31 | checkcpu(void) |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 32 | { |
| 33 | sys_info_t sysinfo; |
| 34 | uint pvr, svr; |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 35 | uint major, minor; |
Peter Tyser | 698f3a1 | 2009-02-06 14:30:40 -0600 | [diff] [blame] | 36 | char buf1[32], buf2[32]; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 37 | volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; |
Jon Loeliger | 3b971c9 | 2007-10-16 15:26:51 -0500 | [diff] [blame] | 38 | volatile ccsr_gur_t *gur = &immap->im_gur; |
Kumar Gala | 1e2e9fa | 2009-06-18 08:23:01 -0500 | [diff] [blame] | 39 | struct cpu_type *cpu; |
Peter Tyser | 698f3a1 | 2009-02-06 14:30:40 -0600 | [diff] [blame] | 40 | uint msscr0 = mfspr(MSSCR0); |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 41 | |
| 42 | svr = get_svr(); |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 43 | major = SVR_MAJ(svr); |
| 44 | minor = SVR_MIN(svr); |
| 45 | |
Poonam Aggrwal | 36a6843 | 2009-09-03 19:42:40 +0530 | [diff] [blame] | 46 | if (cpu_numcores() > 1) { |
| 47 | #ifndef CONFIG_MP |
| 48 | puts("Unicore software on multiprocessor system!!\n" |
| 49 | "To enable mutlticore build define CONFIG_MP\n"); |
| 50 | #endif |
| 51 | } |
Peter Tyser | 698f3a1 | 2009-02-06 14:30:40 -0600 | [diff] [blame] | 52 | puts("CPU: "); |
| 53 | |
Simon Glass | a8b5739 | 2012-12-13 20:48:48 +0000 | [diff] [blame] | 54 | cpu = gd->arch.cpu; |
Poonam Aggrwal | 4baef82 | 2009-07-31 12:08:14 +0530 | [diff] [blame] | 55 | |
Poonam Aggrwal | da6e1ca | 2009-09-02 13:35:21 +0530 | [diff] [blame] | 56 | puts(cpu->name); |
Kumar Gala | 1e2e9fa | 2009-06-18 08:23:01 -0500 | [diff] [blame] | 57 | |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 58 | printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr); |
Peter Tyser | 698f3a1 | 2009-02-06 14:30:40 -0600 | [diff] [blame] | 59 | puts("Core: "); |
| 60 | |
| 61 | pvr = get_pvr(); |
Peter Tyser | 698f3a1 | 2009-02-06 14:30:40 -0600 | [diff] [blame] | 62 | major = PVR_E600_MAJ(pvr); |
| 63 | minor = PVR_E600_MIN(pvr); |
| 64 | |
Fabio Estevam | f4c557c | 2013-04-21 13:11:02 -0300 | [diff] [blame] | 65 | printf("e600 Core %d", (msscr0 & 0x20) ? 1 : 0); |
Peter Tyser | 698f3a1 | 2009-02-06 14:30:40 -0600 | [diff] [blame] | 66 | if (gur->pordevsr & MPC86xx_PORDEVSR_CORE1TE) |
| 67 | puts("\n Core1Translation Enabled"); |
| 68 | debug(" (MSSCR0=%x, PORDEVSR=%x)", msscr0, gur->pordevsr); |
| 69 | |
| 70 | printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr); |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 71 | |
| 72 | get_sys_info(&sysinfo); |
| 73 | |
Peter Tyser | 698f3a1 | 2009-02-06 14:30:40 -0600 | [diff] [blame] | 74 | puts("Clock Configuration:\n"); |
Prabhakar Kushwaha | d169808 | 2013-08-16 14:52:26 +0530 | [diff] [blame] | 75 | printf(" CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freq_processor)); |
| 76 | printf("MPX:%-4s MHz\n", strmhz(buf1, sysinfo.freq_systembus)); |
Peter Tyser | 698f3a1 | 2009-02-06 14:30:40 -0600 | [diff] [blame] | 77 | printf(" DDR:%-4s MHz (%s MT/s data rate), ", |
Prabhakar Kushwaha | d169808 | 2013-08-16 14:52:26 +0530 | [diff] [blame] | 78 | strmhz(buf1, sysinfo.freq_systembus / 2), |
| 79 | strmhz(buf2, sysinfo.freq_systembus)); |
Jon Loeliger | 465b9d8 | 2006-04-27 10:15:16 -0500 | [diff] [blame] | 80 | |
Prabhakar Kushwaha | d169808 | 2013-08-16 14:52:26 +0530 | [diff] [blame] | 81 | if (sysinfo.freq_localbus > LCRR_CLKDIV) { |
| 82 | printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus)); |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 83 | } else { |
Wolfgang Denk | 3fe630c | 2009-01-12 14:50:35 +0100 | [diff] [blame] | 84 | printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n", |
Prabhakar Kushwaha | d169808 | 2013-08-16 14:52:26 +0530 | [diff] [blame] | 85 | sysinfo.freq_localbus); |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 86 | } |
| 87 | |
Shruti Kanetkar | 8115936 | 2013-08-15 11:25:38 -0500 | [diff] [blame] | 88 | puts("L1: D-cache 32 KiB enabled\n"); |
| 89 | puts(" I-cache 32 KiB enabled\n"); |
Peter Tyser | 698f3a1 | 2009-02-06 14:30:40 -0600 | [diff] [blame] | 90 | |
| 91 | puts("L2: "); |
| 92 | if (get_l2cr() & 0x80000000) { |
York Sun | f48436a | 2016-11-23 14:06:21 -0800 | [diff] [blame] | 93 | #if defined(CONFIG_ARCH_MPC8610) |
Peter Tyser | 698f3a1 | 2009-02-06 14:30:40 -0600 | [diff] [blame] | 94 | puts("256"); |
| 95 | #elif defined(CONFIG_MPC8641) |
| 96 | puts("512"); |
| 97 | #endif |
Shruti Kanetkar | 8115936 | 2013-08-15 11:25:38 -0500 | [diff] [blame] | 98 | puts(" KiB enabled\n"); |
Peter Tyser | 698f3a1 | 2009-02-06 14:30:40 -0600 | [diff] [blame] | 99 | } else { |
Jon Loeliger | e65e32e | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 100 | puts("Disabled\n"); |
Peter Tyser | 698f3a1 | 2009-02-06 14:30:40 -0600 | [diff] [blame] | 101 | } |
Jon Loeliger | 465b9d8 | 2006-04-27 10:15:16 -0500 | [diff] [blame] | 102 | |
| 103 | return 0; |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 104 | } |
| 105 | |
| 106 | |
Peter Tyser | 693d638 | 2010-12-03 10:28:47 -0600 | [diff] [blame] | 107 | int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 108 | { |
Peter Tyser | 6945440 | 2009-02-05 11:25:25 -0600 | [diff] [blame] | 109 | volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
| 110 | volatile ccsr_gur_t *gur = &immap->im_gur; |
Jon Loeliger | 465b9d8 | 2006-04-27 10:15:16 -0500 | [diff] [blame] | 111 | |
Peter Tyser | 6945440 | 2009-02-05 11:25:25 -0600 | [diff] [blame] | 112 | /* Attempt board-specific reset */ |
| 113 | board_reset(); |
Jon Loeliger | 465b9d8 | 2006-04-27 10:15:16 -0500 | [diff] [blame] | 114 | |
Peter Tyser | 6945440 | 2009-02-05 11:25:25 -0600 | [diff] [blame] | 115 | /* Next try asserting HRESET_REQ */ |
| 116 | out_be32(&gur->rstcr, MPC86xx_RSTCR_HRST_REQ); |
Jon Loeliger | 465b9d8 | 2006-04-27 10:15:16 -0500 | [diff] [blame] | 117 | |
Peter Tyser | 6945440 | 2009-02-05 11:25:25 -0600 | [diff] [blame] | 118 | while (1) |
| 119 | ; |
Peter Tyser | 693d638 | 2010-12-03 10:28:47 -0600 | [diff] [blame] | 120 | |
| 121 | return 1; |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 122 | } |
| 123 | |
| 124 | |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 125 | /* |
| 126 | * Get timebase clock frequency |
| 127 | */ |
Jon Loeliger | a129544 | 2006-08-22 12:06:18 -0500 | [diff] [blame] | 128 | unsigned long |
| 129 | get_tbclk(void) |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 130 | { |
Jon Loeliger | a129544 | 2006-08-22 12:06:18 -0500 | [diff] [blame] | 131 | sys_info_t sys_info; |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 132 | |
| 133 | get_sys_info(&sys_info); |
Prabhakar Kushwaha | d169808 | 2013-08-16 14:52:26 +0530 | [diff] [blame] | 134 | return (sys_info.freq_systembus + 3L) / 4L; |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 135 | } |
| 136 | |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 137 | |
| 138 | #if defined(CONFIG_WATCHDOG) |
| 139 | void |
| 140 | watchdog_reset(void) |
| 141 | { |
York Sun | f48436a | 2016-11-23 14:06:21 -0800 | [diff] [blame] | 142 | #if defined(CONFIG_ARCH_MPC8610) |
Jason Jin | 6c71b94 | 2008-05-13 11:50:36 +0800 | [diff] [blame] | 143 | /* |
| 144 | * This actually feed the hard enabled watchdog. |
| 145 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 146 | volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
Jason Jin | 6c71b94 | 2008-05-13 11:50:36 +0800 | [diff] [blame] | 147 | volatile ccsr_wdt_t *wdt = &immap->im_wdt; |
| 148 | volatile ccsr_gur_t *gur = &immap->im_gur; |
| 149 | u32 tmp = gur->pordevsr; |
| 150 | |
| 151 | if (tmp & 0x4000) { |
| 152 | wdt->swsrr = 0x556c; |
| 153 | wdt->swsrr = 0xaa39; |
| 154 | } |
| 155 | #endif |
Jon Loeliger | 5c8aa97 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 156 | } |
| 157 | #endif /* CONFIG_WATCHDOG */ |
| 158 | |
Becky Bruce | b0b3094 | 2008-01-23 16:31:06 -0600 | [diff] [blame] | 159 | /* |
| 160 | * Print out the state of various machine registers. |
Becky Bruce | 7e07c77 | 2008-05-08 19:02:51 -0500 | [diff] [blame] | 161 | * Currently prints out LAWs, BR0/OR0, and BATs |
Becky Bruce | b0b3094 | 2008-01-23 16:31:06 -0600 | [diff] [blame] | 162 | */ |
| 163 | void mpc86xx_reginfo(void) |
| 164 | { |
Becky Bruce | 7e07c77 | 2008-05-08 19:02:51 -0500 | [diff] [blame] | 165 | print_bats(); |
Becky Bruce | b0b3094 | 2008-01-23 16:31:06 -0600 | [diff] [blame] | 166 | print_laws(); |
Becky Bruce | 0d4cee1 | 2010-06-17 11:37:20 -0500 | [diff] [blame] | 167 | print_lbc_regs(); |
Ben Warren | d448a49 | 2008-06-23 22:57:27 -0700 | [diff] [blame] | 168 | } |
Timur Tabi | 107e9cd | 2010-03-29 12:51:07 -0500 | [diff] [blame] | 169 | |
| 170 | /* |
| 171 | * Set the DDR BATs to reflect the actual size of DDR. |
| 172 | * |
| 173 | * dram_size is the actual size of DDR, in bytes |
| 174 | * |
| 175 | * Note: we assume that CONFIG_MAX_MEM_MAPPED is 2G or smaller as we only |
| 176 | * are using a single BAT to cover DDR. |
| 177 | * |
| 178 | * If this is not true, (e.g. CONFIG_MAX_MEM_MAPPED is 2GB but HID0_XBSEN |
| 179 | * is not defined) then we might have a situation where U-Boot will attempt |
| 180 | * to relocated itself outside of the region mapped by DBAT0. |
| 181 | * This will cause a machine check. |
| 182 | * |
| 183 | * Currently we are limited to power of two sized DDR since we only use a |
| 184 | * single bat. If a non-power of two size is used that is less than |
| 185 | * CONFIG_MAX_MEM_MAPPED u-boot will crash. |
| 186 | * |
| 187 | */ |
| 188 | void setup_ddr_bat(phys_addr_t dram_size) |
| 189 | { |
| 190 | unsigned long batu, bl; |
| 191 | |
| 192 | bl = TO_BATU_BL(min(dram_size, CONFIG_MAX_MEM_MAPPED)); |
| 193 | |
| 194 | if (BATU_SIZE(bl) != dram_size) { |
| 195 | u64 sz = (u64)dram_size - BATU_SIZE(bl); |
| 196 | print_size(sz, " left unmapped\n"); |
| 197 | } |
| 198 | |
| 199 | batu = bl | BATU_VS | BATU_VP; |
| 200 | write_bat(DBAT0, batu, CONFIG_SYS_DBAT0L); |
| 201 | write_bat(IBAT0, batu, CONFIG_SYS_IBAT0L); |
| 202 | } |