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Jon Loeliger5c8aa972006-04-26 17:58:56 -05001/*
Timur Tabi107e9cd2010-03-29 12:51:07 -05002 * Copyright 2006,2009-2010 Freescale Semiconductor, Inc.
Jon Loeligere65e32e2006-05-31 12:44:44 -05003 * Jeff Brown
Jon Loeliger5c8aa972006-04-26 17:58:56 -05004 * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Jon Loeliger5c8aa972006-04-26 17:58:56 -05007 */
8
9#include <common.h>
10#include <watchdog.h>
11#include <command.h>
12#include <asm/cache.h>
Becky Bruce7e07c772008-05-08 19:02:51 -050013#include <asm/mmu.h>
Jon Loeliger5c8aa972006-04-26 17:58:56 -050014#include <mpc86xx.h>
Becky Bruceb0b30942008-01-23 16:31:06 -060015#include <asm/fsl_law.h>
Jon Loeliger5c8aa972006-04-26 17:58:56 -050016
Poonam Aggrwal4baef822009-07-31 12:08:14 +053017DECLARE_GLOBAL_DATA_PTR;
18
Peter Tyser69454402009-02-05 11:25:25 -060019/*
20 * Default board reset function
21 */
22static void
23__board_reset(void)
24{
25 /* Do nothing */
26}
Peter Tyser21d2cd22009-04-20 11:08:46 -050027void board_reset(void) __attribute__((weak, alias("__board_reset")));
Peter Tyser69454402009-02-05 11:25:25 -060028
29
Jon Loeligera1295442006-08-22 12:06:18 -050030int
31checkcpu(void)
Jon Loeliger5c8aa972006-04-26 17:58:56 -050032{
33 sys_info_t sysinfo;
34 uint pvr, svr;
Jon Loeliger5c8aa972006-04-26 17:58:56 -050035 uint major, minor;
Peter Tyser698f3a12009-02-06 14:30:40 -060036 char buf1[32], buf2[32];
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020037 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
Jon Loeliger3b971c92007-10-16 15:26:51 -050038 volatile ccsr_gur_t *gur = &immap->im_gur;
Kumar Gala1e2e9fa2009-06-18 08:23:01 -050039 struct cpu_type *cpu;
Peter Tyser698f3a12009-02-06 14:30:40 -060040 uint msscr0 = mfspr(MSSCR0);
Jon Loeliger5c8aa972006-04-26 17:58:56 -050041
42 svr = get_svr();
Jon Loeliger5c8aa972006-04-26 17:58:56 -050043 major = SVR_MAJ(svr);
44 minor = SVR_MIN(svr);
45
Poonam Aggrwal36a68432009-09-03 19:42:40 +053046 if (cpu_numcores() > 1) {
47#ifndef CONFIG_MP
48 puts("Unicore software on multiprocessor system!!\n"
49 "To enable mutlticore build define CONFIG_MP\n");
50#endif
51 }
Peter Tyser698f3a12009-02-06 14:30:40 -060052 puts("CPU: ");
53
Simon Glassa8b57392012-12-13 20:48:48 +000054 cpu = gd->arch.cpu;
Poonam Aggrwal4baef822009-07-31 12:08:14 +053055
Poonam Aggrwalda6e1ca2009-09-02 13:35:21 +053056 puts(cpu->name);
Kumar Gala1e2e9fa2009-06-18 08:23:01 -050057
Jon Loeliger5c8aa972006-04-26 17:58:56 -050058 printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr);
Peter Tyser698f3a12009-02-06 14:30:40 -060059 puts("Core: ");
60
61 pvr = get_pvr();
Peter Tyser698f3a12009-02-06 14:30:40 -060062 major = PVR_E600_MAJ(pvr);
63 minor = PVR_E600_MIN(pvr);
64
Fabio Estevamf4c557c2013-04-21 13:11:02 -030065 printf("e600 Core %d", (msscr0 & 0x20) ? 1 : 0);
Peter Tyser698f3a12009-02-06 14:30:40 -060066 if (gur->pordevsr & MPC86xx_PORDEVSR_CORE1TE)
67 puts("\n Core1Translation Enabled");
68 debug(" (MSSCR0=%x, PORDEVSR=%x)", msscr0, gur->pordevsr);
69
70 printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr);
Jon Loeliger5c8aa972006-04-26 17:58:56 -050071
72 get_sys_info(&sysinfo);
73
Peter Tyser698f3a12009-02-06 14:30:40 -060074 puts("Clock Configuration:\n");
Prabhakar Kushwahad1698082013-08-16 14:52:26 +053075 printf(" CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freq_processor));
76 printf("MPX:%-4s MHz\n", strmhz(buf1, sysinfo.freq_systembus));
Peter Tyser698f3a12009-02-06 14:30:40 -060077 printf(" DDR:%-4s MHz (%s MT/s data rate), ",
Prabhakar Kushwahad1698082013-08-16 14:52:26 +053078 strmhz(buf1, sysinfo.freq_systembus / 2),
79 strmhz(buf2, sysinfo.freq_systembus));
Jon Loeliger465b9d82006-04-27 10:15:16 -050080
Prabhakar Kushwahad1698082013-08-16 14:52:26 +053081 if (sysinfo.freq_localbus > LCRR_CLKDIV) {
82 printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus));
Jon Loeliger5c8aa972006-04-26 17:58:56 -050083 } else {
Wolfgang Denk3fe630c2009-01-12 14:50:35 +010084 printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n",
Prabhakar Kushwahad1698082013-08-16 14:52:26 +053085 sysinfo.freq_localbus);
Jon Loeliger5c8aa972006-04-26 17:58:56 -050086 }
87
Shruti Kanetkar81159362013-08-15 11:25:38 -050088 puts("L1: D-cache 32 KiB enabled\n");
89 puts(" I-cache 32 KiB enabled\n");
Peter Tyser698f3a12009-02-06 14:30:40 -060090
91 puts("L2: ");
92 if (get_l2cr() & 0x80000000) {
York Sunf48436a2016-11-23 14:06:21 -080093#if defined(CONFIG_ARCH_MPC8610)
Peter Tyser698f3a12009-02-06 14:30:40 -060094 puts("256");
95#elif defined(CONFIG_MPC8641)
96 puts("512");
97#endif
Shruti Kanetkar81159362013-08-15 11:25:38 -050098 puts(" KiB enabled\n");
Peter Tyser698f3a12009-02-06 14:30:40 -060099 } else {
Jon Loeligere65e32e2006-05-31 12:44:44 -0500100 puts("Disabled\n");
Peter Tyser698f3a12009-02-06 14:30:40 -0600101 }
Jon Loeliger465b9d82006-04-27 10:15:16 -0500102
103 return 0;
Jon Loeliger5c8aa972006-04-26 17:58:56 -0500104}
105
106
Peter Tyser693d6382010-12-03 10:28:47 -0600107int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
Jon Loeliger5c8aa972006-04-26 17:58:56 -0500108{
Peter Tyser69454402009-02-05 11:25:25 -0600109 volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
110 volatile ccsr_gur_t *gur = &immap->im_gur;
Jon Loeliger465b9d82006-04-27 10:15:16 -0500111
Peter Tyser69454402009-02-05 11:25:25 -0600112 /* Attempt board-specific reset */
113 board_reset();
Jon Loeliger465b9d82006-04-27 10:15:16 -0500114
Peter Tyser69454402009-02-05 11:25:25 -0600115 /* Next try asserting HRESET_REQ */
116 out_be32(&gur->rstcr, MPC86xx_RSTCR_HRST_REQ);
Jon Loeliger465b9d82006-04-27 10:15:16 -0500117
Peter Tyser69454402009-02-05 11:25:25 -0600118 while (1)
119 ;
Peter Tyser693d6382010-12-03 10:28:47 -0600120
121 return 1;
Jon Loeliger5c8aa972006-04-26 17:58:56 -0500122}
123
124
Jon Loeliger5c8aa972006-04-26 17:58:56 -0500125/*
126 * Get timebase clock frequency
127 */
Jon Loeligera1295442006-08-22 12:06:18 -0500128unsigned long
129get_tbclk(void)
Jon Loeliger5c8aa972006-04-26 17:58:56 -0500130{
Jon Loeligera1295442006-08-22 12:06:18 -0500131 sys_info_t sys_info;
Jon Loeliger5c8aa972006-04-26 17:58:56 -0500132
133 get_sys_info(&sys_info);
Prabhakar Kushwahad1698082013-08-16 14:52:26 +0530134 return (sys_info.freq_systembus + 3L) / 4L;
Jon Loeliger5c8aa972006-04-26 17:58:56 -0500135}
136
Jon Loeliger5c8aa972006-04-26 17:58:56 -0500137
138#if defined(CONFIG_WATCHDOG)
139void
140watchdog_reset(void)
141{
York Sunf48436a2016-11-23 14:06:21 -0800142#if defined(CONFIG_ARCH_MPC8610)
Jason Jin6c71b942008-05-13 11:50:36 +0800143 /*
144 * This actually feed the hard enabled watchdog.
145 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200146 volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
Jason Jin6c71b942008-05-13 11:50:36 +0800147 volatile ccsr_wdt_t *wdt = &immap->im_wdt;
148 volatile ccsr_gur_t *gur = &immap->im_gur;
149 u32 tmp = gur->pordevsr;
150
151 if (tmp & 0x4000) {
152 wdt->swsrr = 0x556c;
153 wdt->swsrr = 0xaa39;
154 }
155#endif
Jon Loeliger5c8aa972006-04-26 17:58:56 -0500156}
157#endif /* CONFIG_WATCHDOG */
158
Becky Bruceb0b30942008-01-23 16:31:06 -0600159/*
160 * Print out the state of various machine registers.
Becky Bruce7e07c772008-05-08 19:02:51 -0500161 * Currently prints out LAWs, BR0/OR0, and BATs
Becky Bruceb0b30942008-01-23 16:31:06 -0600162 */
163void mpc86xx_reginfo(void)
164{
Becky Bruce7e07c772008-05-08 19:02:51 -0500165 print_bats();
Becky Bruceb0b30942008-01-23 16:31:06 -0600166 print_laws();
Becky Bruce0d4cee12010-06-17 11:37:20 -0500167 print_lbc_regs();
Ben Warrend448a492008-06-23 22:57:27 -0700168}
Timur Tabi107e9cd2010-03-29 12:51:07 -0500169
170/*
171 * Set the DDR BATs to reflect the actual size of DDR.
172 *
173 * dram_size is the actual size of DDR, in bytes
174 *
175 * Note: we assume that CONFIG_MAX_MEM_MAPPED is 2G or smaller as we only
176 * are using a single BAT to cover DDR.
177 *
178 * If this is not true, (e.g. CONFIG_MAX_MEM_MAPPED is 2GB but HID0_XBSEN
179 * is not defined) then we might have a situation where U-Boot will attempt
180 * to relocated itself outside of the region mapped by DBAT0.
181 * This will cause a machine check.
182 *
183 * Currently we are limited to power of two sized DDR since we only use a
184 * single bat. If a non-power of two size is used that is less than
185 * CONFIG_MAX_MEM_MAPPED u-boot will crash.
186 *
187 */
188void setup_ddr_bat(phys_addr_t dram_size)
189{
190 unsigned long batu, bl;
191
192 bl = TO_BATU_BL(min(dram_size, CONFIG_MAX_MEM_MAPPED));
193
194 if (BATU_SIZE(bl) != dram_size) {
195 u64 sz = (u64)dram_size - BATU_SIZE(bl);
196 print_size(sz, " left unmapped\n");
197 }
198
199 batu = bl | BATU_VS | BATU_VP;
200 write_bat(DBAT0, batu, CONFIG_SYS_DBAT0L);
201 write_bat(IBAT0, batu, CONFIG_SYS_IBAT0L);
202}