| Jagan Teki | a4dd793 | 2023-01-30 20:27:46 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. |
| 4 | */ |
| 5 | |
| 6 | #include "rockchip-u-boot.dtsi" |
| 7 | |
| 8 | / { |
| 9 | dmc { |
| 10 | compatible = "rockchip,rk3588-dmc"; |
| 11 | bootph-all; |
| 12 | status = "okay"; |
| 13 | }; |
| 14 | |
| 15 | pmu1_grf: syscon@fd58a000 { |
| 16 | bootph-all; |
| 17 | compatible = "rockchip,rk3588-pmu1-grf", "syscon"; |
| 18 | reg = <0x0 0xfd58a000 0x0 0x2000>; |
| 19 | }; |
| Jagan Teki | 275d851 | 2023-01-30 20:27:47 +0530 | [diff] [blame] | 20 | |
| 21 | sdmmc: mmc@fe2c0000 { |
| 22 | compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc"; |
| 23 | reg = <0x0 0xfe2c0000 0x0 0x4000>; |
| 24 | interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>; |
| 25 | clocks = <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>, |
| 26 | <&scmi_clk SCMI_HCLK_SD>, <&scmi_clk SCMI_CCLK_SD>; |
| 27 | clock-names = "ciu-drive", "ciu-sample", "biu", "ciu"; |
| 28 | fifo-depth = <0x100>; |
| 29 | max-frequency = <200000000>; |
| 30 | pinctrl-names = "default"; |
| 31 | pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>; |
| 32 | status = "disabled"; |
| 33 | }; |
| Jagan Teki | a4dd793 | 2023-01-30 20:27:46 +0530 | [diff] [blame] | 34 | }; |
| 35 | |
| 36 | &xin24m { |
| 37 | bootph-all; |
| 38 | status = "okay"; |
| 39 | }; |
| 40 | |
| 41 | &cru { |
| 42 | bootph-pre-ram; |
| 43 | status = "okay"; |
| 44 | }; |
| 45 | |
| 46 | &sys_grf { |
| 47 | bootph-pre-ram; |
| 48 | status = "okay"; |
| 49 | }; |
| 50 | |
| 51 | &uart2 { |
| 52 | clock-frequency = <24000000>; |
| 53 | bootph-pre-ram; |
| 54 | status = "okay"; |
| 55 | }; |
| 56 | |
| 57 | &ioc { |
| 58 | bootph-pre-ram; |
| 59 | }; |