| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Paul Burton | f5de32a | 2016-09-08 07:47:39 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2016 Imagination Technologies |
| Paul Burton | f5de32a | 2016-09-08 07:47:39 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __CONFIGS_BOSTON_H__ |
| 7 | #define __CONFIGS_BOSTON_H__ |
| 8 | |
| 9 | /* |
| Paul Burton | fc9d3bf | 2017-04-30 21:22:43 +0200 | [diff] [blame] | 10 | * General board configuration |
| 11 | */ |
| 12 | #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) |
| 13 | |
| 14 | /* |
| Paul Burton | f5de32a | 2016-09-08 07:47:39 +0100 | [diff] [blame] | 15 | * CPU |
| 16 | */ |
| 17 | #define CONFIG_SYS_MIPS_TIMER_FREQ 30000000 |
| 18 | |
| 19 | /* |
| 20 | * PCI |
| 21 | */ |
| Paul Burton | f5de32a | 2016-09-08 07:47:39 +0100 | [diff] [blame] | 22 | |
| 23 | /* |
| 24 | * Memory map |
| 25 | */ |
| 26 | #ifdef CONFIG_64BIT |
| 27 | # define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 |
| 28 | #else |
| 29 | # define CONFIG_SYS_SDRAM_BASE 0x80000000 |
| 30 | #endif |
| 31 | |
| 32 | #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 |
| 33 | |
| 34 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
| 35 | |
| Paul Burton | f5de32a | 2016-09-08 07:47:39 +0100 | [diff] [blame] | 36 | /* |
| 37 | * Console |
| 38 | */ |
| Paul Burton | f5de32a | 2016-09-08 07:47:39 +0100 | [diff] [blame] | 39 | |
| 40 | /* |
| 41 | * Flash |
| 42 | */ |
| Paul Burton | f5de32a | 2016-09-08 07:47:39 +0100 | [diff] [blame] | 43 | #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 |
| 44 | #define CONFIG_SYS_MAX_FLASH_SECT 1024 |
| 45 | |
| 46 | /* |
| 47 | * Environment |
| 48 | */ |
| Paul Burton | f5de32a | 2016-09-08 07:47:39 +0100 | [diff] [blame] | 49 | |
| 50 | #endif /* __CONFIGS_BOSTON_H__ */ |