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developerb41343a2019-12-31 11:29:26 +08001// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (C) 2019 MediaTek Inc.
4 * Author: Mingming Lee <mingming.lee@mediatek.com>
5 *
6 */
7
8/dts-v1/;
9
10#include <config.h>
11#include "mt8512.dtsi"
12
13/ {
14 #address-cells = <1>;
15 #size-cells = <1>;
16
17 model = "MT8512 BM1 EMMC";
18
19 chosen {
20 stdout-path = &uart0;
21 tick-timer = &timer0;
22 };
23
24 memory@40000000 {
25 device_type = "memory";
26 reg = <0x40000000 0x20000000>;
27 };
28
29 reg_1p8v: regulator-1p8v {
30 compatible = "regulator-fixed";
31 regulator-name = "fixed-1.8V";
32 regulator-min-microvolt = <1800000>;
33 regulator-max-microvolt = <1800000>;
34 regulator-boot-on;
35 regulator-always-on;
36 };
37
38 reg_3p3v: regulator-3p3v {
39 compatible = "regulator-fixed";
40 regulator-name = "fixed-3.3V";
41 regulator-min-microvolt = <3300000>;
42 regulator-max-microvolt = <3300000>;
43 regulator-boot-on;
44 regulator-always-on;
45 };
46};
47
48&mmc0 {
49 pinctrl-names = "default";
50 pinctrl-0 = <&mmc0_pins_default>;
51 bus-width = <8>;
52 max-frequency = <200000000>;
53 cap-mmc-highspeed;
54 mmc-hs200-1_8v;
55 cap-mmc-hw-reset;
56 vmmc-supply = <&reg_3p3v>;
57 vqmmc-supply = <&reg_1p8v>;
58 non-removable;
59 status = "okay";
60};
61
62&pinctrl {
63 mmc0_pins_default: mmc0default {
64 mux {
65 function = "msdc";
66 groups = "msdc0";
67 };
68
69 conf-cmd-data {
70 pins = "MSDC0_CMD", "MSDC0_DAT0", "MSDC0_DAT1",
71 "MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4",
72 "MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7";
73 input-enable;
74 drive-strength = <6>;
75 bias-pull-up;
76 };
77
78 conf-clk {
79 pins = "MSDC0_CLK";
80 drive-strength = <6>;
81 bias-pull-down;
82 };
83
84 conf-rst {
85 pins = "MSDC0_RSTB";
86 bias-pull-up;
87 };
88 };
89
90 uart0_pins: uart0 {
91 mux {
92 function = "uart";
93 groups = "uart0_0_rxd_txd";
94 };
95 };
96};
97
98&uart0 {
99 pinctrl-names = "default";
100 pinctrl-0 = <&uart0_pins>;
101 status = "okay";
102};
103
104&watchdog0 {
105 status = "okay";
106};