Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 1 | /* |
| 2 | * armboot - Startup Code for ARM926EJS CPU-core |
| 3 | * |
| 4 | * Copyright (c) 2003 Texas Instruments |
| 5 | * |
| 6 | * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ |
| 7 | * |
| 8 | * Copyright (c) 2001 Marius Groger <mag@sysgo.de> |
| 9 | * Copyright (c) 2002 Alex Zupke <azu@sysgo.de> |
| 10 | * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> |
| 11 | * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> |
| 12 | * Copyright (c) 2003 Kshitij <kshitij@ti.com> |
| 13 | * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net> |
| 14 | * |
| 15 | * Change to support call back into iMX28 bootrom |
| 16 | * Copyright (c) 2011 Marek Vasut <marek.vasut@gmail.com> |
| 17 | * on behalf of DENX Software Engineering GmbH |
| 18 | * |
| 19 | * See file CREDITS for list of people who contributed to this |
| 20 | * project. |
| 21 | * |
| 22 | * This program is free software; you can redistribute it and/or |
| 23 | * modify it under the terms of the GNU General Public License as |
| 24 | * published by the Free Software Foundation; either version 2 of |
| 25 | * the License, or (at your option) any later version. |
| 26 | * |
| 27 | * This program is distributed in the hope that it will be useful, |
| 28 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 29 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 30 | * GNU General Public License for more details. |
| 31 | * |
| 32 | * You should have received a copy of the GNU General Public License |
| 33 | * along with this program; if not, write to the Free Software |
| 34 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 35 | * MA 02111-1307 USA |
| 36 | */ |
| 37 | |
| 38 | #include <asm-offsets.h> |
| 39 | #include <config.h> |
| 40 | #include <common.h> |
| 41 | #include <version.h> |
| 42 | |
Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 43 | /* |
| 44 | ************************************************************************* |
| 45 | * |
| 46 | * Jump vector table as in table 3.1 in [1] |
| 47 | * |
| 48 | ************************************************************************* |
| 49 | */ |
| 50 | |
| 51 | |
| 52 | .globl _start |
| 53 | _start: |
| 54 | b reset |
Marek Vasut | 5bf48fb | 2011-11-08 23:18:23 +0000 | [diff] [blame] | 55 | b undefined_instruction |
| 56 | b software_interrupt |
| 57 | b prefetch_abort |
| 58 | b data_abort |
| 59 | b not_used |
| 60 | b irq |
| 61 | b fiq |
Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 62 | |
Marek Vasut | 5bf48fb | 2011-11-08 23:18:23 +0000 | [diff] [blame] | 63 | /* |
| 64 | * Vector table, located at address 0x20. |
| 65 | * This table allows the code running AFTER SPL, the U-Boot, to install it's |
| 66 | * interrupt handlers here. The problem is that the U-Boot is loaded into RAM, |
| 67 | * including it's interrupt vectoring table and the table at 0x0 is still the |
| 68 | * SPLs. So if interrupt happens in U-Boot, the SPLs interrupt vectoring table |
| 69 | * is still used. |
| 70 | */ |
| 71 | _vt_reset: |
| 72 | .word _reset |
| 73 | _vt_undefined_instruction: |
| 74 | .word _hang |
| 75 | _vt_software_interrupt: |
| 76 | .word _hang |
| 77 | _vt_prefetch_abort: |
| 78 | .word _hang |
| 79 | _vt_data_abort: |
| 80 | .word _hang |
| 81 | _vt_not_used: |
| 82 | .word _reset |
| 83 | _vt_irq: |
| 84 | .word _hang |
| 85 | _vt_fiq: |
| 86 | .word _hang |
Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 87 | |
Marek Vasut | 5bf48fb | 2011-11-08 23:18:23 +0000 | [diff] [blame] | 88 | reset: |
| 89 | ldr pc, _vt_reset |
| 90 | undefined_instruction: |
| 91 | ldr pc, _vt_undefined_instruction |
| 92 | software_interrupt: |
| 93 | ldr pc, _vt_software_interrupt |
| 94 | prefetch_abort: |
| 95 | ldr pc, _vt_prefetch_abort |
| 96 | data_abort: |
| 97 | ldr pc, _vt_data_abort |
| 98 | not_used: |
| 99 | ldr pc, _vt_not_used |
| 100 | irq: |
| 101 | ldr pc, _vt_irq |
| 102 | fiq: |
| 103 | ldr pc, _vt_fiq |
Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 104 | |
Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 105 | .balignl 16,0xdeadbeef |
| 106 | |
Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 107 | /* |
| 108 | ************************************************************************* |
| 109 | * |
| 110 | * Startup Code (reset vector) |
| 111 | * |
| 112 | * do important init only if we don't start from memory! |
| 113 | * setup Memory and board specific bits prior to relocation. |
| 114 | * relocate armboot to ram |
| 115 | * setup stack |
| 116 | * |
| 117 | ************************************************************************* |
| 118 | */ |
| 119 | |
| 120 | .globl _TEXT_BASE |
| 121 | _TEXT_BASE: |
| 122 | .word CONFIG_SYS_TEXT_BASE |
| 123 | |
| 124 | /* |
| 125 | * These are defined in the board-specific linker script. |
| 126 | * Subtracting _start from them lets the linker put their |
| 127 | * relative position in the executable instead of leaving |
| 128 | * them null. |
| 129 | */ |
| 130 | .globl _bss_start_ofs |
| 131 | _bss_start_ofs: |
| 132 | .word __bss_start - _start |
| 133 | |
| 134 | .globl _bss_end_ofs |
| 135 | _bss_end_ofs: |
| 136 | .word __bss_end__ - _start |
| 137 | |
| 138 | .globl _end_ofs |
| 139 | _end_ofs: |
| 140 | .word _end - _start |
| 141 | |
| 142 | #ifdef CONFIG_USE_IRQ |
| 143 | /* IRQ stack memory (calculated at run-time) */ |
| 144 | .globl IRQ_STACK_START |
| 145 | IRQ_STACK_START: |
| 146 | .word 0x0badc0de |
| 147 | |
| 148 | /* IRQ stack memory (calculated at run-time) */ |
| 149 | .globl FIQ_STACK_START |
| 150 | FIQ_STACK_START: |
| 151 | .word 0x0badc0de |
| 152 | #endif |
| 153 | |
| 154 | /* IRQ stack memory (calculated at run-time) + 8 bytes */ |
| 155 | .globl IRQ_STACK_START_IN |
| 156 | IRQ_STACK_START_IN: |
| 157 | .word 0x0badc0de |
| 158 | |
| 159 | /* |
| 160 | * the actual reset code |
| 161 | */ |
| 162 | |
Marek Vasut | 5bf48fb | 2011-11-08 23:18:23 +0000 | [diff] [blame] | 163 | _reset: |
Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 164 | /* |
| 165 | * Store all registers on old stack pointer, this will allow us later to |
| 166 | * return to the BootROM and let the BootROM load U-Boot into RAM. |
| 167 | */ |
| 168 | push {r0-r12,r14} |
| 169 | |
Matthias Fuchs | dcb3a8a | 2012-02-06 23:32:42 +0000 | [diff] [blame] | 170 | /* save control register c1 */ |
| 171 | mrc p15, 0, r0, c1, c0, 0 |
| 172 | push {r0} |
| 173 | |
Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 174 | /* |
Matthias Fuchs | dcb3a8a | 2012-02-06 23:32:42 +0000 | [diff] [blame] | 175 | * set the cpu to SVC32 mode and store old CPSR register content |
Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 176 | */ |
| 177 | mrs r0,cpsr |
Matthias Fuchs | dcb3a8a | 2012-02-06 23:32:42 +0000 | [diff] [blame] | 178 | push {r0} |
Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 179 | bic r0,r0,#0x1f |
| 180 | orr r0,r0,#0xd3 |
| 181 | msr cpsr,r0 |
| 182 | |
Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 183 | bl board_init_ll |
| 184 | |
Matthias Fuchs | dcb3a8a | 2012-02-06 23:32:42 +0000 | [diff] [blame] | 185 | /* |
| 186 | * restore bootrom's cpu mode (especially FIQ) |
| 187 | */ |
| 188 | pop {r0} |
| 189 | msr cpsr,r0 |
| 190 | |
| 191 | /* |
| 192 | * restore c1 register |
| 193 | * (especially set exception vector location back to |
| 194 | * bootrom space which is required by bootrom for USB boot) |
| 195 | */ |
| 196 | pop {r0} |
| 197 | mcr p15, 0, r0, c1, c0, 0 |
| 198 | |
Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 199 | pop {r0-r12,r14} |
| 200 | bx lr |
| 201 | |
Marek Vasut | 5bf48fb | 2011-11-08 23:18:23 +0000 | [diff] [blame] | 202 | _hang: |
Marek Vasut | 926227e | 2011-11-08 23:18:21 +0000 | [diff] [blame] | 203 | ldr sp, _TEXT_BASE /* switch to abort stack */ |
| 204 | 1: |
| 205 | bl 1b /* hang and never return */ |