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git01.mediatek.com / filogic / uboot / ed6f48e92827e0672630f9fdf3a5709d2d10b7db / . / configs / rock64-rk3328_defconfig
blob: 9d77dfb7098ace6bf9992472af858e87fde37f8c [file] [log] [blame]
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=24000000
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]5CONFIG_SPL_GPIO=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]7CONFIG_SF_DEFAULT_SPEED=20000000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]8CONFIG_ENV_OFFSET=0x3F8000
Jonas Karlmaned6f48e2024-05-04 19:42:55 +0000[diff] [blame^]9CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3328-rock64"
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]10CONFIG_DM_RESET=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]11CONFIG_ROCKCHIP_RK3328=y
Jonas Karlmancb3ed622024-02-17 00:22:40 +0000[diff] [blame]12CONFIG_ROCKCHIP_SPI_IMAGE=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]13CONFIG_DEBUG_UART_BASE=0xFF130000
14CONFIG_DEBUG_UART_CLOCK=24000000
Jonas Karlmancb3ed622024-02-17 00:22:40 +0000[diff] [blame]15CONFIG_SPL_SPI_FLASH_SUPPORT=y
16CONFIG_SPL_SPI=y
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]17CONFIG_SYS_LOAD_ADDR=0x800800
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]18CONFIG_DEBUG_UART=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]19CONFIG_FIT=y
20CONFIG_FIT_VERBOSE=y
Jonas Karlman385e7ca2024-02-17 00:22:29 +0000[diff] [blame]21CONFIG_SPL_FIT_SIGNATURE=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]22CONFIG_SPL_LOAD_FIT=y
Jonas Karlman385e7ca2024-02-17 00:22:29 +0000[diff] [blame]23CONFIG_LEGACY_IMAGE_FORMAT=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]24CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb"
25# CONFIG_DISPLAY_CPUINFO is not set
26CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]27CONFIG_SPL_MAX_SIZE=0x40000
28CONFIG_SPL_PAD_TO=0x7f8000
Kever Yang1b0675a2019-08-20 11:47:00 +0800[diff] [blame]29# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Simon Glasse91ac4c2021-07-10 21:14:24 -0600[diff] [blame]30CONFIG_SPL_POWER=y
Jonas Karlmancb3ed622024-02-17 00:22:40 +0000[diff] [blame]31CONFIG_SPL_SPI_LOAD=y
32CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]33CONFIG_SPL_ATF=y
34CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]35CONFIG_CMD_BOOTZ=y
Jonas Karlman385e7ca2024-02-17 00:22:29 +0000[diff] [blame]36CONFIG_CMD_GPIO=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]37CONFIG_CMD_GPT=y
38CONFIG_CMD_MMC=y
Jonas Karlman385e7ca2024-02-17 00:22:29 +0000[diff] [blame]39CONFIG_CMD_POWEROFF=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]40CONFIG_CMD_USB=y
41# CONFIG_CMD_SETEXPR is not set
42CONFIG_CMD_TIME=y
Jonas Karlman385e7ca2024-02-17 00:22:29 +0000[diff] [blame]43CONFIG_CMD_REGULATOR=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]44CONFIG_SPL_OF_CONTROL=y
Matwey V. Kornilov65785a22019-08-02 10:40:03 +0300[diff] [blame]45CONFIG_TPL_OF_CONTROL=y
Kurt Miller2e208462020-05-13 15:55:20 -0400[diff] [blame]46CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Matwey V. Kornilov65785a22019-08-02 10:40:03 +0300[diff] [blame]47CONFIG_TPL_OF_PLATDATA=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]48CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]49CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinieb1f9092020-07-24 17:14:47 -0400[diff] [blame]50CONFIG_SYS_MMC_ENV_DEV=1
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]51CONFIG_TPL_DM=y
Jonas Karlman385e7ca2024-02-17 00:22:29 +0000[diff] [blame]52CONFIG_SPL_DM_SEQ_ALIAS=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]53CONFIG_REGMAP=y
54CONFIG_SPL_REGMAP=y
Matwey V. Kornilov65785a22019-08-02 10:40:03 +0300[diff] [blame]55CONFIG_TPL_REGMAP=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]56CONFIG_SYSCON=y
57CONFIG_SPL_SYSCON=y
Matwey V. Kornilov65785a22019-08-02 10:40:03 +0300[diff] [blame]58CONFIG_TPL_SYSCON=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]59CONFIG_CLK=y
60CONFIG_SPL_CLK=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]61CONFIG_ROCKCHIP_GPIO=y
62CONFIG_SYS_I2C_ROCKCHIP=y
63CONFIG_MMC_DW=y
64CONFIG_MMC_DW_ROCKCHIP=y
Jonas Karlmancb3ed622024-02-17 00:22:40 +0000[diff] [blame]65CONFIG_SPI_FLASH_SFDP_SUPPORT=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]66CONFIG_SPI_FLASH_GIGADEVICE=y
Jonas Karlmancb3ed622024-02-17 00:22:40 +0000[diff] [blame]67CONFIG_SPI_FLASH_MACRONIX=y
68CONFIG_SPI_FLASH_WINBOND=y
69CONFIG_SPI_FLASH_XTX=y
Jonas Karlman385e7ca2024-02-17 00:22:29 +0000[diff] [blame]70CONFIG_PHY_REALTEK=y
71CONFIG_DM_ETH_PHY=y
72CONFIG_PHY_GIGE=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]73CONFIG_ETH_DESIGNWARE=y
74CONFIG_GMAC_ROCKCHIP=y
Jagan Tekibf0e1342023-06-06 22:39:18 +0530[diff] [blame]75CONFIG_PHY_ROCKCHIP_INNO_USB2=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]76CONFIG_PINCTRL=y
77CONFIG_SPL_PINCTRL=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]78CONFIG_DM_PMIC=y
79CONFIG_PMIC_RK8XX=y
Kurt Miller2e208462020-05-13 15:55:20 -0400[diff] [blame]80CONFIG_SPL_DM_REGULATOR=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]81CONFIG_DM_REGULATOR_FIXED=y
Tom Rini63683ef2020-05-26 08:32:25 -0400[diff] [blame]82CONFIG_SPL_DM_REGULATOR_FIXED=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]83CONFIG_REGULATOR_RK8XX=y
84CONFIG_PWM_ROCKCHIP=y
85CONFIG_RAM=y
86CONFIG_SPL_RAM=y
Matwey V. Kornilov65785a22019-08-02 10:40:03 +0300[diff] [blame]87CONFIG_TPL_RAM=y
Tom Rinic4359852023-10-02 10:35:27 -0400[diff] [blame]88CONFIG_DM_RNG=y
89CONFIG_RNG_ROCKCHIP=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]90CONFIG_BAUDRATE=1500000
91CONFIG_DEBUG_UART_SHIFT=2
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]92CONFIG_SYS_NS16550_MEM32=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]93CONFIG_ROCKCHIP_SPI=y
Tom Rini4c66e9a2020-11-09 14:23:01 -0500[diff] [blame]94CONFIG_SYSINFO=y
95CONFIG_SYSINFO_SMBIOS=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]96CONFIG_SYSRESET=y
YouMin Chenb9f7df32019-11-15 11:04:44 +0800[diff] [blame]97# CONFIG_TPL_SYSRESET is not set
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]98CONFIG_USB=y
99CONFIG_USB_XHCI_HCD=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]100CONFIG_USB_EHCI_HCD=y
101CONFIG_USB_EHCI_GENERIC=y
102CONFIG_USB_OHCI_HCD=y
103CONFIG_USB_OHCI_GENERIC=y
104CONFIG_USB_DWC2=y
105CONFIG_USB_DWC3=y
Jagan Teki94e59a12023-06-06 22:39:15 +0530[diff] [blame]106CONFIG_USB_DWC3_GENERIC=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]107CONFIG_SPL_TINY_MEMSET=y
Matwey V. Kornilov65785a22019-08-02 10:40:03 +0300[diff] [blame]108CONFIG_TPL_TINY_MEMSET=y
Matwey V. Kornilovc1d22df2019-06-09 00:27:17 +0300[diff] [blame]109CONFIG_ERRNO_STR=y