| Michal Simek | 316a9f2 | 2018-03-28 15:00:25 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm017_dc3" |
| 3 | CONFIG_ARCH_ZYNQMP=y |
| 4 | CONFIG_SYS_TEXT_BASE=0x8000000 |
| 5 | CONFIG_SYS_MALLOC_F_LEN=0x8000 |
| 6 | CONFIG_SPL=y |
| Michal Simek | a932ae7 | 2018-06-04 08:33:30 +0200 | [diff] [blame] | 7 | CONFIG_DEBUG_UART_BASE=0xff010000 |
| 8 | CONFIG_DEBUG_UART_CLOCK=100000000 |
| Michal Simek | 316a9f2 | 2018-03-28 15:00:25 +0200 | [diff] [blame] | 9 | CONFIG_ZYNQMP_USB=y |
| Michal Simek | 316a9f2 | 2018-03-28 15:00:25 +0200 | [diff] [blame] | 10 | CONFIG_DEBUG_UART=y |
| 11 | CONFIG_AHCI=y |
| 12 | CONFIG_DISTRO_DEFAULTS=y |
| 13 | CONFIG_FIT=y |
| 14 | CONFIG_FIT_VERBOSE=y |
| 15 | CONFIG_SPL_LOAD_FIT=y |
| 16 | # CONFIG_DISPLAY_CPUINFO is not set |
| Michal Simek | 316a9f2 | 2018-03-28 15:00:25 +0200 | [diff] [blame] | 17 | CONFIG_SPL_OS_BOOT=y |
| 18 | CONFIG_SPL_RAM_SUPPORT=y |
| 19 | CONFIG_SPL_RAM_DEVICE=y |
| 20 | CONFIG_SPL_ATF=y |
| 21 | CONFIG_SYS_PROMPT="ZynqMP> " |
| 22 | CONFIG_CMD_MEMTEST=y |
| 23 | CONFIG_CMD_CLK=y |
| 24 | CONFIG_CMD_DFU=y |
| 25 | # CONFIG_CMD_FLASH is not set |
| 26 | CONFIG_CMD_FPGA_LOADBP=y |
| 27 | CONFIG_CMD_FPGA_LOADP=y |
| 28 | CONFIG_CMD_GPIO=y |
| 29 | CONFIG_CMD_GPT=y |
| 30 | CONFIG_CMD_I2C=y |
| 31 | CONFIG_CMD_MMC=y |
| 32 | CONFIG_CMD_USB=y |
| 33 | CONFIG_CMD_TFTPPUT=y |
| 34 | CONFIG_CMD_TIME=y |
| 35 | CONFIG_CMD_TIMER=y |
| 36 | CONFIG_CMD_EXT4_WRITE=y |
| Michal Simek | 316a9f2 | 2018-03-28 15:00:25 +0200 | [diff] [blame] | 37 | CONFIG_SPL_OF_CONTROL=y |
| 38 | CONFIG_OF_EMBED=y |
| Tom Rini | 7406032 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 39 | CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm017-dc3" |
| Michal Simek | 316a9f2 | 2018-03-28 15:00:25 +0200 | [diff] [blame] | 40 | CONFIG_NET_RANDOM_ETHADDR=y |
| 41 | CONFIG_SPL_DM=y |
| 42 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| 43 | CONFIG_SCSI_AHCI=y |
| 44 | CONFIG_SATA_CEVA=y |
| 45 | CONFIG_CLK_ZYNQMP=y |
| 46 | CONFIG_DFU_RAM=y |
| 47 | CONFIG_FPGA_XILINX=y |
| 48 | CONFIG_FPGA_ZYNQMPPL=y |
| 49 | CONFIG_DM_GPIO=y |
| 50 | CONFIG_DM_I2C=y |
| 51 | CONFIG_SYS_I2C_CADENCE=y |
| 52 | CONFIG_MISC=y |
| Michal Simek | 316a9f2 | 2018-03-28 15:00:25 +0200 | [diff] [blame] | 53 | CONFIG_MMC_SDHCI=y |
| 54 | CONFIG_MMC_SDHCI_ZYNQ=y |
| Adam Ford | ac44a30 | 2018-07-07 22:18:22 -0500 | [diff] [blame] | 55 | CONFIG_MTD_DEVICE=y |
| Michal Simek | 316a9f2 | 2018-03-28 15:00:25 +0200 | [diff] [blame] | 56 | CONFIG_NAND=y |
| 57 | CONFIG_NAND_ARASAN=y |
| 58 | CONFIG_PHY_MARVELL=y |
| 59 | CONFIG_PHY_NATSEMI=y |
| 60 | CONFIG_PHY_REALTEK=y |
| 61 | CONFIG_PHY_TI=y |
| 62 | CONFIG_PHY_VITESSE=y |
| 63 | CONFIG_PHY_FIXED=y |
| Michal Simek | 316a9f2 | 2018-03-28 15:00:25 +0200 | [diff] [blame] | 64 | CONFIG_PHY_GIGE=y |
| Adam Ford | 5370547 | 2018-07-20 23:03:57 -0500 | [diff] [blame] | 65 | CONFIG_MII=y |
| Michal Simek | 316a9f2 | 2018-03-28 15:00:25 +0200 | [diff] [blame] | 66 | CONFIG_ZYNQ_GEM=y |
| 67 | CONFIG_SCSI=y |
| 68 | CONFIG_DM_SCSI=y |
| 69 | CONFIG_DEBUG_UART_ZYNQ=y |
| Michal Simek | 316a9f2 | 2018-03-28 15:00:25 +0200 | [diff] [blame] | 70 | CONFIG_DEBUG_UART_ANNOUNCE=y |
| 71 | CONFIG_ZYNQ_SERIAL=y |
| 72 | CONFIG_USB=y |
| 73 | CONFIG_USB_XHCI_HCD=y |
| 74 | CONFIG_USB_XHCI_DWC3=y |
| 75 | CONFIG_USB_XHCI_ZYNQMP=y |
| 76 | CONFIG_USB_DWC3=y |
| 77 | CONFIG_USB_DWC3_GADGET=y |
| Michal Simek | 34c19ab | 2018-05-18 13:15:08 +0200 | [diff] [blame] | 78 | CONFIG_USB_DWC3_GENERIC=y |
| Michal Simek | 316a9f2 | 2018-03-28 15:00:25 +0200 | [diff] [blame] | 79 | CONFIG_USB_ULPI_VIEWPORT=y |
| 80 | CONFIG_USB_ULPI=y |
| Michal Simek | 316a9f2 | 2018-03-28 15:00:25 +0200 | [diff] [blame] | 81 | CONFIG_USB_GADGET=y |
| 82 | CONFIG_USB_GADGET_DOWNLOAD=y |
| 83 | CONFIG_EFI_LOADER_BOUNCE_BUFFER=y |