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Stelian Pop61e69d72008-05-08 20:52:22 +02001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9261EK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/* ARM asynchronous clock */
Stelian Popad1aa1c2008-11-07 13:55:14 +010031#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
Jean-Christophe PLAGNIOL-VILLARD1d4a3792009-04-16 21:30:48 +020032#define CONFIG_SYS_HZ 1000
Stelian Pop61e69d72008-05-08 20:52:22 +020033
Stelian Pop61e69d72008-05-08 20:52:22 +020034#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
Sedji Gaouaou97a031b2009-06-25 17:04:15 +020035#ifdef CONFIG_AT91SAM9G10EK
36#define CONFIG_AT91SAM9G10 1 /* It's an Atmel AT91SAM9G10 SoC*/
37#else
Stelian Pop61e69d72008-05-08 20:52:22 +020038#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/
Sedji Gaouaou97a031b2009-06-25 17:04:15 +020039#endif
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020040#define CONFIG_ARCH_CPU_INIT
Stelian Pop61e69d72008-05-08 20:52:22 +020041#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
42
43#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
44#define CONFIG_SETUP_MEMORY_TAGS 1
45#define CONFIG_INITRD_TAG 1
46
47#define CONFIG_SKIP_LOWLEVEL_INIT
48#define CONFIG_SKIP_RELOCATE_UBOOT
49
50/*
51 * Hardware drivers
52 */
53#define CONFIG_ATMEL_USART 1
54#undef CONFIG_USART0
55#undef CONFIG_USART1
56#undef CONFIG_USART2
57#define CONFIG_USART3 1 /* USART 3 is DBGU */
58
Stelian Pop905ed222008-05-08 14:52:30 +020059/* LCD */
60#define CONFIG_LCD 1
61#define LCD_BPP LCD_COLOR8
62#define CONFIG_LCD_LOGO 1
63#undef LCD_TEST_PATTERN
64#define CONFIG_LCD_INFO 1
65#define CONFIG_LCD_INFO_BELOW_LOGO 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020066#define CONFIG_SYS_WHITE_ON_BLACK 1
Stelian Pop905ed222008-05-08 14:52:30 +020067#define CONFIG_ATMEL_LCD 1
Sedji Gaouaou97a031b2009-06-25 17:04:15 +020068#ifdef CONFIG_AT91SAM9261EK
Stelian Pop905ed222008-05-08 14:52:30 +020069#define CONFIG_ATMEL_LCD_BGR555 1
Sedji Gaouaou97a031b2009-06-25 17:04:15 +020070#else
71#define CONFIG_AT91SAM9G10_LCD_BASE 0x23E00000 /* LCD is no more in SRAM */
72#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020073#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
Stelian Pop905ed222008-05-08 14:52:30 +020074
Jean-Christophe PLAGNIOL-VILLARD476d10e2009-03-21 21:08:00 +010075/* LED */
76#define CONFIG_AT91_LED
77#define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */
78#define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
79#define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
80
Stelian Pop61e69d72008-05-08 20:52:22 +020081#define CONFIG_BOOTDELAY 3
82
Stelian Pop61e69d72008-05-08 20:52:22 +020083/*
84 * BOOTP options
85 */
86#define CONFIG_BOOTP_BOOTFILESIZE 1
87#define CONFIG_BOOTP_BOOTPATH 1
88#define CONFIG_BOOTP_GATEWAY 1
89#define CONFIG_BOOTP_HOSTNAME 1
90
91/*
92 * Command line configuration.
93 */
94#include <config_cmd_default.h>
95#undef CONFIG_CMD_BDI
Stelian Pop61e69d72008-05-08 20:52:22 +020096#undef CONFIG_CMD_FPGA
Wolfgang Denk85c25df2009-04-01 23:34:12 +020097#undef CONFIG_CMD_IMI
Stelian Pop61e69d72008-05-08 20:52:22 +020098#undef CONFIG_CMD_IMLS
Wolfgang Denk85c25df2009-04-01 23:34:12 +020099#undef CONFIG_CMD_LOADS
100#undef CONFIG_CMD_SOURCE
Stelian Pop61e69d72008-05-08 20:52:22 +0200101
102#define CONFIG_CMD_PING 1
103#define CONFIG_CMD_DHCP 1
104#define CONFIG_CMD_NAND 1
105#define CONFIG_CMD_USB 1
106
107/* SDRAM */
108#define CONFIG_NR_DRAM_BANKS 1
109#define PHYS_SDRAM 0x20000000
110#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
111
112/* DataFlash */
Jean-Christophe PLAGNIOL-VILLARDe5437ac2009-03-27 23:26:44 +0100113#define CONFIG_ATMEL_DATAFLASH_SPI
Stelian Pop61e69d72008-05-08 20:52:22 +0200114#define CONFIG_HAS_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200115#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
116#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
117#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
118#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
Stelian Pop61e69d72008-05-08 20:52:22 +0200119#define AT91_SPI_CLK 15000000
120#define DATAFLASH_TCSS (0x1a << 16)
121#define DATAFLASH_TCHS (0x1 << 24)
122
123/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +0100124#ifdef CONFIG_CMD_NAND
125#define CONFIG_NAND_ATMEL
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200126#define CONFIG_SYS_MAX_NAND_DEVICE 1
127#define CONFIG_SYS_NAND_BASE 0x40000000
128#define CONFIG_SYS_NAND_DBW_8 1
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +0100129/* our ALE is AD22 */
130#define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
131/* our CLE is AD21 */
132#define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
133#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
134#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
Wolfgang Denk1f797742009-07-18 21:52:24 +0200135
136#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +0100137#endif
Stelian Pop61e69d72008-05-08 20:52:22 +0200138
139/* NOR flash - no real flash on this board */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200140#define CONFIG_SYS_NO_FLASH 1
Stelian Pop61e69d72008-05-08 20:52:22 +0200141
142/* Ethernet */
Remy Bohmer7eefd922009-05-02 21:49:18 +0200143#define CONFIG_NET_MULTI 1
Stelian Pop61e69d72008-05-08 20:52:22 +0200144#define CONFIG_DRIVER_DM9000 1
145#define CONFIG_DM9000_BASE 0x30000000
146#define DM9000_IO CONFIG_DM9000_BASE
147#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
148#define CONFIG_DM9000_USE_16BIT 1
Remy Bohmercd9a36c2009-05-03 12:11:40 +0200149#define CONFIG_DM9000_NO_SROM 1
Stelian Pop61e69d72008-05-08 20:52:22 +0200150#define CONFIG_NET_RETRY_COUNT 20
151#define CONFIG_RESET_PHY_R 1
152
153/* USB */
Jean-Christophe PLAGNIOL-VILLARDd42643f2009-03-27 23:26:44 +0100154#define CONFIG_USB_ATMEL
Stelian Pop61e69d72008-05-08 20:52:22 +0200155#define CONFIG_USB_OHCI_NEW 1
Stelian Pop61e69d72008-05-08 20:52:22 +0200156#define CONFIG_DOS_PARTITION 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200157#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
158#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
Sedji Gaouaou97a031b2009-06-25 17:04:15 +0200159#ifdef CONFIG_AT91SAM9G10EK
160#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
161#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200162#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
Sedji Gaouaou97a031b2009-06-25 17:04:15 +0200163#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200164#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Stelian Pop61e69d72008-05-08 20:52:22 +0200165#define CONFIG_USB_STORAGE 1
Stelian Pope9fe2cf2008-11-09 00:14:46 +0100166#define CONFIG_CMD_FAT 1
Stelian Pop61e69d72008-05-08 20:52:22 +0200167
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200168#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Pop61e69d72008-05-08 20:52:22 +0200169
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200170#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
171#define CONFIG_SYS_MEMTEST_END 0x23e00000
Stelian Pop61e69d72008-05-08 20:52:22 +0200172
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200173#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
Stelian Pop61e69d72008-05-08 20:52:22 +0200174
175/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Jean-Christophe PLAGNIOL-VILLARD2b14d2b2008-09-10 22:47:58 +0200176#define CONFIG_ENV_IS_IN_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200177#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Nicolas Ferre09e10902008-12-06 13:11:14 +0100178#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200179#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200180#define CONFIG_ENV_SIZE 0x4200
Stelian Pop61e69d72008-05-08 20:52:22 +0200181#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
182#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
183 "root=/dev/mtdblock0 " \
184 "mtdparts=at91_nand:-(root) " \
185 "rw rootfstype=jffs2"
186
Nicolas Ferre09e10902008-12-06 13:11:14 +0100187#elif CONFIG_SYS_USE_DATAFLASH_CS3
188
189/* bootstrap + u-boot + env + linux in dataflash on CS3 */
190#define CONFIG_ENV_IS_IN_DATAFLASH 1
191#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
192#define CONFIG_ENV_OFFSET 0x4200
193#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
194#define CONFIG_ENV_SIZE 0x4200
195#define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm"
196#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
197 "root=/dev/mtdblock0 " \
198 "mtdparts=at91_nand:-(root) " \
199 "rw rootfstype=jffs2"
200
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200201#else /* CONFIG_SYS_USE_NANDFLASH */
Stelian Pop61e69d72008-05-08 20:52:22 +0200202
203/* bootstrap + u-boot + env + linux in nandflash */
Jean-Christophe PLAGNIOL-VILLARDdda84dd2008-09-10 22:47:58 +0200204#define CONFIG_ENV_IS_IN_NAND 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200205#define CONFIG_ENV_OFFSET 0x60000
206#define CONFIG_ENV_OFFSET_REDUND 0x80000
207#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
Stelian Pop61e69d72008-05-08 20:52:22 +0200208#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
209#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
210 "root=/dev/mtdblock5 " \
211 "mtdparts=at91_nand:128k(bootstrap)ro," \
212 "256k(uboot)ro,128k(env1)ro," \
213 "128k(env2)ro,2M(linux),-(root) " \
214 "rw rootfstype=jffs2"
215
216#endif
217
218#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200219#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
Stelian Pop61e69d72008-05-08 20:52:22 +0200220
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200221#define CONFIG_SYS_PROMPT "U-Boot> "
222#define CONFIG_SYS_CBSIZE 256
223#define CONFIG_SYS_MAXARGS 16
224#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
225#define CONFIG_SYS_LONGHELP 1
Stelian Pop61e69d72008-05-08 20:52:22 +0200226#define CONFIG_CMDLINE_EDITING 1
227
Stelian Pop61e69d72008-05-08 20:52:22 +0200228/*
229 * Size of malloc() pool
230 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200231#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
232#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
Stelian Pop61e69d72008-05-08 20:52:22 +0200233
234#define CONFIG_STACKSIZE (32*1024) /* regular stack */
235
236#ifdef CONFIG_USE_IRQ
237#error CONFIG_USE_IRQ not supported
238#endif
239
240#endif