blob: ce86600e55624e00dd099bfef68c8fa7521d05fc [file] [log] [blame]
Vignesh Raghavendraa5552862020-07-07 13:43:33 +05301// SPDX-License-Identifier: GPL-2.0
2/*
Nishanth Menoneaa39c62023-11-01 15:56:03 -05003 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com
Vignesh Raghavendraa5552862020-07-07 13:43:33 +05304 * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
5 */
6
7#include <linux/kernel.h>
8
9#include "k3-psil-priv.h"
10
11#define PSIL_ETHERNET(x) \
12 { \
13 .thread_id = x, \
14 .ep_config = { \
15 .ep_type = PSIL_EP_NATIVE, \
16 .pkt_mode = 1, \
17 .needs_epib = 1, \
18 .psd_size = 16, \
19 }, \
20 }
21
22/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
23static struct psil_ep am654_src_ep_map[] = {
24 /* PRU_ICSSG0 */
25 PSIL_ETHERNET(0x4100),
26 PSIL_ETHERNET(0x4101),
27 PSIL_ETHERNET(0x4102),
28 PSIL_ETHERNET(0x4103),
29 /* PRU_ICSSG1 */
30 PSIL_ETHERNET(0x4200),
31 PSIL_ETHERNET(0x4201),
32 PSIL_ETHERNET(0x4202),
33 PSIL_ETHERNET(0x4203),
34 /* PRU_ICSSG2 */
35 PSIL_ETHERNET(0x4300),
36 PSIL_ETHERNET(0x4301),
37 PSIL_ETHERNET(0x4302),
38 PSIL_ETHERNET(0x4303),
39 /* CPSW0 */
40 PSIL_ETHERNET(0x7000),
41};
42
43/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
44static struct psil_ep am654_dst_ep_map[] = {
45 /* PRU_ICSSG0 */
46 PSIL_ETHERNET(0xc100),
Vignesh Raghavendra18f39de2021-05-10 20:06:05 +053047 /* PSIL: 0xc101 - 0xc103 unused */
Vignesh Raghavendraa5552862020-07-07 13:43:33 +053048 PSIL_ETHERNET(0xc104),
Vignesh Raghavendra18f39de2021-05-10 20:06:05 +053049 /* PSIL: 0xc105 - 0xc107 unused */
Vignesh Raghavendraa5552862020-07-07 13:43:33 +053050 /* PRU_ICSSG1 */
51 PSIL_ETHERNET(0xc200),
Vignesh Raghavendra18f39de2021-05-10 20:06:05 +053052 /* PSIL: 0xc201 - 0xc203 unused */
Vignesh Raghavendraa5552862020-07-07 13:43:33 +053053 PSIL_ETHERNET(0xc204),
Vignesh Raghavendra18f39de2021-05-10 20:06:05 +053054 /* PSIL: 0xc205 - 0xc207 unused */
Vignesh Raghavendraa5552862020-07-07 13:43:33 +053055 /* PRU_ICSSG2 */
56 PSIL_ETHERNET(0xc300),
Vignesh Raghavendra18f39de2021-05-10 20:06:05 +053057 /* PSIL: 0xc301 - 0xc303 unused */
Vignesh Raghavendraa5552862020-07-07 13:43:33 +053058 PSIL_ETHERNET(0xc304),
Vignesh Raghavendra18f39de2021-05-10 20:06:05 +053059 /* PSIL: 0xc305 - 0xc307 unused */
Vignesh Raghavendraa5552862020-07-07 13:43:33 +053060 /* CPSW0 */
61 PSIL_ETHERNET(0xf000),
Vignesh Raghavendra18f39de2021-05-10 20:06:05 +053062 /* PSIL: 0xf001 - 0xf007 unused */
Vignesh Raghavendraa5552862020-07-07 13:43:33 +053063};
64
65struct psil_ep_map am654_ep_map = {
66 .name = "am654",
67 .src = am654_src_ep_map,
68 .src_count = ARRAY_SIZE(am654_src_ep_map),
69 .dst = am654_dst_ep_map,
70 .dst_count = ARRAY_SIZE(am654_dst_ep_map),
71};