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Philipp Tomsichc2448712017-03-15 12:08:44 +01001/*
2 * Copyright 2017 Theobroma Systems Design und Consulting GmbH
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7/*
8 * Execution starts on the instruction following this 4-byte header
Kever Yangb8122862017-10-10 16:21:02 +02009 * (containing the magic 'RK30', 'RK31', 'RK32' or 'RK33'). This
10 * magic constant will be written into the final image by the rkimage
11 * tool, but we need to reserve space for it here.
Philipp Tomsichc2448712017-03-15 12:08:44 +010012 *
13 * To make life easier for everyone, we build the SPL binary with
14 * space for this 4-byte header already included in the binary.
15 */
Philipp Tomsichc2448712017-03-15 12:08:44 +010016#ifdef CONFIG_SPL_BUILD
Philipp Tomsich728aae42017-07-11 21:04:45 +020017 /*
18 * We need to add 4 bytes of space for the 'RK33' at the
19 * beginning of the executable. However, as we want to keep
20 * this generic and make it applicable to builds that are like
21 * the RK3368 (TPL needs this, SPL doesn't) or the RK3399 (no
Philipp Tomsich9f1a4472017-10-10 16:21:10 +020022 * TPL, but extra space needed in the SPL), we simply insert
23 * a branch-to-next-instruction-word with the expectation that
24 * the first one may be overwritten, if this is the first stage
25 * contained in the final image created with mkimage)...
Philipp Tomsich728aae42017-07-11 21:04:45 +020026 */
Philipp Tomsich9f1a4472017-10-10 16:21:10 +020027 b 1f /* if overwritten, entry-address is at the next word */
281:
29#endif
30#if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
31 adr r3, entry_counter
32 ldr r0, [r3]
33 cmp r0, #1 /* check if entry_counter == 1 */
34 beq reset /* regular bootup */
35 add r0, #1
36 str r0, [r3] /* increment the entry_counter in memory */
37 mov r0, #0 /* return 0 to the BROM to signal 'OK' */
38 bx lr /* return control to the BROM */
39entry_counter:
40 .word 0
Philipp Tomsichc2448712017-03-15 12:08:44 +010041#endif
Kever Yange9277e42017-12-18 15:05:41 +080042
43#if (defined(CONFIG_SPL_BUILD) || defined(CONFIG_ARM64))
44 /* U-Boot proper of armv7 do not need this */
Philipp Tomsichc2448712017-03-15 12:08:44 +010045 b reset
Kever Yange9277e42017-12-18 15:05:41 +080046#endif
47
Kever Yangb8122862017-10-10 16:21:02 +020048#if !defined(CONFIG_ARM64)
49 /*
50 * For armv7, the addr '_start' will used as vector start address
51 * and write to VBAR register, which needs to aligned to 0x20.
52 */
Philipp Tomsich9f1a4472017-10-10 16:21:10 +020053 .align(5), 0x0
Kever Yangb8122862017-10-10 16:21:02 +020054_start:
55 ARM_VECTORS
56#endif
Kever Yange484f772017-04-20 17:03:46 +080057
Kever Yange9277e42017-12-18 15:05:41 +080058#if defined(CONFIG_SPL_BUILD) && (CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
Kever Yange484f772017-04-20 17:03:46 +080059 .space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */
60#endif