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Fabio Estevam5ffd3c52011-12-20 05:46:34 +00001/*
2 * (C) Copyright 2011 Freescale Semiconductor, Inc.
3 * Author: Fabio Estevam <fabio.estevam@freescale.com>
4 *
5 * Based on m28evk.h:
6 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
7 * on behalf of DENX Software Engineering GmbH
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
Otavio Salvador599f1b82012-05-12 13:40:16 +000019#ifndef __MX28EVK_CONFIG_H__
20#define __MX28EVK_CONFIG_H__
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000021
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000022/*
23 * SoC configurations
24 */
25#define CONFIG_MX28 /* i.MX28 SoC */
Otavio Salvadorc6152242012-08-18 07:25:26 +000026
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000027#define CONFIG_MXS_GPIO /* GPIO control */
28#define CONFIG_SYS_HZ 1000 /* Ticks per second */
29
30#define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK
31
Otavio Salvadorc6152242012-08-18 07:25:26 +000032#include <asm/arch/regs-base.h>
33
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000034#define CONFIG_SYS_NO_FLASH
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000035#define CONFIG_BOARD_EARLY_INIT_F
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000036#define CONFIG_ARCH_MISC_INIT
37
38/*
39 * SPL
40 */
41#define CONFIG_SPL
42#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
Otavio Salvador29c70a82012-08-05 09:05:29 +000043#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
44#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000045#define CONFIG_SPL_LIBCOMMON_SUPPORT
46#define CONFIG_SPL_LIBGENERIC_SUPPORT
Marek Vasutb28fe462012-05-01 11:09:45 +000047#define CONFIG_SPL_GPIO_SUPPORT
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000048
49/*
50 * U-Boot Commands
51 */
52#include <config_cmd_default.h>
53#define CONFIG_DISPLAY_CPUINFO
54#define CONFIG_DOS_PARTITION
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000055
56#define CONFIG_CMD_CACHE
Matthias Fuchs5c4b3432012-01-18 01:33:07 +000057#define CONFIG_CMD_DATE
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000058#define CONFIG_CMD_DHCP
Otavio Salvador9bd17f92012-05-12 13:40:13 +000059#define CONFIG_CMD_FAT
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000060#define CONFIG_CMD_GPIO
61#define CONFIG_CMD_MII
62#define CONFIG_CMD_MMC
63#define CONFIG_CMD_NET
64#define CONFIG_CMD_NFS
65#define CONFIG_CMD_PING
Matthias Fuchs084a5f02012-01-18 01:33:09 +000066#define CONFIG_CMD_SF
67#define CONFIG_CMD_SPI
Matthias Fuchsce575c42012-01-18 01:33:08 +000068#define CONFIG_CMD_USB
Fabio Estevam9a2673b2012-04-23 06:31:15 +000069#define CONFIG_CMD_BOOTZ
Fabio Estevama35d0bd2012-05-07 05:42:34 +000070#define CONFIG_CMD_I2C
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000071
72/*
73 * Memory configurations
74 */
75#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
76#define PHYS_SDRAM_1 0x40000000 /* Base address */
77#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000078#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
79#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
80#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
81#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
82/* Point initial SP in SRAM so SPL can use it too. */
83
Marek Vasutce696722012-04-01 18:21:34 +000084#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
Fabio Estevam5ffd3c52011-12-20 05:46:34 +000085#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
86
87#define CONFIG_SYS_INIT_SP_OFFSET \
88 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
89#define CONFIG_SYS_INIT_SP_ADDR \
90 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
91
92/*
93 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
94 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
95 * binary. In case there was more of this mess, 0x100 bytes are skipped.
96 */
97#define CONFIG_SYS_TEXT_BASE 0x40000100
98
99#define CONFIG_ENV_OVERWRITE
100/*
101 * U-Boot general configurations
102 */
103#define CONFIG_SYS_LONGHELP
104#define CONFIG_SYS_PROMPT "MX28EVK U-Boot > "
105#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
106#define CONFIG_SYS_PBSIZE \
107 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
108 /* Print buffer size */
109#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
110#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
111 /* Boot argument buffer size */
112#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
113#define CONFIG_AUTO_COMPLETE /* Command auto complete */
114#define CONFIG_CMDLINE_EDITING /* Command history etc */
115#define CONFIG_SYS_HUSH_PARSER
Fabio Estevam5ffd3c52011-12-20 05:46:34 +0000116
117/*
118 * Serial Driver
119 */
120#define CONFIG_PL011_SERIAL
121#define CONFIG_PL011_CLOCK 24000000
122#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
123#define CONFIG_CONS_INDEX 0
124#define CONFIG_BAUDRATE 115200 /* Default baud rate */
Fabio Estevam5ffd3c52011-12-20 05:46:34 +0000125
126/*
Anatolij Gustschin301eb952012-03-30 05:45:27 +0000127 * DMA
128 */
129#define CONFIG_APBH_DMA
130
131/*
Fabio Estevam5ffd3c52011-12-20 05:46:34 +0000132 * MMC Driver
133 */
134#define CONFIG_ENV_IS_IN_MMC
Matthias Fuchs084a5f02012-01-18 01:33:09 +0000135#ifdef CONFIG_ENV_IS_IN_MMC
136 #define CONFIG_ENV_OFFSET (256 * 1024)
137 #define CONFIG_ENV_SIZE (16 * 1024)
138 #define CONFIG_SYS_MMC_ENV_DEV 0
139#endif
Fabio Estevam5ffd3c52011-12-20 05:46:34 +0000140#define CONFIG_CMD_SAVEENV
141#ifdef CONFIG_CMD_MMC
142#define CONFIG_MMC
143#define CONFIG_GENERIC_MMC
Marek Vasut6e48cf32012-03-15 18:33:22 +0000144#define CONFIG_MMC_BOUNCE_BUFFER
Fabio Estevam5ffd3c52011-12-20 05:46:34 +0000145#define CONFIG_MXS_MMC
146#endif
147
148/*
Lauri Hintsala6f515f72012-04-17 00:35:46 +0000149 * NAND Driver
150 */
151#ifdef CONFIG_CMD_NAND
152#define CONFIG_NAND_MXS
153#define CONFIG_SYS_MAX_NAND_DEVICE 1
154#define CONFIG_SYS_NAND_BASE 0x60000000
155#define CONFIG_SYS_NAND_5_ADDR_CYCLE
156#endif
157
158/*
Fabio Estevam5ffd3c52011-12-20 05:46:34 +0000159 * Ethernet on SOC (FEC)
160 */
161#ifdef CONFIG_CMD_NET
162#define CONFIG_NET_MULTI
163#define CONFIG_ETHPRIME "FEC0"
164#define CONFIG_FEC_MXC
165#define CONFIG_FEC_MXC_MULTI
166#define CONFIG_MII
Fabio Estevam5ffd3c52011-12-20 05:46:34 +0000167#define CONFIG_FEC_XCV_TYPE RMII
168#define CONFIG_MX28_FEC_MAC_IN_OCOTP
169#endif
170
171/*
Matthias Fuchs5c4b3432012-01-18 01:33:07 +0000172 * RTC
173 */
174#ifdef CONFIG_CMD_DATE
175#define CONFIG_RTC_MXS
176#endif
177
178/*
Matthias Fuchsce575c42012-01-18 01:33:08 +0000179 * USB
180 */
181#ifdef CONFIG_CMD_USB
182#define CONFIG_USB_EHCI
183#define CONFIG_USB_EHCI_MXS
184#define CONFIG_EHCI_MXS_PORT 1
185#define CONFIG_EHCI_IS_TDI
186#define CONFIG_USB_STORAGE
Fabio Estevam94cf4502012-08-29 06:20:03 +0000187#define CONFIG_USB_HOST_ETHER
188#define CONFIG_USB_ETHER_ASIX
189#define CONFIG_USB_ETHER_SMSC95XX
Matthias Fuchsce575c42012-01-18 01:33:08 +0000190#endif
191
Fabio Estevama35d0bd2012-05-07 05:42:34 +0000192/* I2C */
193#ifdef CONFIG_CMD_I2C
194#define CONFIG_I2C_MXS
195#define CONFIG_HARD_I2C
196#define CONFIG_SYS_I2C_SPEED 400000
197#endif
198
Matthias Fuchsce575c42012-01-18 01:33:08 +0000199/*
Matthias Fuchs084a5f02012-01-18 01:33:09 +0000200 * SPI
201 */
202#ifdef CONFIG_CMD_SPI
203#define CONFIG_HARD_SPI
204#define CONFIG_MXS_SPI
Otavio Salvador8faabf62012-08-27 23:56:41 +0000205#define CONFIG_MXS_SPI_DMA_ENABLE
Matthias Fuchs084a5f02012-01-18 01:33:09 +0000206#define CONFIG_SPI_HALF_DUPLEX
207#define CONFIG_DEFAULT_SPI_BUS 2
208#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
209
210/* SPI Flash */
211#ifdef CONFIG_CMD_SF
212#define CONFIG_SPI_FLASH
Fabio Estevame85b8ba2012-03-22 14:29:03 +0000213#define CONFIG_SF_DEFAULT_BUS 2
214#define CONFIG_SF_DEFAULT_CS 0
Matthias Fuchs084a5f02012-01-18 01:33:09 +0000215/* this may vary and depends on the installed chip */
216#define CONFIG_SPI_FLASH_SST
217#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
218#define CONFIG_SF_DEFAULT_SPEED 24000000
219
220/* (redundant) environemnt in SPI flash */
Matthias Fuchs084a5f02012-01-18 01:33:09 +0000221#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
222#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
223#define CONFIG_ENV_SIZE 0x1000 /* 4KB */
224#define CONFIG_ENV_OFFSET 0x40000 /* 256K */
225#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
226#define CONFIG_ENV_SECT_SIZE 0x1000
227#define CONFIG_ENV_SPI_CS 0
228#define CONFIG_ENV_SPI_BUS 2
229#define CONFIG_ENV_SPI_MAX_HZ 24000000
230#define CONFIG_ENV_SPI_MODE SPI_MODE_0
231#endif
232#endif
233#endif
234
235/*
Fabio Estevam5ffd3c52011-12-20 05:46:34 +0000236 * Boot Linux
237 */
238#define CONFIG_CMDLINE_TAG
239#define CONFIG_SETUP_MEMORY_TAGS
240#define CONFIG_BOOTDELAY 3
241#define CONFIG_BOOTFILE "uImage"
242#define CONFIG_BOOTCOMMAND "run bootcmd_net"
243#define CONFIG_LOADADDR 0x42000000
244#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
Fabio Estevam3cde55e2012-04-23 06:06:28 +0000245#define CONFIG_OF_LIBFDT
Fabio Estevam5ffd3c52011-12-20 05:46:34 +0000246
247/*
248 * Extra Environments
249 */
250#define CONFIG_EXTRA_ENV_SETTINGS \
251 "console_fsl=console=ttyAM0" \
252 "console_mainline=console=ttyAMA0" \
253 "netargs=setenv bootargs console=${console_mainline}" \
254 "root=/dev/nfs " \
255 "ip=dhcp nfsroot=${serverip}:${nfsroot}\0" \
256 "bootcmd_net=echo Booting from net ...; " \
257 "run netargs; " \
258 "dhcp ${uimage}; bootm\0" \
259
Otavio Salvador599f1b82012-05-12 13:40:16 +0000260#endif /* __MX28EVK_CONFIG_H__ */