blob: 28c67c493ee08594a24771272bd03340bf05a95a [file] [log] [blame]
Eric Nelson4c644792017-12-11 13:52:11 -02001/*
2 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the Boundary Devices Nitrogen6X
5 * and Freescale i.MX6Q Sabre Lite boards.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
13/* SPL */
14
15#include "mx6_common.h"
16#include "imx6_spl.h"
17
18#undef CONFIG_FSL_ESDHC
19#undef CONFIG_MMC
20#undef CONFIG_SPL_MMC_SUPPORT
21#undef CONFIG_GENERIC_MMC
22#undef CONFIG_CMD_FUSE
23
24#define CONFIG_SYS_MEMTEST_START 0x10000000
25#define CONFIG_SYS_MEMTEST_END 0x20000000
26#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
27
28#define CONFIG_MXC_UART
29#ifdef CONFIG_SERIAL_CONSOLE_UART1
30#if defined(CONFIG_MX6SL)
31#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
32#else
33#define CONFIG_MXC_UART_BASE UART1_BASE
34#endif
35#elif defined(CONFIG_SERIAL_CONSOLE_UART2)
36#define CONFIG_MXC_UART_BASE UART2_BASE
37#else
38#error please define serial console (CONFIG_SERIAL_CONSOLE_UARTx)
39#endif
40#define CONFIG_BAUDRATE 115200
41
42#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + 16)
43
44/* Physical Memory Map */
45#define CONFIG_NR_DRAM_BANKS 1
46#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
47
48#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
49#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
50#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
51
52#define CONFIG_SYS_INIT_SP_OFFSET \
53 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
54#define CONFIG_SYS_INIT_SP_ADDR \
55 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
56
57#define CONFIG_ENV_SIZE (8 * 1024)
58
Eric Nelson2e366b22018-01-18 07:47:32 -070059#define CONFIG_MXC_USB_PORTSC PORT_PTS_UTMI
60
Eric Nelson4c644792017-12-11 13:52:11 -020061#endif /* __CONFIG_H */