Lukasz Majewski | ac3c831 | 2011-10-27 10:36:46 +0200 | [diff] [blame] | 1 | /* |
| 2 | * drivers/usb/gadget/s3c_udc_otg.c |
| 3 | * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers |
| 4 | * |
| 5 | * Copyright (C) 2008 for Samsung Electronics |
| 6 | * |
| 7 | * BSP Support for Samsung's UDC driver |
| 8 | * available at: |
| 9 | * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git |
| 10 | * |
| 11 | * State machine bugfixes: |
| 12 | * Marek Szyprowski <m.szyprowski@samsung.com> |
| 13 | * |
| 14 | * Ported to u-boot: |
| 15 | * Marek Szyprowski <m.szyprowski@samsung.com> |
| 16 | * Lukasz Majewski <l.majewski@samsumg.com> |
| 17 | * |
| 18 | * This program is free software; you can redistribute it and/or modify |
| 19 | * it under the terms of the GNU General Public License as published by |
| 20 | * the Free Software Foundation; either version 2 of the License, or |
| 21 | * (at your option) any later version. |
| 22 | * |
| 23 | * This program is distributed in the hope that it will be useful, |
| 24 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 26 | * GNU General Public License for more details. |
| 27 | * |
| 28 | * You should have received a copy of the GNU General Public License |
| 29 | * along with this program; if not, write to the Free Software |
| 30 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 31 | * |
| 32 | */ |
| 33 | |
| 34 | #include <common.h> |
| 35 | #include <asm/errno.h> |
| 36 | #include <linux/list.h> |
| 37 | #include <malloc.h> |
| 38 | |
| 39 | #include <linux/usb/ch9.h> |
| 40 | #include <linux/usb/gadget.h> |
| 41 | |
| 42 | #include <asm/byteorder.h> |
Tom Rini | 7342452 | 2011-12-15 08:40:51 -0700 | [diff] [blame] | 43 | #include <asm/unaligned.h> |
Lukasz Majewski | ac3c831 | 2011-10-27 10:36:46 +0200 | [diff] [blame] | 44 | #include <asm/io.h> |
| 45 | |
| 46 | #include <asm/mach-types.h> |
| 47 | #include <asm/arch/gpio.h> |
| 48 | |
| 49 | #include "regs-otg.h" |
| 50 | #include <usb/s3c_udc.h> |
| 51 | #include <usb/lin_gadget_compat.h> |
| 52 | |
| 53 | /***********************************************************/ |
| 54 | |
| 55 | #define OTG_DMA_MODE 1 |
| 56 | |
| 57 | #undef DEBUG_S3C_UDC_SETUP |
| 58 | #undef DEBUG_S3C_UDC_EP0 |
| 59 | #undef DEBUG_S3C_UDC_ISR |
| 60 | #undef DEBUG_S3C_UDC_OUT_EP |
| 61 | #undef DEBUG_S3C_UDC_IN_EP |
| 62 | #undef DEBUG_S3C_UDC |
| 63 | |
| 64 | /* #define DEBUG_S3C_UDC_SETUP */ |
| 65 | /* #define DEBUG_S3C_UDC_EP0 */ |
| 66 | /* #define DEBUG_S3C_UDC_ISR */ |
| 67 | /* #define DEBUG_S3C_UDC_OUT_EP */ |
| 68 | /* #define DEBUG_S3C_UDC_IN_EP */ |
| 69 | /* #define DEBUG_S3C_UDC */ |
| 70 | |
| 71 | #include <usb/s3c_udc.h> |
| 72 | |
| 73 | #define EP0_CON 0 |
| 74 | #define EP_MASK 0xF |
| 75 | |
| 76 | #if defined(DEBUG_S3C_UDC_SETUP) || defined(DEBUG_S3C_UDC_ISR) \ |
| 77 | || defined(DEBUG_S3C_UDC_OUT_EP) |
| 78 | static char *state_names[] = { |
| 79 | "WAIT_FOR_SETUP", |
| 80 | "DATA_STATE_XMIT", |
| 81 | "DATA_STATE_NEED_ZLP", |
| 82 | "WAIT_FOR_OUT_STATUS", |
| 83 | "DATA_STATE_RECV", |
| 84 | "WAIT_FOR_COMPLETE", |
| 85 | "WAIT_FOR_OUT_COMPLETE", |
| 86 | "WAIT_FOR_IN_COMPLETE", |
| 87 | "WAIT_FOR_NULL_COMPLETE", |
| 88 | }; |
| 89 | #endif |
| 90 | |
| 91 | #define DRIVER_DESC "S3C HS USB OTG Device Driver, (c) Samsung Electronics" |
| 92 | #define DRIVER_VERSION "15 March 2009" |
| 93 | |
| 94 | struct s3c_udc *the_controller; |
| 95 | |
| 96 | static const char driver_name[] = "s3c-udc"; |
| 97 | static const char driver_desc[] = DRIVER_DESC; |
| 98 | static const char ep0name[] = "ep0-control"; |
| 99 | |
| 100 | /* Max packet size*/ |
| 101 | static unsigned int ep0_fifo_size = 64; |
| 102 | static unsigned int ep_fifo_size = 512; |
| 103 | static unsigned int ep_fifo_size2 = 1024; |
| 104 | static int reset_available = 1; |
| 105 | |
| 106 | static struct usb_ctrlrequest *usb_ctrl; |
| 107 | static dma_addr_t usb_ctrl_dma_addr; |
| 108 | |
| 109 | /* |
| 110 | Local declarations. |
| 111 | */ |
| 112 | static int s3c_ep_enable(struct usb_ep *ep, |
| 113 | const struct usb_endpoint_descriptor *); |
| 114 | static int s3c_ep_disable(struct usb_ep *ep); |
| 115 | static struct usb_request *s3c_alloc_request(struct usb_ep *ep, |
| 116 | gfp_t gfp_flags); |
| 117 | static void s3c_free_request(struct usb_ep *ep, struct usb_request *); |
| 118 | |
| 119 | static int s3c_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags); |
| 120 | static int s3c_dequeue(struct usb_ep *ep, struct usb_request *); |
| 121 | static int s3c_fifo_status(struct usb_ep *ep); |
| 122 | static void s3c_fifo_flush(struct usb_ep *ep); |
| 123 | static void s3c_ep0_read(struct s3c_udc *dev); |
| 124 | static void s3c_ep0_kick(struct s3c_udc *dev, struct s3c_ep *ep); |
| 125 | static void s3c_handle_ep0(struct s3c_udc *dev); |
| 126 | static int s3c_ep0_write(struct s3c_udc *dev); |
| 127 | static int write_fifo_ep0(struct s3c_ep *ep, struct s3c_request *req); |
| 128 | static void done(struct s3c_ep *ep, struct s3c_request *req, int status); |
| 129 | static void stop_activity(struct s3c_udc *dev, |
| 130 | struct usb_gadget_driver *driver); |
| 131 | static int udc_enable(struct s3c_udc *dev); |
| 132 | static void udc_set_address(struct s3c_udc *dev, unsigned char address); |
| 133 | static void reconfig_usbd(void); |
| 134 | static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed); |
| 135 | static void nuke(struct s3c_ep *ep, int status); |
| 136 | static int s3c_udc_set_halt(struct usb_ep *_ep, int value); |
| 137 | static void s3c_udc_set_nak(struct s3c_ep *ep); |
| 138 | |
| 139 | static struct usb_ep_ops s3c_ep_ops = { |
| 140 | .enable = s3c_ep_enable, |
| 141 | .disable = s3c_ep_disable, |
| 142 | |
| 143 | .alloc_request = s3c_alloc_request, |
| 144 | .free_request = s3c_free_request, |
| 145 | |
| 146 | .queue = s3c_queue, |
| 147 | .dequeue = s3c_dequeue, |
| 148 | |
| 149 | .set_halt = s3c_udc_set_halt, |
| 150 | .fifo_status = s3c_fifo_status, |
| 151 | .fifo_flush = s3c_fifo_flush, |
| 152 | }; |
| 153 | |
| 154 | #define create_proc_files() do {} while (0) |
| 155 | #define remove_proc_files() do {} while (0) |
| 156 | |
| 157 | /***********************************************************/ |
| 158 | |
| 159 | void __iomem *regs_otg; |
| 160 | struct s3c_usbotg_reg *reg; |
| 161 | struct s3c_usbotg_phy *phy; |
| 162 | static unsigned int usb_phy_ctrl; |
| 163 | |
| 164 | void otg_phy_init(struct s3c_udc *dev) |
| 165 | { |
| 166 | dev->pdata->phy_control(1); |
| 167 | |
| 168 | /*USB PHY0 Enable */ |
| 169 | printf("USB PHY0 Enable\n"); |
| 170 | |
| 171 | /* Enable PHY */ |
| 172 | writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl); |
| 173 | |
| 174 | if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */ |
| 175 | writel((readl(&phy->phypwr) |
| 176 | &~(PHY_0_SLEEP | OTG_DISABLE_0 | ANALOG_PWRDOWN) |
| 177 | &~FORCE_SUSPEND_0), &phy->phypwr); |
| 178 | else /* C110 GONI */ |
| 179 | writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN) |
| 180 | &~FORCE_SUSPEND_0), &phy->phypwr); |
| 181 | |
| 182 | writel((readl(&phy->phyclk) &~(ID_PULLUP0 | COMMON_ON_N0)) | |
| 183 | CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */ |
| 184 | |
| 185 | writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST)) |
| 186 | | PHY_SW_RST0, &phy->rstcon); |
| 187 | udelay(10); |
| 188 | writel(readl(&phy->rstcon) |
| 189 | &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST), &phy->rstcon); |
| 190 | udelay(10); |
| 191 | } |
| 192 | |
| 193 | void otg_phy_off(struct s3c_udc *dev) |
| 194 | { |
| 195 | /* reset controller just in case */ |
| 196 | writel(PHY_SW_RST0, &phy->rstcon); |
| 197 | udelay(20); |
| 198 | writel(readl(&phy->phypwr) &~PHY_SW_RST0, &phy->rstcon); |
| 199 | udelay(20); |
| 200 | |
| 201 | writel(readl(&phy->phypwr) | OTG_DISABLE_0 | ANALOG_PWRDOWN |
| 202 | | FORCE_SUSPEND_0, &phy->phypwr); |
| 203 | |
| 204 | writel(readl(usb_phy_ctrl) &~USB_PHY_CTRL_EN0, usb_phy_ctrl); |
| 205 | |
| 206 | writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)), |
| 207 | &phy->phyclk); |
| 208 | |
| 209 | udelay(10000); |
| 210 | |
| 211 | dev->pdata->phy_control(0); |
| 212 | } |
| 213 | |
| 214 | /***********************************************************/ |
| 215 | |
| 216 | #include "s3c_udc_otg_xfer_dma.c" |
| 217 | |
| 218 | /* |
| 219 | * udc_disable - disable USB device controller |
| 220 | */ |
| 221 | static void udc_disable(struct s3c_udc *dev) |
| 222 | { |
| 223 | DEBUG_SETUP("%s: %p\n", __func__, dev); |
| 224 | |
| 225 | udc_set_address(dev, 0); |
| 226 | |
| 227 | dev->ep0state = WAIT_FOR_SETUP; |
| 228 | dev->gadget.speed = USB_SPEED_UNKNOWN; |
| 229 | dev->usb_address = 0; |
| 230 | |
| 231 | otg_phy_off(dev); |
| 232 | } |
| 233 | |
| 234 | /* |
| 235 | * udc_reinit - initialize software state |
| 236 | */ |
| 237 | static void udc_reinit(struct s3c_udc *dev) |
| 238 | { |
| 239 | unsigned int i; |
| 240 | |
| 241 | DEBUG_SETUP("%s: %p\n", __func__, dev); |
| 242 | |
| 243 | /* device/ep0 records init */ |
| 244 | INIT_LIST_HEAD(&dev->gadget.ep_list); |
| 245 | INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); |
| 246 | dev->ep0state = WAIT_FOR_SETUP; |
| 247 | |
| 248 | /* basic endpoint records init */ |
| 249 | for (i = 0; i < S3C_MAX_ENDPOINTS; i++) { |
| 250 | struct s3c_ep *ep = &dev->ep[i]; |
| 251 | |
| 252 | if (i != 0) |
| 253 | list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); |
| 254 | |
| 255 | ep->desc = 0; |
| 256 | ep->stopped = 0; |
| 257 | INIT_LIST_HEAD(&ep->queue); |
| 258 | ep->pio_irqs = 0; |
| 259 | } |
| 260 | |
| 261 | /* the rest was statically initialized, and is read-only */ |
| 262 | } |
| 263 | |
| 264 | #define BYTES2MAXP(x) (x / 8) |
| 265 | #define MAXP2BYTES(x) (x * 8) |
| 266 | |
| 267 | /* until it's enabled, this UDC should be completely invisible |
| 268 | * to any USB host. |
| 269 | */ |
| 270 | static int udc_enable(struct s3c_udc *dev) |
| 271 | { |
| 272 | DEBUG_SETUP("%s: %p\n", __func__, dev); |
| 273 | |
| 274 | otg_phy_init(dev); |
| 275 | reconfig_usbd(); |
| 276 | |
| 277 | DEBUG_SETUP("S3C USB 2.0 OTG Controller Core Initialized : 0x%x\n", |
| 278 | readl(®->gintmsk)); |
| 279 | |
| 280 | dev->gadget.speed = USB_SPEED_UNKNOWN; |
| 281 | |
| 282 | return 0; |
| 283 | } |
| 284 | |
| 285 | /* |
| 286 | Register entry point for the peripheral controller driver. |
| 287 | */ |
| 288 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) |
| 289 | { |
| 290 | struct s3c_udc *dev = the_controller; |
| 291 | int retval = 0; |
| 292 | unsigned long flags; |
| 293 | |
| 294 | DEBUG_SETUP("%s: %s\n", __func__, "no name"); |
| 295 | |
| 296 | if (!driver |
| 297 | || (driver->speed != USB_SPEED_FULL |
| 298 | && driver->speed != USB_SPEED_HIGH) |
| 299 | || !driver->bind || !driver->disconnect || !driver->setup) |
| 300 | return -EINVAL; |
| 301 | if (!dev) |
| 302 | return -ENODEV; |
| 303 | if (dev->driver) |
| 304 | return -EBUSY; |
| 305 | |
| 306 | spin_lock_irqsave(&dev->lock, flags); |
| 307 | /* first hook up the driver ... */ |
| 308 | dev->driver = driver; |
| 309 | spin_unlock_irqrestore(&dev->lock, flags); |
| 310 | |
| 311 | if (retval) { /* TODO */ |
| 312 | printf("target device_add failed, error %d\n", retval); |
| 313 | return retval; |
| 314 | } |
| 315 | |
| 316 | retval = driver->bind(&dev->gadget); |
| 317 | if (retval) { |
| 318 | DEBUG_SETUP("%s: bind to driver --> error %d\n", |
| 319 | dev->gadget.name, retval); |
| 320 | dev->driver = 0; |
| 321 | return retval; |
| 322 | } |
| 323 | |
| 324 | enable_irq(IRQ_OTG); |
| 325 | |
| 326 | DEBUG_SETUP("Registered gadget driver %s\n", dev->gadget.name); |
| 327 | udc_enable(dev); |
| 328 | |
| 329 | return 0; |
| 330 | } |
| 331 | |
| 332 | /* |
| 333 | * Unregister entry point for the peripheral controller driver. |
| 334 | */ |
| 335 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) |
| 336 | { |
| 337 | struct s3c_udc *dev = the_controller; |
| 338 | unsigned long flags; |
| 339 | |
| 340 | if (!dev) |
| 341 | return -ENODEV; |
| 342 | if (!driver || driver != dev->driver) |
| 343 | return -EINVAL; |
| 344 | |
| 345 | spin_lock_irqsave(&dev->lock, flags); |
| 346 | dev->driver = 0; |
| 347 | stop_activity(dev, driver); |
| 348 | spin_unlock_irqrestore(&dev->lock, flags); |
| 349 | |
| 350 | driver->unbind(&dev->gadget); |
| 351 | |
| 352 | disable_irq(IRQ_OTG); |
| 353 | |
| 354 | udc_disable(dev); |
| 355 | return 0; |
| 356 | } |
| 357 | |
| 358 | /* |
| 359 | * done - retire a request; caller blocked irqs |
| 360 | */ |
| 361 | static void done(struct s3c_ep *ep, struct s3c_request *req, int status) |
| 362 | { |
| 363 | unsigned int stopped = ep->stopped; |
| 364 | |
| 365 | DEBUG("%s: %s %p, req = %p, stopped = %d\n", |
| 366 | __func__, ep->ep.name, ep, &req->req, stopped); |
| 367 | |
| 368 | list_del_init(&req->queue); |
| 369 | |
| 370 | if (likely(req->req.status == -EINPROGRESS)) |
| 371 | req->req.status = status; |
| 372 | else |
| 373 | status = req->req.status; |
| 374 | |
| 375 | if (status && status != -ESHUTDOWN) { |
| 376 | DEBUG("complete %s req %p stat %d len %u/%u\n", |
| 377 | ep->ep.name, &req->req, status, |
| 378 | req->req.actual, req->req.length); |
| 379 | } |
| 380 | |
| 381 | /* don't modify queue heads during completion callback */ |
| 382 | ep->stopped = 1; |
| 383 | |
| 384 | #ifdef DEBUG_S3C_UDC |
| 385 | printf("calling complete callback\n"); |
| 386 | { |
| 387 | int i, len = req->req.length; |
| 388 | |
| 389 | printf("pkt[%d] = ", req->req.length); |
| 390 | if (len > 64) |
| 391 | len = 64; |
| 392 | for (i = 0; i < len; i++) { |
| 393 | printf("%02x", ((u8 *)req->req.buf)[i]); |
| 394 | if ((i & 7) == 7) |
| 395 | printf(" "); |
| 396 | } |
| 397 | printf("\n"); |
| 398 | } |
| 399 | #endif |
| 400 | spin_unlock(&ep->dev->lock); |
| 401 | req->req.complete(&ep->ep, &req->req); |
| 402 | spin_lock(&ep->dev->lock); |
| 403 | |
| 404 | DEBUG("callback completed\n"); |
| 405 | |
| 406 | ep->stopped = stopped; |
| 407 | } |
| 408 | |
| 409 | /* |
| 410 | * nuke - dequeue ALL requests |
| 411 | */ |
| 412 | static void nuke(struct s3c_ep *ep, int status) |
| 413 | { |
| 414 | struct s3c_request *req; |
| 415 | |
| 416 | DEBUG("%s: %s %p\n", __func__, ep->ep.name, ep); |
| 417 | |
| 418 | /* called with irqs blocked */ |
| 419 | while (!list_empty(&ep->queue)) { |
| 420 | req = list_entry(ep->queue.next, struct s3c_request, queue); |
| 421 | done(ep, req, status); |
| 422 | } |
| 423 | } |
| 424 | |
| 425 | static void stop_activity(struct s3c_udc *dev, |
| 426 | struct usb_gadget_driver *driver) |
| 427 | { |
| 428 | int i; |
| 429 | |
| 430 | /* don't disconnect drivers more than once */ |
| 431 | if (dev->gadget.speed == USB_SPEED_UNKNOWN) |
| 432 | driver = 0; |
| 433 | dev->gadget.speed = USB_SPEED_UNKNOWN; |
| 434 | |
| 435 | /* prevent new request submissions, kill any outstanding requests */ |
| 436 | for (i = 0; i < S3C_MAX_ENDPOINTS; i++) { |
| 437 | struct s3c_ep *ep = &dev->ep[i]; |
| 438 | ep->stopped = 1; |
| 439 | nuke(ep, -ESHUTDOWN); |
| 440 | } |
| 441 | |
| 442 | /* report disconnect; the driver is already quiesced */ |
| 443 | if (driver) { |
| 444 | spin_unlock(&dev->lock); |
| 445 | driver->disconnect(&dev->gadget); |
| 446 | spin_lock(&dev->lock); |
| 447 | } |
| 448 | |
| 449 | /* re-init driver-visible data structures */ |
| 450 | udc_reinit(dev); |
| 451 | } |
| 452 | |
| 453 | static void reconfig_usbd(void) |
| 454 | { |
| 455 | /* 2. Soft-reset OTG Core and then unreset again. */ |
| 456 | int i; |
| 457 | unsigned int uTemp = writel(CORE_SOFT_RESET, ®->grstctl); |
| 458 | |
| 459 | DEBUG(2, "Reseting OTG controller\n"); |
| 460 | |
| 461 | writel(0<<15 /* PHY Low Power Clock sel*/ |
| 462 | |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/ |
| 463 | |0x5<<10 /* Turnaround time*/ |
| 464 | |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/ |
| 465 | /* 1:SRP enable] H1= 1,1*/ |
| 466 | |0<<7 /* Ulpi DDR sel*/ |
| 467 | |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ |
| 468 | |0<<4 /* 0: utmi+, 1:ulpi*/ |
| 469 | |1<<3 /* phy i/f 0:8bit, 1:16bit*/ |
| 470 | |0x7<<0, /* HS/FS Timeout**/ |
| 471 | ®->gusbcfg); |
| 472 | |
| 473 | /* 3. Put the OTG device core in the disconnected state.*/ |
| 474 | uTemp = readl(®->dctl); |
| 475 | uTemp |= SOFT_DISCONNECT; |
| 476 | writel(uTemp, ®->dctl); |
| 477 | |
| 478 | udelay(20); |
| 479 | |
| 480 | /* 4. Make the OTG device core exit from the disconnected state.*/ |
| 481 | uTemp = readl(®->dctl); |
| 482 | uTemp = uTemp & ~SOFT_DISCONNECT; |
| 483 | writel(uTemp, ®->dctl); |
| 484 | |
| 485 | /* 5. Configure OTG Core to initial settings of device mode.*/ |
| 486 | /* [][1: full speed(30Mhz) 0:high speed]*/ |
| 487 | writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, ®->dcfg); |
| 488 | |
| 489 | mdelay(1); |
| 490 | |
| 491 | /* 6. Unmask the core interrupts*/ |
| 492 | writel(GINTMSK_INIT, ®->gintmsk); |
| 493 | |
| 494 | /* 7. Set NAK bit of EP0, EP1, EP2*/ |
| 495 | writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[EP0_CON].doepctl); |
| 496 | writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[EP0_CON].diepctl); |
| 497 | |
| 498 | for (i = 1; i < S3C_MAX_ENDPOINTS; i++) { |
| 499 | writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[i].doepctl); |
| 500 | writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[i].diepctl); |
| 501 | } |
| 502 | |
| 503 | /* 8. Unmask EPO interrupts*/ |
| 504 | writel(((1 << EP0_CON) << DAINT_OUT_BIT) |
| 505 | | (1 << EP0_CON), ®->daintmsk); |
| 506 | |
| 507 | /* 9. Unmask device OUT EP common interrupts*/ |
| 508 | writel(DOEPMSK_INIT, ®->doepmsk); |
| 509 | |
| 510 | /* 10. Unmask device IN EP common interrupts*/ |
| 511 | writel(DIEPMSK_INIT, ®->diepmsk); |
| 512 | |
| 513 | /* 11. Set Rx FIFO Size (in 32-bit words) */ |
| 514 | writel(RX_FIFO_SIZE >> 2, ®->grxfsiz); |
| 515 | |
| 516 | /* 12. Set Non Periodic Tx FIFO Size */ |
| 517 | writel((NPTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE >> 2)) << 0, |
| 518 | ®->gnptxfsiz); |
| 519 | |
| 520 | for (i = 1; i < S3C_MAX_HW_ENDPOINTS; i++) |
| 521 | writel((PTX_FIFO_SIZE >> 2) << 16 | |
| 522 | ((RX_FIFO_SIZE + NPTX_FIFO_SIZE + |
| 523 | PTX_FIFO_SIZE*(i-1)) >> 2) << 0, |
| 524 | ®->dieptxf[i-1]); |
| 525 | |
| 526 | /* Flush the RX FIFO */ |
| 527 | writel(RX_FIFO_FLUSH, ®->grstctl); |
| 528 | while (readl(®->grstctl) & RX_FIFO_FLUSH) |
| 529 | DEBUG("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__); |
| 530 | |
| 531 | /* Flush all the Tx FIFO's */ |
| 532 | writel(TX_FIFO_FLUSH_ALL, ®->grstctl); |
| 533 | writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, ®->grstctl); |
| 534 | while (readl(®->grstctl) & TX_FIFO_FLUSH) |
| 535 | DEBUG("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__); |
| 536 | |
| 537 | /* 13. Clear NAK bit of EP0, EP1, EP2*/ |
| 538 | /* For Slave mode*/ |
| 539 | /* EP0: Control OUT */ |
| 540 | writel(DEPCTL_EPDIS | DEPCTL_CNAK, |
| 541 | ®->out_endp[EP0_CON].doepctl); |
| 542 | |
| 543 | /* 14. Initialize OTG Link Core.*/ |
| 544 | writel(GAHBCFG_INIT, ®->gahbcfg); |
| 545 | } |
| 546 | |
| 547 | static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed) |
| 548 | { |
| 549 | unsigned int ep_ctrl; |
| 550 | int i; |
| 551 | |
| 552 | if (speed == USB_SPEED_HIGH) { |
| 553 | ep0_fifo_size = 64; |
| 554 | ep_fifo_size = 512; |
| 555 | ep_fifo_size2 = 1024; |
| 556 | dev->gadget.speed = USB_SPEED_HIGH; |
| 557 | } else { |
| 558 | ep0_fifo_size = 64; |
| 559 | ep_fifo_size = 64; |
| 560 | ep_fifo_size2 = 64; |
| 561 | dev->gadget.speed = USB_SPEED_FULL; |
| 562 | } |
| 563 | |
| 564 | dev->ep[0].ep.maxpacket = ep0_fifo_size; |
| 565 | for (i = 1; i < S3C_MAX_ENDPOINTS; i++) |
| 566 | dev->ep[i].ep.maxpacket = ep_fifo_size; |
| 567 | |
| 568 | /* EP0 - Control IN (64 bytes)*/ |
| 569 | ep_ctrl = readl(®->in_endp[EP0_CON].diepctl); |
| 570 | writel(ep_ctrl|(0<<0), ®->in_endp[EP0_CON].diepctl); |
| 571 | |
| 572 | /* EP0 - Control OUT (64 bytes)*/ |
| 573 | ep_ctrl = readl(®->out_endp[EP0_CON].doepctl); |
| 574 | writel(ep_ctrl|(0<<0), ®->out_endp[EP0_CON].doepctl); |
| 575 | } |
| 576 | |
| 577 | static int s3c_ep_enable(struct usb_ep *_ep, |
| 578 | const struct usb_endpoint_descriptor *desc) |
| 579 | { |
| 580 | struct s3c_ep *ep; |
| 581 | struct s3c_udc *dev; |
| 582 | unsigned long flags; |
| 583 | |
| 584 | DEBUG("%s: %p\n", __func__, _ep); |
| 585 | |
| 586 | ep = container_of(_ep, struct s3c_ep, ep); |
| 587 | if (!_ep || !desc || ep->desc || _ep->name == ep0name |
| 588 | || desc->bDescriptorType != USB_DT_ENDPOINT |
| 589 | || ep->bEndpointAddress != desc->bEndpointAddress |
Tom Rini | 7342452 | 2011-12-15 08:40:51 -0700 | [diff] [blame] | 590 | || ep_maxpacket(ep) < |
| 591 | le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) { |
Lukasz Majewski | ac3c831 | 2011-10-27 10:36:46 +0200 | [diff] [blame] | 592 | |
| 593 | DEBUG("%s: bad ep or descriptor\n", __func__); |
| 594 | return -EINVAL; |
| 595 | } |
| 596 | |
| 597 | /* xfer types must match, except that interrupt ~= bulk */ |
| 598 | if (ep->bmAttributes != desc->bmAttributes |
| 599 | && ep->bmAttributes != USB_ENDPOINT_XFER_BULK |
| 600 | && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { |
| 601 | |
| 602 | DEBUG("%s: %s type mismatch\n", __func__, _ep->name); |
| 603 | return -EINVAL; |
| 604 | } |
| 605 | |
| 606 | /* hardware _could_ do smaller, but driver doesn't */ |
| 607 | if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK |
Tom Rini | 7342452 | 2011-12-15 08:40:51 -0700 | [diff] [blame] | 608 | && le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) != |
| 609 | ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) { |
Lukasz Majewski | ac3c831 | 2011-10-27 10:36:46 +0200 | [diff] [blame] | 610 | |
| 611 | DEBUG("%s: bad %s maxpacket\n", __func__, _ep->name); |
| 612 | return -ERANGE; |
| 613 | } |
| 614 | |
| 615 | dev = ep->dev; |
| 616 | if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { |
| 617 | |
| 618 | DEBUG("%s: bogus device state\n", __func__); |
| 619 | return -ESHUTDOWN; |
| 620 | } |
| 621 | |
| 622 | ep->stopped = 0; |
| 623 | ep->desc = desc; |
| 624 | ep->pio_irqs = 0; |
Tom Rini | 7342452 | 2011-12-15 08:40:51 -0700 | [diff] [blame] | 625 | ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)); |
Lukasz Majewski | ac3c831 | 2011-10-27 10:36:46 +0200 | [diff] [blame] | 626 | |
| 627 | /* Reset halt state */ |
| 628 | s3c_udc_set_nak(ep); |
| 629 | s3c_udc_set_halt(_ep, 0); |
| 630 | |
| 631 | spin_lock_irqsave(&ep->dev->lock, flags); |
| 632 | s3c_udc_ep_activate(ep); |
| 633 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
| 634 | |
| 635 | DEBUG("%s: enabled %s, stopped = %d, maxpacket = %d\n", |
| 636 | __func__, _ep->name, ep->stopped, ep->ep.maxpacket); |
| 637 | return 0; |
| 638 | } |
| 639 | |
| 640 | /* |
| 641 | * Disable EP |
| 642 | */ |
| 643 | static int s3c_ep_disable(struct usb_ep *_ep) |
| 644 | { |
| 645 | struct s3c_ep *ep; |
| 646 | unsigned long flags; |
| 647 | |
| 648 | DEBUG("%s: %p\n", __func__, _ep); |
| 649 | |
| 650 | ep = container_of(_ep, struct s3c_ep, ep); |
| 651 | if (!_ep || !ep->desc) { |
| 652 | DEBUG("%s: %s not enabled\n", __func__, |
| 653 | _ep ? ep->ep.name : NULL); |
| 654 | return -EINVAL; |
| 655 | } |
| 656 | |
| 657 | spin_lock_irqsave(&ep->dev->lock, flags); |
| 658 | |
| 659 | /* Nuke all pending requests */ |
| 660 | nuke(ep, -ESHUTDOWN); |
| 661 | |
| 662 | ep->desc = 0; |
| 663 | ep->stopped = 1; |
| 664 | |
| 665 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
| 666 | |
| 667 | DEBUG("%s: disabled %s\n", __func__, _ep->name); |
| 668 | return 0; |
| 669 | } |
| 670 | |
| 671 | static struct usb_request *s3c_alloc_request(struct usb_ep *ep, |
| 672 | gfp_t gfp_flags) |
| 673 | { |
| 674 | struct s3c_request *req; |
| 675 | |
| 676 | DEBUG("%s: %s %p\n", __func__, ep->name, ep); |
| 677 | |
| 678 | req = kmalloc(sizeof *req, gfp_flags); |
| 679 | if (!req) |
| 680 | return 0; |
| 681 | |
| 682 | memset(req, 0, sizeof *req); |
| 683 | INIT_LIST_HEAD(&req->queue); |
| 684 | |
| 685 | return &req->req; |
| 686 | } |
| 687 | |
| 688 | static void s3c_free_request(struct usb_ep *ep, struct usb_request *_req) |
| 689 | { |
| 690 | struct s3c_request *req; |
| 691 | |
| 692 | DEBUG("%s: %p\n", __func__, ep); |
| 693 | |
| 694 | req = container_of(_req, struct s3c_request, req); |
| 695 | WARN_ON(!list_empty(&req->queue)); |
| 696 | kfree(req); |
| 697 | } |
| 698 | |
| 699 | /* dequeue JUST ONE request */ |
| 700 | static int s3c_dequeue(struct usb_ep *_ep, struct usb_request *_req) |
| 701 | { |
| 702 | struct s3c_ep *ep; |
| 703 | struct s3c_request *req; |
| 704 | unsigned long flags; |
| 705 | |
| 706 | DEBUG("%s: %p\n", __func__, _ep); |
| 707 | |
| 708 | ep = container_of(_ep, struct s3c_ep, ep); |
| 709 | if (!_ep || ep->ep.name == ep0name) |
| 710 | return -EINVAL; |
| 711 | |
| 712 | spin_lock_irqsave(&ep->dev->lock, flags); |
| 713 | |
| 714 | /* make sure it's actually queued on this endpoint */ |
| 715 | list_for_each_entry(req, &ep->queue, queue) { |
| 716 | if (&req->req == _req) |
| 717 | break; |
| 718 | } |
| 719 | if (&req->req != _req) { |
| 720 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
| 721 | return -EINVAL; |
| 722 | } |
| 723 | |
| 724 | done(ep, req, -ECONNRESET); |
| 725 | |
| 726 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
| 727 | return 0; |
| 728 | } |
| 729 | |
| 730 | /* |
| 731 | * Return bytes in EP FIFO |
| 732 | */ |
| 733 | static int s3c_fifo_status(struct usb_ep *_ep) |
| 734 | { |
| 735 | int count = 0; |
| 736 | struct s3c_ep *ep; |
| 737 | |
| 738 | ep = container_of(_ep, struct s3c_ep, ep); |
| 739 | if (!_ep) { |
| 740 | DEBUG("%s: bad ep\n", __func__); |
| 741 | return -ENODEV; |
| 742 | } |
| 743 | |
| 744 | DEBUG("%s: %d\n", __func__, ep_index(ep)); |
| 745 | |
| 746 | /* LPD can't report unclaimed bytes from IN fifos */ |
| 747 | if (ep_is_in(ep)) |
| 748 | return -EOPNOTSUPP; |
| 749 | |
| 750 | return count; |
| 751 | } |
| 752 | |
| 753 | /* |
| 754 | * Flush EP FIFO |
| 755 | */ |
| 756 | static void s3c_fifo_flush(struct usb_ep *_ep) |
| 757 | { |
| 758 | struct s3c_ep *ep; |
| 759 | |
| 760 | ep = container_of(_ep, struct s3c_ep, ep); |
| 761 | if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { |
| 762 | DEBUG("%s: bad ep\n", __func__); |
| 763 | return; |
| 764 | } |
| 765 | |
| 766 | DEBUG("%s: %d\n", __func__, ep_index(ep)); |
| 767 | } |
| 768 | |
| 769 | static const struct usb_gadget_ops s3c_udc_ops = { |
| 770 | /* current versions must always be self-powered */ |
| 771 | }; |
| 772 | |
| 773 | static struct s3c_udc memory = { |
| 774 | .usb_address = 0, |
| 775 | .gadget = { |
| 776 | .ops = &s3c_udc_ops, |
| 777 | .ep0 = &memory.ep[0].ep, |
| 778 | .name = driver_name, |
| 779 | }, |
| 780 | |
| 781 | /* control endpoint */ |
| 782 | .ep[0] = { |
| 783 | .ep = { |
| 784 | .name = ep0name, |
| 785 | .ops = &s3c_ep_ops, |
| 786 | .maxpacket = EP0_FIFO_SIZE, |
| 787 | }, |
| 788 | .dev = &memory, |
| 789 | |
| 790 | .bEndpointAddress = 0, |
| 791 | .bmAttributes = 0, |
| 792 | |
| 793 | .ep_type = ep_control, |
| 794 | }, |
| 795 | |
| 796 | /* first group of endpoints */ |
| 797 | .ep[1] = { |
| 798 | .ep = { |
| 799 | .name = "ep1in-bulk", |
| 800 | .ops = &s3c_ep_ops, |
| 801 | .maxpacket = EP_FIFO_SIZE, |
| 802 | }, |
| 803 | .dev = &memory, |
| 804 | |
| 805 | .bEndpointAddress = USB_DIR_IN | 1, |
| 806 | .bmAttributes = USB_ENDPOINT_XFER_BULK, |
| 807 | |
| 808 | .ep_type = ep_bulk_out, |
| 809 | .fifo_num = 1, |
| 810 | }, |
| 811 | |
| 812 | .ep[2] = { |
| 813 | .ep = { |
| 814 | .name = "ep2out-bulk", |
| 815 | .ops = &s3c_ep_ops, |
| 816 | .maxpacket = EP_FIFO_SIZE, |
| 817 | }, |
| 818 | .dev = &memory, |
| 819 | |
| 820 | .bEndpointAddress = USB_DIR_OUT | 2, |
| 821 | .bmAttributes = USB_ENDPOINT_XFER_BULK, |
| 822 | |
| 823 | .ep_type = ep_bulk_in, |
| 824 | .fifo_num = 2, |
| 825 | }, |
| 826 | |
| 827 | .ep[3] = { |
| 828 | .ep = { |
| 829 | .name = "ep3in-int", |
| 830 | .ops = &s3c_ep_ops, |
| 831 | .maxpacket = EP_FIFO_SIZE, |
| 832 | }, |
| 833 | .dev = &memory, |
| 834 | |
| 835 | .bEndpointAddress = USB_DIR_IN | 3, |
| 836 | .bmAttributes = USB_ENDPOINT_XFER_INT, |
| 837 | |
| 838 | .ep_type = ep_interrupt, |
| 839 | .fifo_num = 3, |
| 840 | }, |
| 841 | }; |
| 842 | |
| 843 | /* |
| 844 | * probe - binds to the platform device |
| 845 | */ |
| 846 | |
| 847 | int s3c_udc_probe(struct s3c_plat_otg_data *pdata) |
| 848 | { |
| 849 | struct s3c_udc *dev = &memory; |
| 850 | int retval = 0, i; |
| 851 | |
| 852 | DEBUG("%s: %p\n", __func__, pdata); |
| 853 | |
| 854 | dev->pdata = pdata; |
| 855 | |
| 856 | phy = (struct s3c_usbotg_phy *)pdata->regs_phy; |
| 857 | reg = (struct s3c_usbotg_reg *)pdata->regs_otg; |
| 858 | usb_phy_ctrl = pdata->usb_phy_ctrl; |
| 859 | |
| 860 | /* regs_otg = (void *)pdata->regs_otg; */ |
| 861 | |
| 862 | dev->gadget.is_dualspeed = 1; /* Hack only*/ |
| 863 | dev->gadget.is_otg = 0; |
| 864 | dev->gadget.is_a_peripheral = 0; |
| 865 | dev->gadget.b_hnp_enable = 0; |
| 866 | dev->gadget.a_hnp_support = 0; |
| 867 | dev->gadget.a_alt_hnp_support = 0; |
| 868 | |
| 869 | the_controller = dev; |
| 870 | |
| 871 | for (i = 0; i < S3C_MAX_ENDPOINTS+1; i++) { |
| 872 | dev->dma_buf[i] = kmalloc(DMA_BUFFER_SIZE, GFP_KERNEL); |
| 873 | dev->dma_addr[i] = (dma_addr_t) dev->dma_buf[i]; |
| 874 | invalidate_dcache_range((unsigned long) dev->dma_buf[i], |
| 875 | (unsigned long) (dev->dma_buf[i] |
| 876 | + DMA_BUFFER_SIZE)); |
| 877 | } |
| 878 | usb_ctrl = dev->dma_buf[0]; |
| 879 | usb_ctrl_dma_addr = dev->dma_addr[0]; |
| 880 | |
| 881 | udc_reinit(dev); |
| 882 | |
| 883 | return retval; |
| 884 | } |
| 885 | |
| 886 | int usb_gadget_handle_interrupts() |
| 887 | { |
| 888 | u32 intr_status = readl(®->gintsts); |
| 889 | u32 gintmsk = readl(®->gintmsk); |
| 890 | |
| 891 | if (intr_status & gintmsk) |
| 892 | return s3c_udc_irq(1, (void *)the_controller); |
| 893 | return 0; |
| 894 | } |