Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / e3568a87e432491130bda87ce63857e902927e97 / . / configs / ls1046aqds_lpuart_defconfig
blob: 9c1df2416aa53c123d2545603a9e9865083bb8d2 [file] [log] [blame]
Shaohui Xie56007a02016-10-28 14:24:02 +0800[diff] [blame]1CONFIG_ARM=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]2CONFIG_COUNTER_FREQUENCY=25000000
Shaohui Xie56007a02016-10-28 14:24:02 +0800[diff] [blame]3CONFIG_TARGET_LS1046AQDS=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]4CONFIG_TEXT_BASE=0x60100000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]5CONFIG_SYS_MALLOC_LEN=0x120000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=2
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]7CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
8CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]9CONFIG_ENV_SIZE=0x20000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]10CONFIG_ENV_SECT_SIZE=0x20000
Tom Rini1a195882021-08-18 23:12:33 -0400[diff] [blame]11CONFIG_SYS_I2C_MXC_I2C1=y
12CONFIG_SYS_I2C_MXC_I2C2=y
13CONFIG_SYS_I2C_MXC_I2C3=y
14CONFIG_SYS_I2C_MXC_I2C4=y
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]15CONFIG_DM_GPIO=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]16CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart"
Tom Rini9d291f42022-06-20 08:07:44 -0400[diff] [blame]17CONFIG_FSL_LS_PPA=y
18CONFIG_ENV_ADDR=0x60300000
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]19CONFIG_PCI=y
Tom Rini9d291f42022-06-20 08:07:44 -0400[diff] [blame]20CONFIG_AHCI=y
21CONFIG_LAYERSCAPE_NS_ACCESS=y
Tom Rini7485ebf62022-06-20 08:07:45 -0400[diff] [blame]22CONFIG_PCIE1=y
23CONFIG_PCIE2=y
24CONFIG_PCIE3=y
Tom Rini2c082ab2021-07-26 21:10:37 -0400[diff] [blame]25CONFIG_FSL_USE_PCA9547_MUX=y
Tom Rini89cdcab2021-12-12 22:12:31 -0500[diff] [blame]26CONFIG_VID=y
27CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv"
28CONFIG_VOL_MONITOR_INA220=y
29CONFIG_VOL_MONITOR_IR36021_SET=y
Tom Rinie24547a2022-03-30 18:07:32 -0400[diff] [blame]30CONFIG_FSL_QIXIS=y
31# CONFIG_QIXIS_I2C_ACCESS is not set
Tom Rini76fbc6f2022-04-01 10:33:18 -0400[diff] [blame]32CONFIG_SYS_MEMTEST_START=0x80000000
33CONFIG_SYS_MEMTEST_END=0x9fffffff
Alper Nebi Yasak2beb0f42022-01-29 18:25:30 +0300[diff] [blame]34CONFIG_REMAKE_ELF=y
Tom Rini5ca768d2022-01-24 21:08:41 +0000[diff] [blame]35CONFIG_MP=y
Shaohui Xie56007a02016-10-28 14:24:02 +0800[diff] [blame]36CONFIG_FIT_VERBOSE=y
37CONFIG_OF_BOARD_SETUP=y
Tom Rini8c70baa2021-12-14 13:36:40 -0500[diff] [blame]38CONFIG_DYNAMIC_SYS_CLK_FREQ=y
Tom Riniadb7a192023-03-27 13:39:17 -0400[diff] [blame]39CONFIG_DISTRO_DEFAULTS=y
Shaohui Xie56007a02016-10-28 14:24:02 +0800[diff] [blame]40CONFIG_BOOTDELAY=10
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]41CONFIG_USE_BOOTARGS=y
42CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]43CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;;"
Tom Rinif05f9d82022-04-13 09:14:57 -0400[diff] [blame]44CONFIG_ARCH_MISC_INIT=y
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]45CONFIG_MISC_INIT_R=y
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]46CONFIG_SYS_MAXARGS=64
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]47CONFIG_SYS_PBSIZE=532
Shaohui Xie56007a02016-10-28 14:24:02 +0800[diff] [blame]48CONFIG_CMD_BOOTZ=y
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]49CONFIG_CMD_IMLS=y
Shaohui Xie56007a02016-10-28 14:24:02 +0800[diff] [blame]50CONFIG_CMD_GREPENV=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]51CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Shaohui Xie56007a02016-10-28 14:24:02 +0800[diff] [blame]52CONFIG_CMD_MEMINFO=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]53CONFIG_CMD_MEMTEST=y
Biwen Li2ffefc32021-02-05 19:02:13 +0800[diff] [blame]54CONFIG_CMD_GPIO=y
Tom Rini3c0d7a22021-02-15 13:34:30 -0500[diff] [blame]55CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]56CONFIG_CMD_I2C=y
Shaohui Xie56007a02016-10-28 14:24:02 +0800[diff] [blame]57CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]58CONFIG_CMD_NAND=y
Hou Zhiqiang14ca07e2018-02-05 13:46:47 +0800[diff] [blame]59CONFIG_CMD_PCI=y
Tom Rinie791a022017-08-11 11:20:19 -0400[diff] [blame]60CONFIG_CMD_USB=y
Shaohui Xie56007a02016-10-28 14:24:02 +0800[diff] [blame]61CONFIG_CMD_CACHE=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]62CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
Shaohui Xie56007a02016-10-28 14:24:02 +0800[diff] [blame]63CONFIG_OF_CONTROL=y
Kuldeep Singh248a2932020-07-30 15:38:07 +0530[diff] [blame]64CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]65CONFIG_ENV_IS_IN_FLASH=y
Simon Glass701ef062022-01-31 07:49:33 -0700[diff] [blame]66CONFIG_SATA=y
Peng Ma6dff14c2019-01-30 19:14:47 +0800[diff] [blame]67CONFIG_SATA_CEVA=y
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]68CONFIG_FSL_CAAM=y
Tom Rinif7246c22021-08-21 13:50:17 -0400[diff] [blame]69CONFIG_DYNAMIC_DDR_CLK_FREQ=y
Tom Rini468c2d52021-08-21 13:50:18 -0400[diff] [blame]70CONFIG_DDR_ECC=y
71CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]72CONFIG_MPC8XXX_GPIO=y
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]73CONFIG_DM_I2C=y
Tom Rinib1b13072021-08-18 23:12:37 -0400[diff] [blame]74CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]75CONFIG_SYS_I2C_EEPROM_ADDR=0x57
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]76CONFIG_FSL_ESDHC=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]77CONFIG_MTD=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]78CONFIG_MTD_NOR_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]79CONFIG_FLASH_CFI_DRIVER=y
Tom Rini18b76772022-02-25 11:19:52 -0500[diff] [blame]80CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]81CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
Tom Rini302bd672022-07-23 13:04:55 -0400[diff] [blame]82CONFIG_SYS_FLASH_EMPTY_INFO=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]83CONFIG_SYS_FLASH_CFI=y
Tom Rini2e35d822022-07-23 13:05:05 -0400[diff] [blame]84CONFIG_SYS_FLASH_QUIET_TEST=y
Tom Rinid38112c2022-07-23 13:05:04 -0400[diff] [blame]85CONFIG_SYS_MAX_FLASH_SECT=1024
Patrick Delaunay1576abf2022-01-04 14:24:00 +0100[diff] [blame]86CONFIG_SYS_MAX_FLASH_BANKS=2
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]87CONFIG_MTD_RAW_NAND=y
Tom Rinia73788c2021-09-22 14:50:37 -0400[diff] [blame]88CONFIG_NAND_FSL_IFC=y
Tom Rinifdae0072021-09-22 14:50:34 -0400[diff] [blame]89CONFIG_SYS_NAND_ONFI_DETECTION=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]90CONFIG_SF_DEFAULT_BUS=1
Kuldeep Singh63012802021-11-09 14:52:26 +0530[diff] [blame]91CONFIG_SPI_FLASH_EON=y
92CONFIG_SPI_FLASH_STMICRO=y
93CONFIG_SPI_FLASH_SST=y
Alexandru Gagniucd83e98c2017-08-01 17:19:59 -0700[diff] [blame]94CONFIG_PHYLIB=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]95CONFIG_PHYLIB_10G=y
96CONFIG_PHY_REALTEK=y
97CONFIG_PHY_VITESSE=y
Hou Zhiqiang14ca07e2018-02-05 13:46:47 +0800[diff] [blame]98CONFIG_E1000=y
Mark Kettenisf8463d62022-01-22 20:38:11 +0100[diff] [blame]99CONFIG_NVME_PCI=y
Hou Zhiqiang14ca07e2018-02-05 13:46:47 +0800[diff] [blame]100CONFIG_DM_PCI_COMPAT=y
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800[diff] [blame]101CONFIG_PCIE_LAYERSCAPE_RC=y
102CONFIG_PCIE_LAYERSCAPE_EP=y
Peng Ma6dff14c2019-01-30 19:14:47 +0800[diff] [blame]103CONFIG_DM_SCSI=y
Shaohui Xie56007a02016-10-28 14:24:02 +0800[diff] [blame]104CONFIG_DM_SERIAL=y
105CONFIG_FSL_LPUART=y
Tom Rini037415a2022-03-23 17:20:00 -0400[diff] [blame]106CONFIG_LPUART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]107CONFIG_SPI=y
Masahiro Yamada74f09b82016-12-07 22:10:25 +0900[diff] [blame]108CONFIG_DM_SPI=y
109CONFIG_FSL_DSPI=y
Tang Yuantian73259b42017-01-20 17:12:49 +0800[diff] [blame]110CONFIG_USB=y
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]111CONFIG_USB_XHCI_HCD=y
112CONFIG_USB_XHCI_DWC3=y