| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Stephen Warren | 57ab23f | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. | ||||
| Stephen Warren | 57ab23f | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 4 | */ |
| 5 | |||||
| 6 | #ifndef __MX6_COMMON_H | ||||
| 7 | #define __MX6_COMMON_H | ||||
| 8 | |||||
| Simon Glass | fb64e36 | 2020-05-10 11:40:09 -0600 | [diff] [blame] | 9 | #include <linux/stringify.h> |
| 10 | |||||
| Stefan Agner | be8b7c5 | 2018-01-05 15:08:19 +0100 | [diff] [blame] | 11 | #if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) |
| 12 | #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ | ||||
| 13 | #define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK | ||||
| 14 | #else | ||||
| Fabio Estevam | 1340929 | 2014-01-29 17:39:49 -0200 | [diff] [blame] | 15 | #ifndef CONFIG_SYS_L2CACHE_OFF |
| 16 | #define CONFIG_SYS_L2_PL310 | ||||
| 17 | #define CONFIG_SYS_PL310_BASE L2_PL310_BASE | ||||
| 18 | #endif | ||||
| 19 | |||||
| Peng Fan | d2d4fcb | 2015-07-20 19:28:26 +0800 | [diff] [blame] | 20 | #endif |
| 21 | #define CONFIG_BOARD_POSTCLK_INIT | ||||
| Ye.Li | 2b7f877 | 2014-10-30 18:20:59 +0800 | [diff] [blame] | 22 | #define CONFIG_MXC_GPT_HCLK |
| Gabriel Huau | 170ceaf | 2014-07-26 11:35:43 -0700 | [diff] [blame] | 23 | |
| Peng Fan | 3783b9b | 2016-01-04 15:27:22 +0800 | [diff] [blame] | 24 | #define CONFIG_SYS_BOOTM_LEN 0x1000000 |
| 25 | |||||
| Peter Robinson | 4b67150 | 2015-05-22 17:30:45 +0100 | [diff] [blame] | 26 | #include <linux/sizes.h> |
| 27 | #include <asm/arch/imx-regs.h> | ||||
| Stefano Babic | 33731bc | 2017-06-29 10:16:06 +0200 | [diff] [blame] | 28 | #include <asm/mach-imx/gpio.h> |
| Peter Robinson | 4b67150 | 2015-05-22 17:30:45 +0100 | [diff] [blame] | 29 | |
| Peter Robinson | e193ff2 | 2015-05-22 17:30:46 +0100 | [diff] [blame] | 30 | #ifndef CONFIG_MX6 |
| 31 | #define CONFIG_MX6 | ||||
| 32 | #endif | ||||
| 33 | |||||
| Gong Qianyu | 52de2e5 | 2015-10-26 19:47:42 +0800 | [diff] [blame] | 34 | #define CONFIG_SYS_FSL_CLK |
| Peter Robinson | e193ff2 | 2015-05-22 17:30:46 +0100 | [diff] [blame] | 35 | |
| Peter Robinson | 61a1b9d | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 36 | /* Miscellaneous configurable options */ |
| Peter Robinson | 61a1b9d | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 37 | #define CONFIG_SYS_CBSIZE 512 |
| 38 | #define CONFIG_SYS_MAXARGS 32 | ||||
| Peter Robinson | 61a1b9d | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 39 | |
| Peter Robinson | be6c5f1 | 2015-05-22 17:30:52 +0100 | [diff] [blame] | 40 | /* MMC */ |
| Peter Robinson | be6c5f1 | 2015-05-22 17:30:52 +0100 | [diff] [blame] | 41 | |
| Sven Ebenfeld | eba5e33 | 2016-11-06 16:37:55 +0100 | [diff] [blame] | 42 | #ifdef CONFIG_SPL_BUILD |
| Simon Glass | 284cb9c | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 43 | #define CONFIG_SPL_DRIVERS_MISC |
| Sven Ebenfeld | eba5e33 | 2016-11-06 16:37:55 +0100 | [diff] [blame] | 44 | #endif |
| Gary Bisson | 70466e4 | 2016-08-25 19:03:18 +0200 | [diff] [blame] | 45 | |
| Stephen Warren | 57ab23f | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 46 | #endif |