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git01.mediatek.com / filogic / uboot / 2cc823ef957e354a2dcfb0e8f25157cd2dffa272 / . / configs / sama5d3_xplained_nandflash_defconfig
blob: b26e1899faa82f18780d968e91a9237b863c8fa3 [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]3CONFIG_ARCH_CPU_INIT=y
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]4CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]5CONFIG_SYS_TEXT_BASE=0x26f00000
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]6CONFIG_TARGET_SAMA5D3_XPLAINED=y
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]7CONFIG_SPL_GPIO=y
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]8CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]9CONFIG_SPL_LIBGENERIC_SUPPORT=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]10CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]11CONFIG_NR_DRAM_BANKS=1
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]12CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]13CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]14CONFIG_SPL_TEXT_BASE=0x300000
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]15CONFIG_SPL_SERIAL=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]16CONFIG_SPL_DRIVERS_MISC=y
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]17CONFIG_SPL=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]18CONFIG_DEBUG_UART_BOARD_INIT=y
19CONFIG_DEBUG_UART_BASE=0xffffee00
20CONFIG_DEBUG_UART_CLOCK=132000000
Tom Rinid49f5822020-02-28 13:28:38 -0500[diff] [blame]21CONFIG_ENV_OFFSET_REDUND=0x100000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]22CONFIG_DEBUG_UART=y
Adam Ford58dbf862018-02-06 07:58:59 -0600[diff] [blame]23CONFIG_ENV_VARS_UBOOT_CONFIG=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]24CONFIG_SYS_LOAD_ADDR=0x22000000
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]25CONFIG_FIT=y
Wenyou Yange035ea72017-09-14 11:07:44 +0800[diff] [blame]26CONFIG_NAND_BOOT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]27CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]28CONFIG_USE_BOOTARGS=y
Eugen Hristev68b37ab2018-04-24 12:00:16 +0300[diff] [blame]29CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]30# CONFIG_DISPLAY_BOARDINFO is not set
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]31CONFIG_SPL_NAND_SUPPORT=y
Adam Ford3a383772020-07-03 08:09:44 -0500[diff] [blame]32CONFIG_SPL_NAND_DRIVERS=y
Adam Ford5e56ad02020-07-03 08:09:45 -0500[diff] [blame]33CONFIG_SPL_NAND_BASE=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]34CONFIG_HUSH_PARSER=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]35CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]36# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]37# CONFIG_CMD_LOADS is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]38CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]39CONFIG_CMD_NAND=y
40CONFIG_CMD_NAND_TRIMFFS=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]41CONFIG_CMD_USB=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]42CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]43CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]44CONFIG_CMD_PING=y
Eugen Hristev858f8d52021-05-26 16:05:57 +0300[diff] [blame]45CONFIG_CMD_HASH=y
46CONFIG_HASH_VERIFY=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]47CONFIG_CMD_EXT4=y
48CONFIG_CMD_EXT4_WRITE=y
49CONFIG_CMD_FAT=y
Tom Rini2b62b912018-11-13 19:54:45 -0500[diff] [blame]50CONFIG_CMD_MTDPARTS=y
Heiko Schocher09dbb852016-09-21 07:58:19 +0200[diff] [blame]51CONFIG_CMD_UBI=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]52CONFIG_OF_CONTROL=y
53CONFIG_SPL_OF_CONTROL=y
54CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]55CONFIG_ENV_IS_IN_NAND=y
Tom Rini4bb26a42019-11-10 11:28:03 -0500[diff] [blame]56CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]57CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]58CONFIG_DM=y
59CONFIG_SPL_DM=y
60CONFIG_SPL_DM_SEQ_ALIAS=y
61CONFIG_CLK=y
62CONFIG_SPL_CLK=y
63CONFIG_CLK_AT91=y
64CONFIG_AT91_UTMI=y
65CONFIG_AT91_H32MX=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]66CONFIG_AT91_GPIO=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]67CONFIG_GENERIC_ATMEL_MCI=y
Miquel Raynal72d7b8b2019-10-03 19:50:07 +0200[diff] [blame]68CONFIG_MTD=y
Adam Ford9c519182018-07-08 08:11:07 -0500[diff] [blame]69CONFIG_NAND_ATMEL=y
Derald D. Woods7830fc52018-12-15 01:36:46 -0600[diff] [blame]70CONFIG_PMECC_CAP=4
71CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
Tom Rinifae1dab2021-09-22 14:50:29 -0400[diff] [blame]72CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
Tom Rinifdae0072021-09-22 14:50:34 -0400[diff] [blame]73CONFIG_SYS_NAND_ONFI_DETECTION=y
Tom Rini2510a812021-09-22 14:50:30 -0400[diff] [blame]74CONFIG_SYS_NAND_PAGE_COUNT=0x40
Tom Rinifae1dab2021-09-22 14:50:29 -0400[diff] [blame]75CONFIG_SYS_NAND_PAGE_SIZE=0x800
76CONFIG_SYS_NAND_OOBSIZE=0x40
Tom Rini1cf7c412021-09-22 14:50:38 -0400[diff] [blame]77CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
78CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]79CONFIG_DM_ETH=y
80CONFIG_MACB=y
81CONFIG_PINCTRL=y
82CONFIG_SPL_PINCTRL=y
83CONFIG_PINCTRL_AT91=y
84CONFIG_DM_SERIAL=y
Wenyou Yange46dd152017-04-14 08:51:47 +0800[diff] [blame]85CONFIG_DEBUG_UART_ANNOUNCE=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]86CONFIG_ATMEL_USART=y
Wenyou.Yang@microchip.com272167d2017-08-15 17:40:27 +0800[diff] [blame]87CONFIG_TIMER=y
88CONFIG_SPL_TIMER=y
89CONFIG_ATMEL_PIT_TIMER=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]90CONFIG_USB=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]91CONFIG_USB_EHCI_HCD=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]92CONFIG_USB_STORAGE=y
Eugen Hristev8ef7e222018-09-18 10:35:38 +0300[diff] [blame]93CONFIG_W1=y
94CONFIG_W1_GPIO=y
95CONFIG_W1_EEPROM=y
96CONFIG_W1_EEPROM_DS24XXX=y
Eugen Hristevebd04ad2018-09-18 10:35:49 +0300[diff] [blame]97CONFIG_OF_LIBFDT_OVERLAY=y