Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 2cc823ef957e354a2dcfb0e8f25157cd2dffa272 / . / configs / ls1012afrwy_tfa_SECURE_BOOT_defconfig
blob: e11d6f8437545185c171097af688a2cff6dd161e [file] [log] [blame]
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]1CONFIG_ARM=y
2CONFIG_TARGET_LS1012AFRWY=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]3CONFIG_TFABOOT=y
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x82000000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]5CONFIG_NR_DRAM_BANKS=2
Tom Rini56fd1e12020-11-30 12:50:32 -0500[diff] [blame]6CONFIG_SYS_MEMTEST_START=0x80000000
7CONFIG_SYS_MEMTEST_END=0x9fffffff
Ashish Kumar17f36a22020-04-29 17:42:03 +0530[diff] [blame]8CONFIG_ENV_SIZE=0x2000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]9CONFIG_NXP_ESBC=y
Tom Rinie065fb12021-08-28 21:34:49 -0400[diff] [blame]10CONFIG_SYS_MALLOC_LEN=0x500000
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]11CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy"
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]13CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
14CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
Peng Ma9d75b2d2019-01-30 19:18:43 +0800[diff] [blame]15CONFIG_AHCI=y
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]16CONFIG_DISTRO_DEFAULTS=y
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]17# CONFIG_SYS_MALLOC_F is not set
18CONFIG_FIT_VERBOSE=y
19CONFIG_OF_BOARD_SETUP=y
20CONFIG_OF_STDOUT_VIA_ALIAS=y
21CONFIG_BOOTDELAY=10
22CONFIG_USE_BOOTARGS=y
23CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
24# CONFIG_DISPLAY_BOARDINFO is not set
25CONFIG_DISPLAY_BOARDINFO_LATE=y
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]26CONFIG_CMD_GREPENV=y
Tom Rini32c75d62020-05-26 15:06:18 -0400[diff] [blame]27CONFIG_CMD_MEMINFO=y
Michal Simeka9565e92020-05-04 15:26:20 +0200[diff] [blame]28CONFIG_CMD_MEMTEST=y
Biwen Li52d74352021-02-05 19:02:04 +0800[diff] [blame]29CONFIG_CMD_GPIO=y
Tom Rini3c0d7a22021-02-15 13:34:30 -0500[diff] [blame]30CONFIG_CMD_GPT=y
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]31CONFIG_CMD_I2C=y
32CONFIG_CMD_MMC=y
33CONFIG_CMD_PCI=y
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]34CONFIG_CMD_USB=y
35CONFIG_CMD_CACHE=y
36CONFIG_OF_CONTROL=y
Kuldeep Singh248a2932020-07-30 15:38:07 +0530[diff] [blame]37CONFIG_ENV_OVERWRITE=y
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]38CONFIG_NET_RANDOM_ETHADDR=y
39CONFIG_DM=y
Peng Ma9d75b2d2019-01-30 19:18:43 +0800[diff] [blame]40CONFIG_SATA_CEVA=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]41CONFIG_DM_I2C=y
Tom Rinib1b13072021-08-18 23:12:37 -0400[diff] [blame]42CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Yangbo Luadb19e12019-06-21 11:42:26 +0800[diff] [blame]43CONFIG_FSL_ESDHC=y
Miquel Raynal803baa22019-10-03 19:50:08 +0200[diff] [blame]44CONFIG_MTD=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]45CONFIG_DM_SPI_FLASH=y
Ashish Kumar820fa952019-05-31 16:03:28 +0530[diff] [blame]46# CONFIG_SPI_FLASH_BAR is not set
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]47CONFIG_SPI_FLASH_WINBOND=y
48CONFIG_FSL_PFE=y
49CONFIG_DM_ETH=y
50CONFIG_E1000=y
Tom Rinifa943162020-10-29 10:48:01 -0400[diff] [blame]51CONFIG_NVME=y
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]52CONFIG_PCI=y
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800[diff] [blame]53CONFIG_PCIE_LAYERSCAPE_RC=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]54CONFIG_DM_RTC=y
Peng Ma9d75b2d2019-01-30 19:18:43 +0800[diff] [blame]55CONFIG_DM_SCSI=y
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]56CONFIG_SYS_NS16550=y
57CONFIG_SPI=y
58CONFIG_DM_SPI=y
Ashish Kumar820fa952019-05-31 16:03:28 +0530[diff] [blame]59CONFIG_FSL_QSPI=y
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]60CONFIG_USB=y
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]61CONFIG_USB_XHCI_HCD=y
62CONFIG_USB_XHCI_DWC3=y
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]63CONFIG_RSA=y
Rajesh Bhagat487084e2018-11-05 18:03:08 +0000[diff] [blame]64CONFIG_RSA_SOFTWARE_EXP=y