blob: 26bf80ec52b49d5831d5092eb6531598a44ff8d7 [file] [log] [blame]
Michal Simek72536fd2015-11-20 13:17:22 +01001/*
2 * Copyright 2015 - 2016 Xilinx, Inc.
3 *
4 * Michal Simek <michal.simek@xilinx.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#include <common.h>
10#include <debug_uart.h>
11#include <spl.h>
12
13#include <asm/io.h>
14#include <asm/spl.h>
15#include <asm/arch/hardware.h>
16#include <asm/arch/sys_proto.h>
17
18void board_init_f(ulong dummy)
19{
20 psu_init();
21 board_early_init_r();
22
23#ifdef CONFIG_DEBUG_UART
24 /* Uart debug for sure */
25 debug_uart_init();
26 puts("Debug uart enabled\n"); /* or printch() */
27#endif
28 /* Delay is required for clocks to be propagated */
29 udelay(1000000);
30
31 /* Clear the BSS */
32 memset(__bss_start, 0, __bss_end - __bss_start);
33
34 /* No need to call timer init - it is empty for ZynqMP */
35 board_init_r(NULL, 0);
36}
37
Michal Simek3eb32de2016-08-15 09:41:36 +020038static void ps_mode_reset(ulong mode)
39{
Michal Simek3eb32de2016-08-15 09:41:36 +020040 writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
41 &crlapb_base->boot_pin_ctrl);
42 udelay(5);
43 writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT |
44 mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
45 &crlapb_base->boot_pin_ctrl);
46}
47
48/*
49 * Set default PS_MODE1 which is used for USB ULPI phy reset
50 * Also other resets can be connected to this certain pin
51 */
52#ifndef MODE_RESET
53# define MODE_RESET PS_MODE1
54#endif
55
Michal Simek72536fd2015-11-20 13:17:22 +010056#ifdef CONFIG_SPL_BOARD_INIT
57void spl_board_init(void)
58{
59 preloader_console_init();
Michal Simek3eb32de2016-08-15 09:41:36 +020060 ps_mode_reset(MODE_RESET);
Michal Simek72536fd2015-11-20 13:17:22 +010061 board_init();
62}
63#endif
64
65u32 spl_boot_device(void)
66{
67 u32 reg = 0;
68 u8 bootmode;
69
Michal Simek94ddcaa2016-08-30 16:17:27 +020070#if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED)
71 /* Change default boot mode at run-time */
Michal Simek833e0c42016-10-25 11:43:02 +020072 writel(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT,
Michal Simek94ddcaa2016-08-30 16:17:27 +020073 &crlapb_base->boot_mode);
74#endif
75
Michal Simek72536fd2015-11-20 13:17:22 +010076 reg = readl(&crlapb_base->boot_mode);
Michal Simek833e0c42016-10-25 11:43:02 +020077 if (reg >> BOOT_MODE_ALT_SHIFT)
78 reg >>= BOOT_MODE_ALT_SHIFT;
79
Michal Simek72536fd2015-11-20 13:17:22 +010080 bootmode = reg & BOOT_MODES_MASK;
81
82 switch (bootmode) {
83 case JTAG_MODE:
84 return BOOT_DEVICE_RAM;
85#ifdef CONFIG_SPL_MMC_SUPPORT
Jean-Francois Dagenais865778a2017-04-02 21:44:34 -040086 case SD_MODE1:
Michal Simeka8896202017-03-02 11:02:55 +010087 case SD1_LSHFT_MODE: /* not working on silicon v1 */
Jean-Francois Dagenais865778a2017-04-02 21:44:34 -040088/* if both controllers enabled, then these two are the second controller */
89#if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1)
90 return BOOT_DEVICE_MMC2;
91/* else, fall through, the one SDHCI controller that is enabled is number 1 */
92#endif
Michal Simek72536fd2015-11-20 13:17:22 +010093 case SD_MODE:
Jean-Francois Dagenais865778a2017-04-02 21:44:34 -040094 case EMMC_MODE:
Michal Simek72536fd2015-11-20 13:17:22 +010095 return BOOT_DEVICE_MMC1;
96#endif
Michal Simek12398ea2016-08-19 14:14:52 +020097#ifdef CONFIG_SPL_DFU_SUPPORT
98 case USB_MODE:
99 return BOOT_DEVICE_DFU;
100#endif
Michal Simek2740d372016-10-26 09:24:32 +0200101#ifdef CONFIG_SPL_SATA_SUPPORT
102 case SW_SATA_MODE:
103 return BOOT_DEVICE_SATA;
104#endif
Michal Simek72536fd2015-11-20 13:17:22 +0100105 default:
106 printf("Invalid Boot Mode:0x%x\n", bootmode);
107 break;
108 }
109
110 return 0;
111}
112
Marek Vasut64d64bb2016-05-14 23:42:07 +0200113u32 spl_boot_mode(const u32 boot_device)
Michal Simek72536fd2015-11-20 13:17:22 +0100114{
Jean-Francois Dagenais1a77d412017-04-02 21:44:35 -0400115 switch (boot_device) {
Michal Simek72536fd2015-11-20 13:17:22 +0100116 case BOOT_DEVICE_RAM:
117 return 0;
118 case BOOT_DEVICE_MMC1:
Jean-Francois Dagenais865778a2017-04-02 21:44:34 -0400119 case BOOT_DEVICE_MMC2:
Michal Simek72536fd2015-11-20 13:17:22 +0100120 return MMCSD_MODE_FS;
121 default:
122 puts("spl: error: unsupported device\n");
123 hang();
124 }
125}
126
127__weak void psu_init(void)
128{
129 /*
130 * This function is overridden by the one in
131 * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
132 */
133}
134
135#ifdef CONFIG_SPL_OS_BOOT
136int spl_start_uboot(void)
137{
Michal Simek456e4542017-01-09 10:05:16 +0100138 handoff_setup();
139
Michal Simek72536fd2015-11-20 13:17:22 +0100140 return 0;
141}
142#endif
143
144#ifdef CONFIG_SPL_LOAD_FIT
145int board_fit_config_name_match(const char *name)
146{
147 /* Just empty function now - can't decide what to choose */
148 debug("%s: %s\n", __func__, name);
149
150 return 0;
151}
152#endif