| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_MVEBU=y |
| Tom Rini | 07edfae | 2018-02-03 12:10:38 -0500 | [diff] [blame] | 3 | CONFIG_SYS_TEXT_BASE=0x00000000 |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 4 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| Konstantin Porotchkin | 7f8dfea | 2017-02-16 13:52:22 +0200 | [diff] [blame] | 5 | CONFIG_TARGET_MVEBU_ARMADA_37XX=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 6 | CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db" |
| Tom Rini | 256aa74 | 2017-06-19 09:47:40 -0400 | [diff] [blame] | 7 | CONFIG_DEBUG_UART=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 8 | CONFIG_AHCI=y |
| Tom Rini | 6c3798f | 2018-02-10 20:27:45 -0500 | [diff] [blame] | 9 | CONFIG_DISTRO_DEFAULTS=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 10 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| Simon Glass | bd5618d | 2016-10-17 20:13:00 -0600 | [diff] [blame] | 11 | CONFIG_SYS_CONSOLE_INFO_QUIET=y |
| Lokesh Vutla | fbad370 | 2016-10-08 14:41:44 -0400 | [diff] [blame] | 12 | # CONFIG_DISPLAY_CPUINFO is not set |
| Lokesh Vutla | 94d95e4 | 2016-10-11 21:33:46 -0400 | [diff] [blame] | 13 | # CONFIG_DISPLAY_BOARDINFO is not set |
| Mario Six | f705544 | 2018-03-28 14:38:17 +0200 | [diff] [blame] | 14 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| Simon Glass | 62adede | 2017-01-23 13:31:19 -0700 | [diff] [blame] | 15 | CONFIG_ARCH_EARLY_INIT_R=y |
| Simon Glass | 7a99a87 | 2017-01-23 13:31:20 -0700 | [diff] [blame] | 16 | CONFIG_BOARD_EARLY_INIT_F=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 17 | # CONFIG_CMD_FLASH is not set |
| Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 18 | CONFIG_CMD_GPIO=y |
| 19 | CONFIG_CMD_I2C=y |
| Stefan Roese | b27d35e | 2016-12-09 15:13:35 +0100 | [diff] [blame] | 20 | CONFIG_CMD_MMC=y |
| Ken Ma | 71c37bc | 2018-03-26 15:57:32 +0800 | [diff] [blame] | 21 | CONFIG_CMD_PCI=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 22 | CONFIG_CMD_SF=y |
| 23 | CONFIG_CMD_SPI=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 24 | CONFIG_CMD_USB=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 25 | # CONFIG_CMD_SETEXPR is not set |
| 26 | CONFIG_CMD_TFTPPUT=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 27 | CONFIG_CMD_CACHE=y |
| 28 | CONFIG_CMD_TIME=y |
| Tom Rini | 79f4eea | 2017-05-01 11:41:11 -0400 | [diff] [blame] | 29 | CONFIG_CMD_MVEBU_BUBT=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 30 | CONFIG_CMD_EXT4_WRITE=y |
| Patrick Delaunay | c4bbbec | 2017-01-27 11:00:36 +0100 | [diff] [blame] | 31 | CONFIG_MAC_PARTITION=y |
| Tom Rini | 5b0b040 | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 32 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| Ken Ma | 1eeac42 | 2018-05-25 15:49:27 +0800 | [diff] [blame] | 33 | CONFIG_AHCI_MVEBU=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 34 | CONFIG_BLOCK_CACHE=y |
| Stefan Roese | 0b57ab1 | 2017-05-17 17:05:38 +0200 | [diff] [blame] | 35 | CONFIG_DM_GPIO=y |
| 36 | # CONFIG_MVEBU_GPIO is not set |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 37 | CONFIG_DM_I2C=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 38 | CONFIG_MISC=y |
| Marek Behún | 0afd934 | 2018-04-24 17:21:26 +0200 | [diff] [blame] | 39 | CONFIG_CLK=y |
| 40 | CONFIG_CLK_MVEBU=y |
| 41 | CONFIG_CLK_ARMADA_3720=y |
| Stefan Roese | b27d35e | 2016-12-09 15:13:35 +0100 | [diff] [blame] | 42 | CONFIG_DM_MMC=y |
| 43 | CONFIG_MMC_SDHCI=y |
| 44 | CONFIG_MMC_SDHCI_SDMA=y |
| 45 | CONFIG_MMC_SDHCI_XENON=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 46 | CONFIG_SPI_FLASH=y |
| 47 | CONFIG_SPI_FLASH_MACRONIX=y |
| 48 | CONFIG_SPI_FLASH_SPANSION=y |
| 49 | CONFIG_SPI_FLASH_STMICRO=y |
| 50 | CONFIG_PHYLIB=y |
| Mario Six | f504d1a | 2018-04-27 14:52:21 +0200 | [diff] [blame] | 51 | CONFIG_PHY_MARVELL=y |
| Tom Rini | ca22e96 | 2017-08-07 22:00:34 -0400 | [diff] [blame] | 52 | CONFIG_PHY_GIGE=y |
| Ken Ma | 71c37bc | 2018-03-26 15:57:32 +0800 | [diff] [blame] | 53 | CONFIG_E1000=y |
| Wilson Ding | 945f606 | 2018-03-26 15:57:30 +0800 | [diff] [blame] | 54 | CONFIG_PCI=y |
| 55 | CONFIG_DM_PCI=y |
| 56 | CONFIG_PCI_AARDVARK=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 57 | CONFIG_MVEBU_COMPHY_SUPPORT=y |
| Stefan Roese | 0b57ab1 | 2017-05-17 17:05:38 +0200 | [diff] [blame] | 58 | CONFIG_PINCTRL=y |
| 59 | CONFIG_PINCTRL_ARMADA_37XX=y |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 60 | # CONFIG_SPL_SERIAL_PRESENT is not set |
| Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 61 | CONFIG_DEBUG_MVEBU_A3700_UART=y |
| 62 | CONFIG_DEBUG_UART_BASE=0xd0012000 |
| 63 | CONFIG_DEBUG_UART_CLOCK=25804800 |
| 64 | CONFIG_DEBUG_UART_SHIFT=2 |
| 65 | CONFIG_DEBUG_UART_ANNOUNCE=y |
| 66 | CONFIG_MVEBU_A3700_UART=y |
| 67 | CONFIG_MVEBU_A3700_SPI=y |
| 68 | CONFIG_USB=y |
| 69 | CONFIG_DM_USB=y |
| 70 | CONFIG_USB_XHCI_HCD=y |
| 71 | CONFIG_USB_EHCI_HCD=y |
| 72 | CONFIG_USB_STORAGE=y |
| Chris Packham | 547cf41 | 2017-08-28 20:50:45 +1200 | [diff] [blame] | 73 | CONFIG_USB_HOST_ETHER=y |
| Chris Packham | b110e11 | 2017-08-28 20:50:46 +1200 | [diff] [blame] | 74 | CONFIG_USB_ETHER_ASIX=y |
| 75 | CONFIG_USB_ETHER_MCS7830=y |
| 76 | CONFIG_USB_ETHER_RTL8152=y |
| 77 | CONFIG_USB_ETHER_SMSC95XX=y |
| Tom Rini | 79f4eea | 2017-05-01 11:41:11 -0400 | [diff] [blame] | 78 | CONFIG_SHA1=y |
| 79 | CONFIG_SHA256=y |