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git01.mediatek.com / filogic / uboot / bade0a8143d39940b18c91829e8121f6e5d12ed5 / . / configs / evb-rk3036_defconfig
blob: b9242e83e0a24501750ec20dcad59f6bad96d05e [file] [log] [blame]
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]1CONFIG_ARM=y
Andy Yan26beb522017-07-24 17:51:07 +0800[diff] [blame]2# CONFIG_SPL_USE_ARCH_MEMCPY is not set
3# CONFIG_SPL_USE_ARCH_MEMSET is not set
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]5CONFIG_SYS_TEXT_BASE=0x60000000
Andy Yane92c5322017-07-24 17:51:30 +0800[diff] [blame]6CONFIG_SPL_LIBGENERIC_SUPPORT=y
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]7CONFIG_ROCKCHIP_RK3036=y
8CONFIG_TARGET_EVB_RK3036=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]9CONFIG_SPL_STACK_R_ADDR=0x80000
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]10CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]11CONFIG_DEBUG_UART=y
Tom Rini4100de42017-07-31 18:59:01 -0400[diff] [blame]12CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
Tom Rinib5bf5622017-08-25 17:50:27 -0400[diff] [blame]13# CONFIG_ANDROID_BOOT_IMAGE is not set
Lokesh Vutlafbad3702016-10-08 14:41:44 -0400[diff] [blame]14# CONFIG_DISPLAY_CPUINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]15CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Rini623d67e2018-02-06 12:15:38 -0500[diff] [blame]16# CONFIG_SPL_FRAMEWORK is not set
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]17CONFIG_SPL_STACK_R=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]18CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]19CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]20CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]21CONFIG_CMD_SF=y
22CONFIG_CMD_SPI=y
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]23# CONFIG_CMD_SETEXPR is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]24CONFIG_CMD_CACHE=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]25CONFIG_CMD_TIME=y
Patrick Delaunayf7e07722017-01-27 11:00:37 +0100[diff] [blame]26# CONFIG_SPL_DOS_PARTITION is not set
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +0100[diff] [blame]27# CONFIG_SPL_EFI_PARTITION is not set
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]28CONFIG_SPL_PARTITION_UUIDS=y
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]29CONFIG_REGMAP=y
30CONFIG_SYSCON=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]31CONFIG_CLK=y
Alex Kiernane80d2942018-05-29 15:30:55 +0000[diff] [blame]32CONFIG_FASTBOOT_FLASH=y
33CONFIG_FASTBOOT_FLASH_MMC_DEV=0
34CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]35CONFIG_ROCKCHIP_GPIO=y
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]36CONFIG_SYS_I2C_ROCKCHIP=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]37CONFIG_LED=y
Masahiro Yamada7942e912017-01-10 13:32:04 +0900[diff] [blame]38CONFIG_MMC_DW=y
Masahiro Yamadadc607f82017-01-10 13:32:03 +0900[diff] [blame]39CONFIG_MMC_DW_ROCKCHIP=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]40CONFIG_PINCTRL=y
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200[diff] [blame]41CONFIG_PINCTRL_ROCKCHIP_RK3036=y
Andy Yane92c5322017-07-24 17:51:30 +0800[diff] [blame]42# CONFIG_SPL_DM_SERIAL is not set
Simon Glasse0f177b2015-12-13 21:37:00 -0700[diff] [blame]43CONFIG_DEBUG_UART_BASE=0x20068000
44CONFIG_DEBUG_UART_CLOCK=24000000
45CONFIG_DEBUG_UART_SHIFT=2
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]46CONFIG_SYSRESET=y
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]47CONFIG_USB=y
48CONFIG_USB_GADGET=y
Maxime Ripard7f78b9d2017-09-07 08:58:08 +0200[diff] [blame]49CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
50CONFIG_USB_GADGET_VENDOR_NUM=0x2207
51CONFIG_USB_GADGET_PRODUCT_NUM=0x310a
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]52CONFIG_USB_GADGET_DWC2_OTG=y
Lukasz Majewskie364e4b2018-01-29 19:25:54 +0100[diff] [blame]53CONFIG_USB_FUNCTION_MASS_STORAGE=y
Andy Yane92c5322017-07-24 17:51:30 +0800[diff] [blame]54CONFIG_SPL_TINY_MEMSET=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]55CONFIG_CMD_DHRYSTONE=y
56CONFIG_ERRNO_STR=y