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git01.mediatek.com / filogic / uboot / df4262f7923cd08e0b3cb924afc17f8941c3da32 / . / drivers / mmc / pic32_sdhci.c
blob: 7a8e33dbc7a7669416e6356578bc5c81b4d42de2 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]2/*
3 * Support of SDHCI for Microchip PIC32 SoC.
4 *
5 * Copyright (C) 2015 Microchip Technology Inc.
6 * Andrei Pistirica <andrei.pistirica@microchip.com>
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]7 */
8
Simon Glass51a3ec32017-05-17 17:18:07 -0600[diff] [blame]9#include <dm.h>
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]10#include <sdhci.h>
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]11#include <clk.h>
Simon Glass3ba929a2020-10-30 21:38:53 -0600[diff] [blame]12#include <linux/errno.h>
13#include <mach/pic32.h>
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]14
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]15struct pic32_sdhci_plat {
16 struct mmc_config cfg;
17 struct mmc mmc;
Jaehoon Chung9174eb42016-12-30 15:30:14 +0900[diff] [blame]18};
19
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]20static int pic32_sdhci_probe(struct udevice *dev)
21{
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]22 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
Simon Glassfa20e932020-12-03 16:55:20 -0700[diff] [blame]23 struct pic32_sdhci_plat *plat = dev_get_plat(dev);
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]24 struct sdhci_host *host = dev_get_priv(dev);
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]25
26 struct clk clk;
27 ulong clk_rate;
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]28 int ret;
29
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]30 ret = clk_get_by_name(dev, "base_clk", &clk);
31 if (ret)
32 return ret;
33
34 clk_rate = clk_get_rate(&clk);
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]35
36 if (IS_ERR_VALUE(clk_rate))
37 return clk_rate;
38
39 host->ioaddr = dev_remap_addr(dev);
40
41 if (!host->ioaddr)
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]42 return -EINVAL;
43
Masahiro Yamadaa4405612016-04-22 20:59:31 +0900[diff] [blame]44 host->name = dev->name;
Jaehoon Chung730a5952016-12-30 15:30:15 +0900[diff] [blame]45 host->quirks = SDHCI_QUIRK_NO_HISPD_BIT;
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]46 host->bus_width = dev_read_u32_default(dev, "bus-width", 4);
47 host->max_clk = clk_rate;
48
49 host->mmc = &plat->mmc;
50 host->mmc->dev = dev;
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]51
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]52 ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
53 if (ret)
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]54 return ret;
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]55
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]56 host->mmc->priv = host;
57 upriv->mmc = host->mmc;
Stefan Herbrechtsmeierbc47e0e2017-01-17 15:58:48 +0100[diff] [blame]58
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]59 ret = sdhci_probe(dev);
Simon Glass77ca42b2016-05-01 13:52:34 -0600[diff] [blame]60 if (ret)
61 return ret;
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]62
63 if (!dev_read_bool(dev, "microchip,use-sdcd")) {
64 // Use workaround 1 for erratum #15 by default
65 u8 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
66 ctrl = (ctrl & ~SDHCI_CTRL_CD_TEST_INS) | SDHCI_CTRL_CD_TEST;
67 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
68 }
Simon Glass77ca42b2016-05-01 13:52:34 -0600[diff] [blame]69
70 return 0;
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]71}
72
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]73static int pic32_sdhci_bind(struct udevice *dev)
74{
Simon Glassfa20e932020-12-03 16:55:20 -0700[diff] [blame]75 struct pic32_sdhci_plat *plat = dev_get_plat(dev);
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]76
77 return sdhci_bind(dev, &plat->mmc, &plat->cfg);
78}
79
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]80static const struct udevice_id pic32_sdhci_ids[] = {
81 { .compatible = "microchip,pic32mzda-sdhci" },
82 { }
83};
84
85U_BOOT_DRIVER(pic32_sdhci_drv) = {
86 .name = "pic32_sdhci",
87 .id = UCLASS_MMC,
88 .of_match = pic32_sdhci_ids,
John Robertsonf9286d42020-09-01 02:55:14 +0000[diff] [blame]89 .ops = &sdhci_ops,
90 .bind = pic32_sdhci_bind,
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]91 .probe = pic32_sdhci_probe,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700[diff] [blame]92 .priv_auto = sizeof(struct sdhci_host),
Simon Glass71fa5b42020-12-03 16:55:18 -0700[diff] [blame]93 .plat_auto = sizeof(struct pic32_sdhci_plat)
Andrei Pistiricabe033172016-01-28 15:30:18 +0530[diff] [blame]94};