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git01.mediatek.com / filogic / uboot / df4262f7923cd08e0b3cb924afc17f8941c3da32 / . / configs / ap121_defconfig
blob: 353aa0abb1f63e93a060ca3b9e8baa0bfdcf4b0e [file] [log] [blame]
Wills Wang8d8d2ed2016-03-16 16:59:59 +0800[diff] [blame]1CONFIG_MIPS=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]2CONFIG_TEXT_BASE=0x9F000000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]3CONFIG_SYS_MALLOC_LEN=0x40000
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]4CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
5CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd007fff
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]6CONFIG_ENV_SIZE=0x10000
7CONFIG_ENV_OFFSET=0x40000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]8CONFIG_ENV_SECT_SIZE=0x10000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]9CONFIG_DEFAULT_DEVICE_TREE="ap121"
Tom Rinic427a582024-10-08 09:18:32 -0600[diff] [blame]10CONFIG_SYS_LOAD_ADDR=0x81000000
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]11CONFIG_DEBUG_UART_BASE=0xb8020000
12CONFIG_DEBUG_UART_CLOCK=25000000
Tom Rini7c027e02022-06-20 08:13:12 -0400[diff] [blame]13CONFIG_DEBUG_UART_BOARD_INIT=y
Wills Wang8d8d2ed2016-03-16 16:59:59 +0800[diff] [blame]14CONFIG_ARCH_ATH79=y
Daniel Schwierzeckff21b842022-07-10 17:15:14 +0200[diff] [blame]15CONFIG_SYS_MIPS_TIMER_FREQ=200000000
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]16CONFIG_DEBUG_UART=y
Tom Rini76fbc6f2022-04-01 10:33:18 -0400[diff] [blame]17CONFIG_SYS_MEMTEST_START=0x80100000
18CONFIG_SYS_MEMTEST_END=0x83f00000
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]19CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]20CONFIG_USE_BOOTARGS=y
21CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]22CONFIG_USE_BOOTCOMMAND=y
23CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f650000"
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]24CONFIG_SYS_CBSIZE=256
25CONFIG_SYS_PBSIZE=281
Lokesh Vutlafbad3702016-10-08 14:41:44 -0400[diff] [blame]26CONFIG_DISPLAY_CPUINFO=y
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]27CONFIG_BOARD_EARLY_INIT_F=y
Tom Rini47805502022-05-12 16:45:08 -0400[diff] [blame]28CONFIG_SYS_MALLOC_BOOTPARAMS=y
Tom Rinic4359852023-10-02 10:35:27 -0400[diff] [blame]29CONFIG_SYS_PROMPT="ap121 # "
Wills Wang8d8d2ed2016-03-16 16:59:59 +0800[diff] [blame]30# CONFIG_CMD_BDI is not set
31# CONFIG_CMD_CONSOLE is not set
32# CONFIG_CMD_ELF is not set
Wills Wang8d8d2ed2016-03-16 16:59:59 +0800[diff] [blame]33# CONFIG_CMD_XIMG is not set
34# CONFIG_CMD_EXPORTENV is not set
35# CONFIG_CMD_IMPORTENV is not set
36# CONFIG_CMD_EDITENV is not set
37# CONFIG_CMD_CRC32 is not set
Mario Six00518992018-03-28 14:38:14 +0200[diff] [blame]38CONFIG_CMD_MEMTEST=y
Wills Wang8d8d2ed2016-03-16 16:59:59 +0800[diff] [blame]39CONFIG_CMD_SPI=y
Wills Wang56f02192016-05-30 22:54:51 +0800[diff] [blame]40CONFIG_CMD_DHCP=y
41CONFIG_CMD_PING=y
Tom Rinic20bb732017-07-22 18:36:16 -0400[diff] [blame]42CONFIG_CMD_MTDPARTS=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]43CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0"
44CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:256k(u-boot),64k(u-boot-env),6144k(rootfs),1600k(uImage),64k(NVRAM),64k(ART)"
Patrick Delaunay21d3bce2017-01-27 11:00:38 +0100[diff] [blame]45# CONFIG_ISO_PARTITION is not set
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]46CONFIG_ENV_IS_IN_SPI_FLASH=y
Patrick Delaunayf8e932e2019-02-27 15:20:38 +0100[diff] [blame]47CONFIG_ENV_SPI_MAX_HZ=25000000
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]48CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Wills Wang56f02192016-05-30 22:54:51 +0800[diff] [blame]49CONFIG_NET_RANDOM_ETHADDR=y
Miquel Raynal803baa22019-10-03 19:50:08 +0200[diff] [blame]50CONFIG_MTD=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]51CONFIG_DM_SPI_FLASH=y
Wills Wang8d8d2ed2016-03-16 16:59:59 +0800[diff] [blame]52CONFIG_SPI_FLASH_ATMEL=y
53CONFIG_SPI_FLASH_EON=y
54CONFIG_SPI_FLASH_GIGADEVICE=y
55CONFIG_SPI_FLASH_MACRONIX=y
56CONFIG_SPI_FLASH_SPANSION=y
57CONFIG_SPI_FLASH_STMICRO=y
58CONFIG_SPI_FLASH_SST=y
59CONFIG_SPI_FLASH_WINBOND=y
60CONFIG_SPI_FLASH_DATAFLASH=y
61CONFIG_SPI_FLASH_MTD=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]62CONFIG_AG7XXX=y
Wills Wang8d8d2ed2016-03-16 16:59:59 +0800[diff] [blame]63CONFIG_PINCTRL=y
64CONFIG_PINCONF=y
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200[diff] [blame]65CONFIG_PINCTRL_AR933X=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]66CONFIG_DM_SERIAL=y
Wills Wang8d8d2ed2016-03-16 16:59:59 +0800[diff] [blame]67CONFIG_AR933X_UART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]68CONFIG_SPI=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]69CONFIG_DM_SPI=y
Wills Wang8d8d2ed2016-03-16 16:59:59 +0800[diff] [blame]70CONFIG_ATH79_SPI=y
Simon Glass264aa5f2017-05-17 03:25:42 -0600[diff] [blame]71CONFIG_LZMA=y