blob: d1dc35d0492a3c46a8dca7e7893fd82dffc77aba [file] [log] [blame]
Jason Jina63ce952007-07-06 08:34:56 +08001/****************************************************************************
2*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +02003* Video BOOT Graphics Card POST Module
Jason Jina63ce952007-07-06 08:34:56 +08004*
5* ========================================================================
Kumar Gala6a6d9482009-07-28 21:49:52 -05006* Copyright (C) 2007 Freescale Semiconductor, Inc.
Jason Jina63ce952007-07-06 08:34:56 +08007* Jason Jin <Jason.jin@freescale.com>
8*
9* Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
10*
11* This file may be distributed and/or modified under the terms of the
12* GNU General Public License version 2.0 as published by the Free
13* Software Foundation and appearing in the file LICENSE.GPL included
14* in the packaging of this file.
15*
16* Licensees holding a valid Commercial License for this product from
17* SciTech Software, Inc. may use this file in accordance with the
18* Commercial License Agreement provided with the Software.
19*
20* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
21* THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22* PURPOSE.
23*
24* See http://www.scitechsoft.com/license/ for information about
25* the licensing options available and how to purchase a Commercial
26* License Agreement.
27*
28* Contact license@scitechsoft.com if any conditions of this licensing
29* are not clear to you, or you have questions about licensing options.
30*
31* ========================================================================
32*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020033* Language: ANSI C
34* Environment: Linux Kernel
35* Developer: Kendall Bennett
Jason Jina63ce952007-07-06 08:34:56 +080036*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020037* Description: Module to implement booting PCI/AGP controllers on the
38* bus. We use the x86 real mode emulator to run the BIOS on
39* graphics controllers to bring the cards up.
Jason Jina63ce952007-07-06 08:34:56 +080040*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020041* Note that at present this module does *not* support
42* multiple controllers.
Jason Jina63ce952007-07-06 08:34:56 +080043*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020044* The orignal name of this file is warmboot.c.
45* Jason ported this file to u-boot to run the ATI video card
46* BIOS in u-boot.
Jason Jina63ce952007-07-06 08:34:56 +080047****************************************************************************/
48#include <common.h>
Simon Glassacda1cc2014-11-14 20:56:40 -070049#include <bios_emul.h>
50#include <errno.h>
Simon Glass0f2af882020-05-10 11:40:05 -060051#include <log.h>
Jason Jina63ce952007-07-06 08:34:56 +080052#include <malloc.h>
Simon Glassacda1cc2014-11-14 20:56:40 -070053#include <vbe.h>
54#include "biosemui.h"
Jason Jina63ce952007-07-06 08:34:56 +080055
56/* Length of the BIOS image */
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020057#define MAX_BIOSLEN (128 * 1024L)
Jason Jina63ce952007-07-06 08:34:56 +080058
Jason Jina63ce952007-07-06 08:34:56 +080059/* Place to save PCI BAR's that we change and later restore */
60static u32 saveROMBaseAddress;
61static u32 saveBaseAddress10;
62static u32 saveBaseAddress14;
63static u32 saveBaseAddress18;
64static u32 saveBaseAddress20;
65
Simon Glassc55b1c62014-12-29 19:32:26 -070066/* Addres im memory of VBE region */
67const int vbe_offset = 0x2000;
68
Bin Mengc9dba412018-04-11 22:02:15 -070069#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
Simon Glassc55b1c62014-12-29 19:32:26 -070070static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info,
71 u32 x86_dword_ptr)
72{
73 u32 seg_ofs, flat;
74
75 seg_ofs = le32_to_cpu(x86_dword_ptr);
76 flat = ((seg_ofs & 0xffff0000) >> 12) | (seg_ofs & 0xffff);
77 if (flat >= 0xc0000)
78 return vga_info->BIOSImage + flat - 0xc0000;
79 else
80 return buf + (flat - vbe_offset);
81}
82
83static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,
84 int vesa_mode, struct vbe_mode_info *mode_info)
Simon Glassacda1cc2014-11-14 20:56:40 -070085{
Simon Glassc55b1c62014-12-29 19:32:26 -070086 void *buffer = (void *)(M.mem_base + vbe_offset);
87 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
88 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
89 struct vesa_mode_info *vm;
90 struct vbe_info *info;
91 const u16 *modes_bios, *ptr;
92 u16 *modes;
93 int size;
94
95 debug("VBE: Getting information\n");
96 regs->e.eax = VESA_GET_INFO;
97 regs->e.esi = buffer_seg;
98 regs->e.edi = buffer_adr;
99 info = buffer;
100 memset(info, '\0', sizeof(*info));
101 strcpy(info->signature, "VBE2");
102 BE_int86(0x10, regs, regs);
103 if (regs->e.eax != 0x4f) {
104 debug("VESA_GET_INFO: error %x\n", regs->e.eax);
105 return -ENOSYS;
106 }
107 debug("version %x\n", le16_to_cpu(info->version));
108 debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info,
109 info->oem_string_ptr));
110 debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info,
111 info->vendor_name_ptr));
112 debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info,
113 info->product_name_ptr));
114 debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info,
115 info->product_rev_ptr));
116 modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr);
117 debug("Modes: ");
118 for (ptr = modes_bios; *ptr != 0xffff; ptr++)
119 debug("%x ", le16_to_cpu(*ptr));
120 debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4);
121 size = (ptr - modes_bios) * sizeof(u16) + 2;
122 modes = malloc(size);
123 if (!modes)
124 return -ENOMEM;
125 memcpy(modes, modes_bios, size);
126
127 regs->e.eax = VESA_GET_CUR_MODE;
128 BE_int86(0x10, regs, regs);
129 if (regs->e.eax != 0x4f) {
130 debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax);
131 return -ENOSYS;
132 }
133 debug("Current mode %x\n", regs->e.ebx);
134
135 for (ptr = modes; *ptr != 0xffff; ptr++) {
136 int mode = le16_to_cpu(*ptr);
137 bool linear_ok;
138 int attr;
139
Simon Glassc55b1c62014-12-29 19:32:26 -0700140 debug("Mode %x: ", mode);
141 memset(buffer, '\0', sizeof(struct vbe_mode_info));
142 regs->e.eax = VESA_GET_MODE_INFO;
143 regs->e.ebx = 0;
144 regs->e.ecx = mode;
145 regs->e.edx = 0;
146 regs->e.esi = buffer_seg;
147 regs->e.edi = buffer_adr;
148 BE_int86(0x10, regs, regs);
149 if (regs->e.eax != 0x4f) {
150 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
151 continue;
152 }
153 memcpy(mode_info->mode_info_block, buffer,
154 sizeof(struct vesa_mode_info));
155 mode_info->valid = true;
156 vm = &mode_info->vesa;
157 attr = le16_to_cpu(vm->mode_attributes);
158 linear_ok = attr & 0x80;
159 debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n",
160 le16_to_cpu(vm->x_resolution),
161 le16_to_cpu(vm->y_resolution),
162 vm->bits_per_pixel, vm->memory_model,
163 linear_ok ? "OK" : "not available",
164 attr);
165 debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n",
166 vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos,
167 vm->red_mask_size, vm->green_mask_size,
168 vm->blue_mask_size);
169 }
170
171 return 0;
172}
173
174static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,
175 struct vbe_mode_info *mode_info)
176{
177 void *buffer = (void *)(M.mem_base + vbe_offset);
178 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
179 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
180 struct vesa_mode_info *vm;
181
Simon Glassacda1cc2014-11-14 20:56:40 -0700182 debug("VBE: Setting VESA mode %#04x\n", vesa_mode);
Simon Glassacda1cc2014-11-14 20:56:40 -0700183 regs->e.eax = VESA_SET_MODE;
184 regs->e.ebx = vesa_mode;
Simon Glassc55b1c62014-12-29 19:32:26 -0700185 /* request linear framebuffer mode and don't clear display */
186 regs->e.ebx |= (1 << 14) | (1 << 15);
Simon Glassacda1cc2014-11-14 20:56:40 -0700187 BE_int86(0x10, regs, regs);
Simon Glassc55b1c62014-12-29 19:32:26 -0700188 if (regs->e.eax != 0x4f) {
189 debug("VESA_SET_MODE: error %x\n", regs->e.eax);
190 return -ENOSYS;
191 }
Simon Glassacda1cc2014-11-14 20:56:40 -0700192
Simon Glassc55b1c62014-12-29 19:32:26 -0700193 memset(buffer, '\0', sizeof(struct vbe_mode_info));
194 debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode);
Simon Glassacda1cc2014-11-14 20:56:40 -0700195 regs->e.eax = VESA_GET_MODE_INFO;
Simon Glassacda1cc2014-11-14 20:56:40 -0700196 regs->e.ecx = vesa_mode;
Simon Glassacda1cc2014-11-14 20:56:40 -0700197 regs->e.esi = buffer_seg;
198 regs->e.edi = buffer_adr;
199 BE_int86(0x10, regs, regs);
Simon Glassc55b1c62014-12-29 19:32:26 -0700200 if (regs->e.eax != 0x4f) {
201 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
202 return -ENOSYS;
203 }
204
Simon Glassacda1cc2014-11-14 20:56:40 -0700205 memcpy(mode_info->mode_info_block, buffer,
Simon Glassc55b1c62014-12-29 19:32:26 -0700206 sizeof(struct vesa_mode_info));
Simon Glassacda1cc2014-11-14 20:56:40 -0700207 mode_info->valid = true;
Simon Glassc55b1c62014-12-29 19:32:26 -0700208 mode_info->video_mode = vesa_mode;
209 vm = &mode_info->vesa;
210 vm->x_resolution = le16_to_cpu(vm->x_resolution);
211 vm->y_resolution = le16_to_cpu(vm->y_resolution);
212 vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline);
213 vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr);
214 vm->mode_attributes = le16_to_cpu(vm->mode_attributes);
215 debug("VBE: Init complete\n");
Simon Glassacda1cc2014-11-14 20:56:40 -0700216
Simon Glassc55b1c62014-12-29 19:32:26 -0700217 return 0;
Simon Glassacda1cc2014-11-14 20:56:40 -0700218}
Bin Mengc9dba412018-04-11 22:02:15 -0700219#endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */
Simon Glassacda1cc2014-11-14 20:56:40 -0700220
Jason Jina63ce952007-07-06 08:34:56 +0800221/****************************************************************************
222PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200223pcidev - PCI device info for the video card on the bus to boot
Simon Glassacda1cc2014-11-14 20:56:40 -0700224vga_info - BIOS emulator VGA info structure
Jason Jina63ce952007-07-06 08:34:56 +0800225
226REMARKS:
227This function executes the BIOS POST code on the controller. We assume that
228at this stage the controller has its I/O and memory space enabled and
229that all other controllers are in a disabled state.
230****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700231#ifdef CONFIG_DM_PCI
232static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info,
233 int vesa_mode, struct vbe_mode_info *mode_info)
234#else
Simon Glassacda1cc2014-11-14 20:56:40 -0700235static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info,
236 int vesa_mode, struct vbe_mode_info *mode_info)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700237#endif
Jason Jina63ce952007-07-06 08:34:56 +0800238{
239 RMREGS regs;
240 RMSREGS sregs;
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700241#ifdef CONFIG_DM_PCI
242 pci_dev_t bdf;
243#endif
Jason Jina63ce952007-07-06 08:34:56 +0800244
245 /* Determine the value to store in AX for BIOS POST. Per the PCI specs,
246 AH must contain the bus and AL must contain the devfn, encoded as
247 (dev << 3) | fn
248 */
249 memset(&regs, 0, sizeof(regs));
250 memset(&sregs, 0, sizeof(sregs));
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700251#ifdef CONFIG_DM_PCI
252 bdf = dm_pci_get_bdf(pcidev);
253 regs.x.ax = (int)PCI_BUS(bdf) << 8 |
254 (int)PCI_DEV(bdf) << 3 | (int)PCI_FUNC(bdf);
255#else
Jason Jina63ce952007-07-06 08:34:56 +0800256 regs.x.ax = ((int)PCI_BUS(pcidev) << 8) |
257 ((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700258#endif
Jason Jina63ce952007-07-06 08:34:56 +0800259 /*Setup the X86 emulator for the VGA BIOS*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700260 BE_setVGA(vga_info);
Jason Jina63ce952007-07-06 08:34:56 +0800261
262 /*Execute the BIOS POST code*/
263 BE_callRealMode(0xC000, 0x0003, &regs, &sregs);
264
265 /*Cleanup and exit*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700266 BE_getVGA(vga_info);
267
Bin Mengc9dba412018-04-11 22:02:15 -0700268#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
Simon Glassc55b1c62014-12-29 19:32:26 -0700269 /* Useful for debugging */
270 if (0)
271 atibios_debug_mode(vga_info, &regs, vesa_mode, mode_info);
Simon Glassacda1cc2014-11-14 20:56:40 -0700272 if (vesa_mode != -1)
273 atibios_set_vesa_mode(&regs, vesa_mode, mode_info);
Bin Mengc9dba412018-04-11 22:02:15 -0700274#endif
Jason Jina63ce952007-07-06 08:34:56 +0800275}
276
277/****************************************************************************
278PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200279pcidev - PCI device info for the video card on the bus
280bar - Place to return the base address register offset to use
Jason Jina63ce952007-07-06 08:34:56 +0800281
282RETURNS:
283The address to use to map the secondary BIOS (AGP devices)
284
285REMARKS:
286Searches all the PCI base address registers for the device looking for a
287memory mapping that is large enough to hold our ROM BIOS. We usually end up
288finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
289to map the BIOS for the device into. We use a mapping that is already
290assigned to the device to ensure the memory range will be passed through
291by any PCI->PCI or AGP->PCI bridge that may be present.
292
293NOTE: Usually this function is only used for AGP devices, but it may be
294 used for PCI devices that have already been POST'ed and the BIOS
295 ROM base address has been zero'ed out.
296
297NOTE: This function leaves the original memory aperture disabled by leaving
298 it programmed to all 1's. It must be restored to the correct value
299 later.
300****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700301#ifdef CONFIG_DM_PCI
302static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar)
303#else
Jason Jina63ce952007-07-06 08:34:56 +0800304static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700305#endif
Jason Jina63ce952007-07-06 08:34:56 +0800306{
307 u32 base, size;
308
309 for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) {
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700310#ifdef CONFIG_DM_PCI
311 dm_pci_read_config32(pcidev, *bar, &base);
312#else
Jason Jina63ce952007-07-06 08:34:56 +0800313 pci_read_config_dword(pcidev, *bar, &base);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700314#endif
Jason Jina63ce952007-07-06 08:34:56 +0800315 if (!(base & 0x1)) {
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700316#ifdef CONFIG_DM_PCI
317 dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF);
318 dm_pci_read_config32(pcidev, *bar, &size);
319#else
Jason Jina63ce952007-07-06 08:34:56 +0800320 pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF);
321 pci_read_config_dword(pcidev, *bar, &size);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700322#endif
Jason Jina63ce952007-07-06 08:34:56 +0800323 size = ~(size & ~0xFF) + 1;
324 if (size >= MAX_BIOSLEN)
325 return base & ~0xFF;
326 }
327 }
328 return 0;
329}
330
331/****************************************************************************
332REMARKS:
333Some non-x86 Linux kernels map PCI relocateable I/O to values that
334are above 64K, which will not work with the BIOS image that requires
335the offset for the I/O ports to be a maximum of 16-bits. Ideally
336someone should fix the kernel to map the I/O ports for VGA compatible
337devices to a different location (or just all I/O ports since it is
338unlikely you can have enough devices in the machine to use up all
33964K of the I/O space - a total of more than 256 cards would be
340necessary).
341
342Anyway to fix this we change all I/O mapped base registers and
343chop off the top bits.
344****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700345#ifdef CONFIG_DM_PCI
346static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base)
347#else
Jason Jina63ce952007-07-06 08:34:56 +0800348static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700349#endif
Jason Jina63ce952007-07-06 08:34:56 +0800350{
351 if ((*base & 0x1) && (*base > 0xFFFE)) {
352 *base &= 0xFFFF;
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700353#ifdef CONFIG_DM_PCI
354 dm_pci_write_config32(pcidev, reg, *base);
355#else
Jason Jina63ce952007-07-06 08:34:56 +0800356 pci_write_config_dword(pcidev, reg, *base);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700357#endif
Jason Jina63ce952007-07-06 08:34:56 +0800358
359 }
360}
361
362/****************************************************************************
363PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200364pcidev - PCI device info for the video card on the bus
Jason Jina63ce952007-07-06 08:34:56 +0800365
366RETURNS:
367Pointers to the mapped BIOS image
368
369REMARKS:
370Maps a pointer to the BIOS image on the graphics card on the PCI bus.
371****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700372#ifdef CONFIG_DM_PCI
373void *PCI_mapBIOSImage(struct udevice *pcidev)
374#else
Jason Jina63ce952007-07-06 08:34:56 +0800375void *PCI_mapBIOSImage(pci_dev_t pcidev)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700376#endif
Jason Jina63ce952007-07-06 08:34:56 +0800377{
Ed Swarthout224dad22010-03-31 15:52:40 -0500378 u32 BIOSImageBus;
Jason Jina63ce952007-07-06 08:34:56 +0800379 int BIOSImageBAR;
380 u8 *BIOSImage;
381
382 /*Save PCI BAR registers that might get changed*/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700383#ifdef CONFIG_DM_PCI
384 dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
385 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
386 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
387 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
388 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
389#else
Jason Jina63ce952007-07-06 08:34:56 +0800390 pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
391 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
392 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
393 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
394 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700395#endif
Jason Jina63ce952007-07-06 08:34:56 +0800396
397 /*Fix up I/O base registers to less than 64K */
398 if(saveBaseAddress14 != 0)
399 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
400 else
401 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
402
403 /* Some cards have problems that stop us from being able to read the
404 BIOS image from the ROM BAR. To fix this we have to do some chipset
405 specific programming for different cards to solve this problem.
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200406 */
Jason Jina63ce952007-07-06 08:34:56 +0800407
Ed Swarthout224dad22010-03-31 15:52:40 -0500408 BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR);
409 if (BIOSImageBus == 0) {
Jason Jina63ce952007-07-06 08:34:56 +0800410 printf("Find bios addr error\n");
411 return NULL;
412 }
413
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700414#ifdef CONFIG_DM_PCI
415 BIOSImage = dm_pci_bus_to_virt(pcidev, BIOSImageBus,
416 PCI_REGION_MEM, 0, MAP_NOCACHE);
417
418 /*Change the PCI BAR registers to map it onto the bus.*/
419 dm_pci_write_config32(pcidev, BIOSImageBAR, 0);
420 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
421#else
Ed Swarthout224dad22010-03-31 15:52:40 -0500422 BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus,
423 PCI_REGION_MEM, 0, MAP_NOCACHE);
Jason Jina63ce952007-07-06 08:34:56 +0800424
425 /*Change the PCI BAR registers to map it onto the bus.*/
426 pci_write_config_dword(pcidev, BIOSImageBAR, 0);
Ed Swarthout224dad22010-03-31 15:52:40 -0500427 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700428#endif
Jason Jina63ce952007-07-06 08:34:56 +0800429 udelay(1);
430
431 /*Check that the BIOS image is valid. If not fail, or return the
432 compiled in BIOS image if that option was enabled
433 */
434 if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) {
435 return NULL;
436 }
437
438 return BIOSImage;
439}
440
441/****************************************************************************
442PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200443pcidev - PCI device info for the video card on the bus
Jason Jina63ce952007-07-06 08:34:56 +0800444
445REMARKS:
446Unmaps the BIOS image for the device and restores framebuffer mappings
447****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700448#ifdef CONFIG_DM_PCI
449void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage)
450{
451 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
452 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
453 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
454 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
455 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
456}
457#else
Jason Jina63ce952007-07-06 08:34:56 +0800458void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage)
459{
460 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
461 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
462 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
463 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
464 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
465}
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700466#endif
Jason Jina63ce952007-07-06 08:34:56 +0800467
468/****************************************************************************
469PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200470pcidev - PCI device info for the video card on the bus to boot
Jason Jina63ce952007-07-06 08:34:56 +0800471VGAInfo - BIOS emulator VGA info structure
472
473RETURNS:
York Sun4a598092013-04-01 11:29:11 -0700474true if successfully initialised, false if not.
Jason Jina63ce952007-07-06 08:34:56 +0800475
476REMARKS:
477Loads and POST's the display controllers BIOS, directly from the BIOS
478image we can extract over the PCI bus.
479****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700480#ifdef CONFIG_DM_PCI
481static int PCI_postController(struct udevice *pcidev, uchar *bios_rom,
482 int bios_len, BE_VGAInfo *vga_info,
483 int vesa_mode, struct vbe_mode_info *mode_info)
484#else
Simon Glassacda1cc2014-11-14 20:56:40 -0700485static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
486 BE_VGAInfo *vga_info, int vesa_mode,
487 struct vbe_mode_info *mode_info)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700488#endif
Jason Jina63ce952007-07-06 08:34:56 +0800489{
Simon Glassacda1cc2014-11-14 20:56:40 -0700490 u32 bios_image_len;
491 uchar *mapped_bios;
492 uchar *copy_of_bios;
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700493#ifdef CONFIG_DM_PCI
494 pci_dev_t bdf;
495#endif
Jason Jina63ce952007-07-06 08:34:56 +0800496
Simon Glassacda1cc2014-11-14 20:56:40 -0700497 if (bios_rom) {
498 copy_of_bios = bios_rom;
499 bios_image_len = bios_len;
500 } else {
501 /*
502 * Allocate memory to store copy of BIOS from display
503 * controller
504 */
505 mapped_bios = PCI_mapBIOSImage(pcidev);
506 if (mapped_bios == NULL) {
507 printf("videoboot: Video ROM failed to map!\n");
508 return false;
509 }
Jason Jina63ce952007-07-06 08:34:56 +0800510
Simon Glassacda1cc2014-11-14 20:56:40 -0700511 bios_image_len = mapped_bios[2] * 512;
Jason Jina63ce952007-07-06 08:34:56 +0800512
Simon Glassacda1cc2014-11-14 20:56:40 -0700513 copy_of_bios = malloc(bios_image_len);
514 if (copy_of_bios == NULL) {
515 printf("videoboot: Out of memory!\n");
516 return false;
517 }
518 memcpy(copy_of_bios, mapped_bios, bios_image_len);
519 PCI_unmapBIOSImage(pcidev, mapped_bios);
Jason Jina63ce952007-07-06 08:34:56 +0800520 }
Jason Jina63ce952007-07-06 08:34:56 +0800521
Simon Glassacda1cc2014-11-14 20:56:40 -0700522 /*Save information in vga_info structure*/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700523#ifdef CONFIG_DM_PCI
524 bdf = dm_pci_get_bdf(pcidev);
525 vga_info->function = PCI_FUNC(bdf);
526 vga_info->device = PCI_DEV(bdf);
527 vga_info->bus = PCI_BUS(bdf);
528#else
Simon Glassacda1cc2014-11-14 20:56:40 -0700529 vga_info->function = PCI_FUNC(pcidev);
530 vga_info->device = PCI_DEV(pcidev);
531 vga_info->bus = PCI_BUS(pcidev);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700532#endif
Simon Glassacda1cc2014-11-14 20:56:40 -0700533 vga_info->pcidev = pcidev;
534 vga_info->BIOSImage = copy_of_bios;
535 vga_info->BIOSImageLen = bios_image_len;
Jason Jina63ce952007-07-06 08:34:56 +0800536
537 /*Now execute the BIOS POST for the device*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700538 if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) {
Jason Jina63ce952007-07-06 08:34:56 +0800539 printf("videoboot: Video ROM image is invalid!\n");
540 return false;
541 }
542
Simon Glassacda1cc2014-11-14 20:56:40 -0700543 PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info);
Jason Jina63ce952007-07-06 08:34:56 +0800544
545 /*Reset the size of the BIOS image to the final size*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700546 vga_info->BIOSImageLen = copy_of_bios[2] * 512;
Jason Jina63ce952007-07-06 08:34:56 +0800547 return true;
548}
549
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700550#ifdef CONFIG_DM_PCI
551int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop)
552#else
Simon Glassacda1cc2014-11-14 20:56:40 -0700553int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **vga_infop)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700554#endif
Jason Jina63ce952007-07-06 08:34:56 +0800555{
556 BE_VGAInfo *VGAInfo;
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700557#ifdef CONFIG_DM_PCI
558 pci_dev_t bdf = dm_pci_get_bdf(pcidev);
Jason Jina63ce952007-07-06 08:34:56 +0800559
560 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700561 PCI_BUS(bdf), PCI_FUNC(bdf), PCI_DEV(bdf));
562#else
563 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
564 PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev));
565#endif
Jason Jina63ce952007-07-06 08:34:56 +0800566 /*Initialise the x86 BIOS emulator*/
567 if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
568 printf("videoboot: Out of memory!\n");
Simon Glassacda1cc2014-11-14 20:56:40 -0700569 return -ENOMEM;
Jason Jina63ce952007-07-06 08:34:56 +0800570 }
571 memset(VGAInfo, 0, sizeof(*VGAInfo));
572 BE_init(0, 65536, VGAInfo, 0);
Simon Glassacda1cc2014-11-14 20:56:40 -0700573 *vga_infop = VGAInfo;
Jason Jina63ce952007-07-06 08:34:56 +0800574
Simon Glassacda1cc2014-11-14 20:56:40 -0700575 return 0;
576}
577
578void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
579{
580 X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
581}
582
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700583#ifdef CONFIG_DM_PCI
584int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len,
585 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
586 struct vbe_mode_info *mode_info)
587#else
Simon Glassacda1cc2014-11-14 20:56:40 -0700588int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
589 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
590 struct vbe_mode_info *mode_info)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700591#endif
Simon Glassacda1cc2014-11-14 20:56:40 -0700592{
Jason Jina63ce952007-07-06 08:34:56 +0800593 /*Post all the display controller BIOS'es*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700594 if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
595 vesa_mode, mode_info))
596 return -EINVAL;
Jason Jina63ce952007-07-06 08:34:56 +0800597
Simon Glassacda1cc2014-11-14 20:56:40 -0700598 /*
599 * Cleanup and exit the emulator if requested. If the BIOS emulator
600 * is needed after booting the card, we will not call BE_exit and
601 * leave it enabled for further use (ie: VESA driver etc).
Jason Jina63ce952007-07-06 08:34:56 +0800602 */
Simon Glassacda1cc2014-11-14 20:56:40 -0700603 if (clean_up) {
Jason Jina63ce952007-07-06 08:34:56 +0800604 BE_exit();
Bin Menga264c902015-04-24 15:48:05 +0800605 if (vga_info->BIOSImage &&
Simon Glasscc409062016-09-25 21:33:06 -0600606 (ulong)(vga_info->BIOSImage) != 0xc0000)
Simon Glassacda1cc2014-11-14 20:56:40 -0700607 free(vga_info->BIOSImage);
608 free(vga_info);
Jason Jina63ce952007-07-06 08:34:56 +0800609 }
Simon Glassacda1cc2014-11-14 20:56:40 -0700610
611 return 0;
612}
613
614/****************************************************************************
615PARAMETERS:
616pcidev - PCI device info for the video card on the bus to boot
617pVGAInfo - Place to return VGA info structure is requested
618cleanUp - true to clean up on exit, false to leave emulator active
619
620REMARKS:
621Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
622and the X86 BIOS emulator module.
623****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700624#ifdef CONFIG_DM_PCI
625int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo,
626 int clean_up)
627#else
Simon Glassacda1cc2014-11-14 20:56:40 -0700628int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700629#endif
Simon Glassacda1cc2014-11-14 20:56:40 -0700630{
631 BE_VGAInfo *VGAInfo;
632 int ret;
633
634 ret = biosemu_setup(pcidev, &VGAInfo);
635 if (ret)
636 return false;
637 ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL);
638 if (ret)
639 return false;
640
641 /* Return VGA info pointer if the caller requested it*/
Jason Jina63ce952007-07-06 08:34:56 +0800642 if (pVGAInfo)
643 *pVGAInfo = VGAInfo;
Simon Glassacda1cc2014-11-14 20:56:40 -0700644
Jason Jina63ce952007-07-06 08:34:56 +0800645 return true;
646}