blob: 2db067876e4b8f58263ddf2ceca8209f0f5e207d [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00002/*
3 * (C) Copyright 2001
4 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
wdenkc6097192002-11-03 00:24:07 +00005 */
6
7/*
8 * This provides a bit-banged interface to the ethernet MII management
9 * channel.
10 */
11
12#include <common.h>
Simon Glassdbad3462015-04-05 16:07:39 -060013#include <dm.h>
wdenkc6097192002-11-03 00:24:07 +000014#include <miiphy.h>
Andy Flemingaecf6fc2011-04-08 02:10:27 -050015#include <phy.h>
wdenkc6097192002-11-03 00:24:07 +000016
Marian Balakowiczaab8c492005-10-28 22:30:33 +020017#include <asm/types.h>
18#include <linux/list.h>
19#include <malloc.h>
20#include <net.h>
21
22/* local debug macro */
Marian Balakowiczaab8c492005-10-28 22:30:33 +020023#undef MII_DEBUG
24
25#undef debug
26#ifdef MII_DEBUG
Andy Flemingaea0c3e2011-04-07 14:38:35 -050027#define debug(fmt, args...) printf(fmt, ##args)
Marian Balakowiczaab8c492005-10-28 22:30:33 +020028#else
Andy Flemingaea0c3e2011-04-07 14:38:35 -050029#define debug(fmt, args...)
Marian Balakowiczaab8c492005-10-28 22:30:33 +020030#endif /* MII_DEBUG */
31
Marian Balakowiczaab8c492005-10-28 22:30:33 +020032static struct list_head mii_devs;
33static struct mii_dev *current_mii;
34
Mike Frysinger24a90082010-07-27 18:35:09 -040035/*
36 * Lookup the mii_dev struct by the registered device name.
37 */
Andy Flemingaecf6fc2011-04-08 02:10:27 -050038struct mii_dev *miiphy_get_dev_by_name(const char *devname)
Mike Frysinger24a90082010-07-27 18:35:09 -040039{
40 struct list_head *entry;
41 struct mii_dev *dev;
42
43 if (!devname) {
44 printf("NULL device name!\n");
45 return NULL;
46 }
47
48 list_for_each(entry, &mii_devs) {
49 dev = list_entry(entry, struct mii_dev, link);
50 if (strcmp(dev->name, devname) == 0)
51 return dev;
52 }
53
Mike Frysinger24a90082010-07-27 18:35:09 -040054 return NULL;
55}
56
Marian Balakowiczaab8c492005-10-28 22:30:33 +020057/*****************************************************************************
58 *
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010059 * Initialize global data. Need to be called before any other miiphy routine.
60 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -040061void miiphy_init(void)
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010062{
Andy Flemingaea0c3e2011-04-07 14:38:35 -050063 INIT_LIST_HEAD(&mii_devs);
Larry Johnson81b974b2007-10-31 11:21:29 -050064 current_mii = NULL;
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010065}
66
Andy Flemingaecf6fc2011-04-08 02:10:27 -050067struct mii_dev *mdio_alloc(void)
68{
69 struct mii_dev *bus;
70
71 bus = malloc(sizeof(*bus));
72 if (!bus)
73 return bus;
74
75 memset(bus, 0, sizeof(*bus));
76
77 /* initalize mii_dev struct fields */
78 INIT_LIST_HEAD(&bus->link);
79
80 return bus;
81}
82
Bin Menga961e1f2015-10-07 21:32:37 -070083void mdio_free(struct mii_dev *bus)
84{
85 free(bus);
86}
87
Andy Flemingaecf6fc2011-04-08 02:10:27 -050088int mdio_register(struct mii_dev *bus)
89{
Peng Fancd41c212015-11-24 17:03:47 +080090 if (!bus || !bus->read || !bus->write)
Andy Flemingaecf6fc2011-04-08 02:10:27 -050091 return -1;
92
93 /* check if we have unique name */
94 if (miiphy_get_dev_by_name(bus->name)) {
95 printf("mdio_register: non unique device name '%s'\n",
96 bus->name);
97 return -1;
98 }
99
100 /* add it to the list */
101 list_add_tail(&bus->link, &mii_devs);
102
103 if (!current_mii)
104 current_mii = bus;
105
106 return 0;
107}
108
Michal Simek1a548f52016-12-08 10:06:26 +0100109int mdio_register_seq(struct mii_dev *bus, int seq)
110{
111 int ret;
112
113 /* Setup a unique name for each mdio bus */
114 ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq);
115 if (ret < 0)
116 return ret;
117
118 return mdio_register(bus);
119}
120
Bin Menga961e1f2015-10-07 21:32:37 -0700121int mdio_unregister(struct mii_dev *bus)
122{
123 if (!bus)
124 return 0;
125
126 /* delete it from the list */
127 list_del(&bus->link);
128
129 if (current_mii == bus)
130 current_mii = NULL;
131
132 return 0;
133}
134
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500135void mdio_list_devices(void)
136{
137 struct list_head *entry;
138
139 list_for_each(entry, &mii_devs) {
140 int i;
141 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
142
143 printf("%s:\n", bus->name);
144
145 for (i = 0; i < PHY_MAX_ADDR; i++) {
146 struct phy_device *phydev = bus->phymap[i];
147
148 if (phydev) {
Michal Simekfca1e842016-11-16 08:41:01 +0100149 printf("%x - %s", i, phydev->drv->name);
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500150
151 if (phydev->dev)
152 printf(" <--> %s\n", phydev->dev->name);
153 else
154 printf("\n");
155 }
156 }
157 }
158}
159
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400160int miiphy_set_current_dev(const char *devname)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200161{
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200162 struct mii_dev *dev;
163
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500164 dev = miiphy_get_dev_by_name(devname);
Mike Frysinger24a90082010-07-27 18:35:09 -0400165 if (dev) {
166 current_mii = dev;
167 return 0;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200168 }
169
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500170 printf("No such device: %s\n", devname);
171
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200172 return 1;
173}
174
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500175struct mii_dev *mdio_get_current_dev(void)
176{
177 return current_mii;
178}
179
Pankaj Bansal7c18fe82018-09-18 15:46:48 +0530180struct list_head *mdio_get_list_head(void)
181{
182 return &mii_devs;
183}
184
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500185struct phy_device *mdio_phydev_for_ethname(const char *ethname)
186{
187 struct list_head *entry;
188 struct mii_dev *bus;
189
190 list_for_each(entry, &mii_devs) {
191 int i;
192 bus = list_entry(entry, struct mii_dev, link);
193
194 for (i = 0; i < PHY_MAX_ADDR; i++) {
195 if (!bus->phymap[i] || !bus->phymap[i]->dev)
196 continue;
197
198 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
199 return bus->phymap[i];
200 }
201 }
202
203 printf("%s is not a known ethernet\n", ethname);
204 return NULL;
205}
206
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400207const char *miiphy_get_current_dev(void)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200208{
209 if (current_mii)
210 return current_mii->name;
211
212 return NULL;
213}
214
Mike Frysingerbd17e7a2010-07-27 18:35:10 -0400215static struct mii_dev *miiphy_get_active_dev(const char *devname)
216{
217 /* If the current mii is the one we want, return it */
218 if (current_mii)
219 if (strcmp(current_mii->name, devname) == 0)
220 return current_mii;
221
222 /* Otherwise, set the active one to the one we want */
223 if (miiphy_set_current_dev(devname))
224 return NULL;
225 else
226 return current_mii;
227}
228
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200229/*****************************************************************************
230 *
231 * Read to variable <value> from the PHY attached to device <devname>,
232 * use PHY address <addr> and register <reg>.
233 *
Andy Fleming896a7172011-10-31 09:46:13 -0500234 * This API is deprecated. Use phy_read on a phy_device found via phy_connect
235 *
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200236 * Returns:
237 * 0 on success
238 */
Wolfgang Denk934fcb62011-12-07 08:35:14 +0100239int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -0500240 unsigned short *value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200241{
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500242 struct mii_dev *bus;
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000243 int ret;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200244
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500245 bus = miiphy_get_active_dev(devname);
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000246 if (!bus)
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500247 return 1;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200248
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000249 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
250 if (ret < 0)
251 return 1;
252
253 *value = (unsigned short)ret;
254 return 0;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200255}
256
257/*****************************************************************************
258 *
259 * Write <value> to the PHY attached to device <devname>,
260 * use PHY address <addr> and register <reg>.
261 *
Andy Fleming896a7172011-10-31 09:46:13 -0500262 * This API is deprecated. Use phy_write on a phy_device found by phy_connect
263 *
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200264 * Returns:
265 * 0 on success
266 */
Wolfgang Denk934fcb62011-12-07 08:35:14 +0100267int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -0500268 unsigned short value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200269{
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500270 struct mii_dev *bus;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200271
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500272 bus = miiphy_get_active_dev(devname);
273 if (bus)
274 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200275
Mike Frysinger24a90082010-07-27 18:35:09 -0400276 return 1;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200277}
278
279/*****************************************************************************
280 *
281 * Print out list of registered MII capable devices.
282 */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500283void miiphy_listdev(void)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200284{
285 struct list_head *entry;
286 struct mii_dev *dev;
287
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500288 puts("MII devices: ");
289 list_for_each(entry, &mii_devs) {
290 dev = list_entry(entry, struct mii_dev, link);
291 printf("'%s' ", dev->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200292 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500293 puts("\n");
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200294
295 if (current_mii)
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500296 printf("Current device: '%s'\n", current_mii->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200297}
298
wdenkc6097192002-11-03 00:24:07 +0000299/*****************************************************************************
300 *
301 * Read the OUI, manufacture's model number, and revision number.
302 *
303 * OUI: 22 bits (unsigned int)
304 * Model: 6 bits (unsigned char)
305 * Revision: 4 bits (unsigned char)
306 *
Andy Fleming896a7172011-10-31 09:46:13 -0500307 * This API is deprecated.
308 *
wdenkc6097192002-11-03 00:24:07 +0000309 * Returns:
310 * 0 on success
311 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400312int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000313 unsigned char *model, unsigned char *rev)
314{
315 unsigned int reg = 0;
wdenkf4cec3f2003-12-06 23:20:41 +0000316 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000317
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500318 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
319 debug("PHY ID register 2 read failed\n");
320 return -1;
wdenkc6097192002-11-03 00:24:07 +0000321 }
wdenkf4cec3f2003-12-06 23:20:41 +0000322 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000323
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500324 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900325
wdenkc6097192002-11-03 00:24:07 +0000326 if (reg == 0xFFFF) {
327 /* No physical device present at this address */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500328 return -1;
wdenkc6097192002-11-03 00:24:07 +0000329 }
330
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500331 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
332 debug("PHY ID register 1 read failed\n");
333 return -1;
wdenkc6097192002-11-03 00:24:07 +0000334 }
wdenkf4cec3f2003-12-06 23:20:41 +0000335 reg |= tmp << 16;
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500336 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900337
Larry Johnson81b974b2007-10-31 11:21:29 -0500338 *oui = (reg >> 10);
339 *model = (unsigned char)((reg >> 4) & 0x0000003F);
340 *rev = (unsigned char)(reg & 0x0000000F);
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500341 return 0;
wdenkc6097192002-11-03 00:24:07 +0000342}
343
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500344#ifndef CONFIG_PHYLIB
wdenkc6097192002-11-03 00:24:07 +0000345/*****************************************************************************
346 *
347 * Reset the PHY.
Andy Fleming896a7172011-10-31 09:46:13 -0500348 *
349 * This API is deprecated. Use PHYLIB.
350 *
wdenkc6097192002-11-03 00:24:07 +0000351 * Returns:
352 * 0 on success
353 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400354int miiphy_reset(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000355{
356 unsigned short reg;
Stefan Roese2e536362010-02-02 13:43:48 +0100357 int timeout = 500;
wdenkc6097192002-11-03 00:24:07 +0000358
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500359 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
360 debug("PHY status read failed\n");
361 return -1;
Wolfgang Denk8ff63c22005-08-12 23:15:53 +0200362 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500363 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
364 debug("PHY reset failed\n");
365 return -1;
wdenkc6097192002-11-03 00:24:07 +0000366 }
wdenk2cefd152004-02-08 22:55:38 +0000367#ifdef CONFIG_PHY_RESET_DELAY
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500368 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
wdenk2cefd152004-02-08 22:55:38 +0000369#endif
wdenkc6097192002-11-03 00:24:07 +0000370 /*
371 * Poll the control register for the reset bit to go to 0 (it is
372 * auto-clearing). This should happen within 0.5 seconds per the
373 * IEEE spec.
374 */
wdenkc6097192002-11-03 00:24:07 +0000375 reg = 0x8000;
Stefan Roese2e536362010-02-02 13:43:48 +0100376 while (((reg & 0x8000) != 0) && timeout--) {
Mike Frysingerd63ee712010-12-23 15:40:12 -0500377 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
Stefan Roese2e536362010-02-02 13:43:48 +0100378 debug("PHY status read failed\n");
379 return -1;
wdenkc6097192002-11-03 00:24:07 +0000380 }
Stefan Roese2e536362010-02-02 13:43:48 +0100381 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000382 }
383 if ((reg & 0x8000) == 0) {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500384 return 0;
wdenkc6097192002-11-03 00:24:07 +0000385 } else {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500386 puts("PHY reset timed out\n");
387 return -1;
wdenkc6097192002-11-03 00:24:07 +0000388 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500389 return 0;
wdenkc6097192002-11-03 00:24:07 +0000390}
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500391#endif /* !PHYLIB */
wdenkc6097192002-11-03 00:24:07 +0000392
wdenkc6097192002-11-03 00:24:07 +0000393/*****************************************************************************
394 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500395 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000396 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400397int miiphy_speed(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000398{
Dongpo Lice290242016-08-22 21:03:29 +0800399 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000400
wdenkeec9a3d2004-03-23 23:20:24 +0000401#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500402 u16 btsr;
403
404 /*
405 * Check for 1000BASE-X. If it is supported, then assume that the speed
406 * is 1000.
407 */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500408 if (miiphy_is_1000base_x(devname, addr))
Larry Johnson966a80b2007-11-01 08:46:50 -0500409 return _1000BASET;
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500410
Larry Johnson966a80b2007-11-01 08:46:50 -0500411 /*
412 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
413 */
414 /* Check for 1000BASE-T. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500415 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
416 printf("PHY 1000BT status");
Larry Johnson966a80b2007-11-01 08:46:50 -0500417 goto miiphy_read_failed;
418 }
419 if (btsr != 0xFFFF &&
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500420 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
Larry Johnson966a80b2007-11-01 08:46:50 -0500421 return _1000BASET;
wdenkeec9a3d2004-03-23 23:20:24 +0000422#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000423
wdenke3a06802004-06-06 23:13:55 +0000424 /* Check Basic Management Control Register first. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500425 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
426 printf("PHY speed");
Larry Johnson966a80b2007-11-01 08:46:50 -0500427 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000428 }
wdenke3a06802004-06-06 23:13:55 +0000429 /* Check if auto-negotiation is on. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500430 if (bmcr & BMCR_ANENABLE) {
wdenke3a06802004-06-06 23:13:55 +0000431 /* Get auto-negotiation results. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500432 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
433 printf("PHY AN speed");
Larry Johnson966a80b2007-11-01 08:46:50 -0500434 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000435 }
Dongpo Lice290242016-08-22 21:03:29 +0800436
437 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
438 puts("PHY AN adv speed");
439 goto miiphy_read_failed;
440 }
441 return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000442 }
443 /* Get speed from basic control settings. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500444 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000445
Michael Zaidman6dbca5f2010-02-28 16:28:25 +0200446miiphy_read_failed:
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500447 printf(" read failed, assuming 10BASE-T\n");
Larry Johnson966a80b2007-11-01 08:46:50 -0500448 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000449}
450
wdenkc6097192002-11-03 00:24:07 +0000451/*****************************************************************************
452 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500453 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000454 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400455int miiphy_duplex(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000456{
Dongpo Lice290242016-08-22 21:03:29 +0800457 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000458
wdenkeec9a3d2004-03-23 23:20:24 +0000459#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500460 u16 btsr;
461
462 /* Check for 1000BASE-X. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500463 if (miiphy_is_1000base_x(devname, addr)) {
Larry Johnson966a80b2007-11-01 08:46:50 -0500464 /* 1000BASE-X */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500465 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
466 printf("1000BASE-X PHY AN duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500467 goto miiphy_read_failed;
wdenked2ac4b2004-03-14 18:23:55 +0000468 }
469 }
Larry Johnson966a80b2007-11-01 08:46:50 -0500470 /*
471 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
472 */
473 /* Check for 1000BASE-T. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500474 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
475 printf("PHY 1000BT status");
Larry Johnson966a80b2007-11-01 08:46:50 -0500476 goto miiphy_read_failed;
477 }
478 if (btsr != 0xFFFF) {
479 if (btsr & PHY_1000BTSR_1000FD) {
480 return FULL;
481 } else if (btsr & PHY_1000BTSR_1000HD) {
482 return HALF;
483 }
484 }
wdenkeec9a3d2004-03-23 23:20:24 +0000485#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000486
wdenke3a06802004-06-06 23:13:55 +0000487 /* Check Basic Management Control Register first. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500488 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
489 puts("PHY duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500490 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000491 }
wdenke3a06802004-06-06 23:13:55 +0000492 /* Check if auto-negotiation is on. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500493 if (bmcr & BMCR_ANENABLE) {
wdenke3a06802004-06-06 23:13:55 +0000494 /* Get auto-negotiation results. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500495 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
496 puts("PHY AN duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500497 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000498 }
Dongpo Lice290242016-08-22 21:03:29 +0800499
500 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
501 puts("PHY AN adv duplex");
502 goto miiphy_read_failed;
503 }
504 return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ?
Larry Johnson966a80b2007-11-01 08:46:50 -0500505 FULL : HALF;
wdenke3a06802004-06-06 23:13:55 +0000506 }
507 /* Get speed from basic control settings. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500508 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
Larry Johnson966a80b2007-11-01 08:46:50 -0500509
Michael Zaidman6dbca5f2010-02-28 16:28:25 +0200510miiphy_read_failed:
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500511 printf(" read failed, assuming half duplex\n");
Larry Johnson966a80b2007-11-01 08:46:50 -0500512 return HALF;
513}
wdenke3a06802004-06-06 23:13:55 +0000514
Larry Johnson966a80b2007-11-01 08:46:50 -0500515/*****************************************************************************
516 *
517 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
518 * 1000BASE-T, or on error.
519 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400520int miiphy_is_1000base_x(const char *devname, unsigned char addr)
Larry Johnson966a80b2007-11-01 08:46:50 -0500521{
522#if defined(CONFIG_PHY_GIGE)
523 u16 exsr;
524
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500525 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
526 printf("PHY extended status read failed, assuming no "
Larry Johnson966a80b2007-11-01 08:46:50 -0500527 "1000BASE-X\n");
528 return 0;
529 }
Mike Frysingerd63ee712010-12-23 15:40:12 -0500530 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
Larry Johnson966a80b2007-11-01 08:46:50 -0500531#else
532 return 0;
533#endif
wdenkc6097192002-11-03 00:24:07 +0000534}
535
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200536#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
wdenk49c3f672003-10-08 22:33:00 +0000537/*****************************************************************************
538 *
539 * Determine link status
540 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400541int miiphy_link(const char *devname, unsigned char addr)
wdenk49c3f672003-10-08 22:33:00 +0000542{
543 unsigned short reg;
544
wdenk145d2c12004-04-15 21:48:45 +0000545 /* dummy read; needed to latch some phys */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500546 (void)miiphy_read(devname, addr, MII_BMSR, &reg);
547 if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
548 puts("MII_BMSR read failed, assuming no link\n");
549 return 0;
wdenk49c3f672003-10-08 22:33:00 +0000550 }
551
552 /* Determine if a link is active */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500553 if ((reg & BMSR_LSTATUS) != 0) {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500554 return 1;
wdenk49c3f672003-10-08 22:33:00 +0000555 } else {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500556 return 0;
wdenk49c3f672003-10-08 22:33:00 +0000557 }
558}
559#endif