| Sandeep Sheriker Mallikarjun | 641b335 | 2019-09-27 13:08:52 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Configuation settings for the SAM9X60EK board. |
| 4 | * |
| 5 | * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries |
| 6 | * |
| 7 | * Author: Sandeep Sheriker M <sandeep.sheriker@microchip.com> |
| 8 | */ |
| 9 | |
| 10 | #ifndef __CONFIG_H__ |
| 11 | #define __CONFIG_H__ |
| 12 | |
| 13 | /* ARM asynchronous clock */ |
| 14 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
| 15 | #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ |
| 16 | |
| Sandeep Sheriker Mallikarjun | 641b335 | 2019-09-27 13:08:52 +0000 | [diff] [blame] | 17 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU |
| 18 | #define CONFIG_USART_ID 0 /* ignored in arm */ |
| 19 | |
| Sandeep Sheriker Mallikarjun | 641b335 | 2019-09-27 13:08:52 +0000 | [diff] [blame] | 20 | /* |
| Sandeep Sheriker Mallikarjun | 641b335 | 2019-09-27 13:08:52 +0000 | [diff] [blame] | 21 | * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) |
| 22 | * NB: in this case, USB 1.1 devices won't be recognized. |
| 23 | */ |
| 24 | |
| 25 | /* SDRAM */ |
| 26 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 27 | #define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */ |
| 28 | |
| Tudor Ambarus | e76c66a | 2019-09-27 13:09:07 +0000 | [diff] [blame] | 29 | /* NAND flash */ |
| 30 | #ifdef CONFIG_CMD_NAND |
| Tudor Ambarus | e76c66a | 2019-09-27 13:09:07 +0000 | [diff] [blame] | 31 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 32 | #define CONFIG_SYS_NAND_BASE 0x40000000 |
| 33 | #define CONFIG_SYS_NAND_MASK_ALE BIT(21) |
| 34 | #define CONFIG_SYS_NAND_MASK_CLE BIT(22) |
| 35 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 |
| 36 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 |
| Tudor Ambarus | e76c66a | 2019-09-27 13:09:07 +0000 | [diff] [blame] | 37 | #endif |
| 38 | |
| Sandeep Sheriker Mallikarjun | 641b335 | 2019-09-27 13:08:52 +0000 | [diff] [blame] | 39 | #endif |