blob: 5c1e0717a54544e2c133cb79f3e059d901135dc1 [file] [log] [blame]
Stefan Roese3e1f1b32005-08-01 16:49:12 +02001/*
2 * (C) Copyright 2000-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Stefan Roese3e1f1b32005-08-01 16:49:12 +02006 */
Stefan Roese3e1f1b32005-08-01 16:49:12 +02007
8#include <common.h>
9#include <asm/processor.h>
Stefan Roesea5d182e2007-08-14 14:44:41 +020010#include <asm/io.h>
11
12long int spd_sdram(void);
Stefan Roese3e1f1b32005-08-01 16:49:12 +020013
14int board_early_init_f(void)
15{
Stefan Roese707fd362009-09-24 09:55:50 +020016 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
17 mtdcr(UIC0ER, 0x00000000); /* disable all ints */
18 mtdcr(UIC0CR, 0x00000010);
19 mtdcr(UIC0PR, 0xFFFF7FF0); /* set int polarities */
20 mtdcr(UIC0TR, 0x00000010); /* set int trigger levels */
21 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
Stefan Roese3e1f1b32005-08-01 16:49:12 +020022
Stefan Roesea5d182e2007-08-14 14:44:41 +020023 /*
24 * Configure CPC0_PCI to enable PerWE as output
25 * and enable the internal PCI arbiter if selected
26 */
27 if (in_8((void *)FPGA_REG1) & FPGA_REG1_PCI_INT_ARB)
Stefan Roese918010a2009-09-09 16:25:29 +020028 mtdcr(CPC0_PCI, CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
Stefan Roesea5d182e2007-08-14 14:44:41 +020029 else
Stefan Roese918010a2009-09-09 16:25:29 +020030 mtdcr(CPC0_PCI, CPC0_PCI_HOST_CFG_EN);
Stefan Roesea5d182e2007-08-14 14:44:41 +020031
Stefan Roese3e1f1b32005-08-01 16:49:12 +020032 return 0;
33}
34
35/*
36 * Check Board Identity:
37 */
38int checkboard(void)
39{
Wolfgang Denk5c1cfee2011-05-04 10:32:28 +000040 char buf[64];
41 int i = getenv_f("serial#", buf, sizeof(buf));
Stefan Roese3e1f1b32005-08-01 16:49:12 +020042
43 puts("Board: Bubinga - AMCC PPC405EP Evaluation Board");
44
Wolfgang Denk5c1cfee2011-05-04 10:32:28 +000045 if (i > 0) {
Stefan Roese3e1f1b32005-08-01 16:49:12 +020046 puts(", serial# ");
Wolfgang Denk5c1cfee2011-05-04 10:32:28 +000047 puts(buf);
Stefan Roese3e1f1b32005-08-01 16:49:12 +020048 }
49 putc('\n');
50
51 return (0);
52}
53
Stefan Roese3e1f1b32005-08-01 16:49:12 +020054/* -------------------------------------------------------------------------
55 initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
56 the necessary info for SDRAM controller configuration
57 ------------------------------------------------------------------------- */
Becky Brucebd99ae72008-06-09 16:03:40 -050058phys_size_t initdram(int board_type)
Stefan Roese3e1f1b32005-08-01 16:49:12 +020059{
60 long int ret;
61
62 ret = spd_sdram();
63 return ret;
64}