blob: bccde7331715ed27e4fa0bdaa01540f2a40fe5ee [file] [log] [blame]
Stefano Babice9a05792012-10-10 21:11:43 +00001/*
2 * (C) Copyright 2002
3 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
4 *
5 * (C) Copyright 2010
6 * Texas Instruments, <www.ti.com>
7 * Aneesh V <aneesh@ti.com>
8 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
Stefano Babice9a05792012-10-10 21:11:43 +000010 */
11
12MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
13 LENGTH = CONFIG_SPL_MAX_SIZE }
14MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
15 LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
16
17OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
18OUTPUT_ARCH(arm)
19ENTRY(_start)
20SECTIONS
21{
22 .text :
23 {
24 __start = .;
Benoît Thébaudeau3954db82013-04-11 09:36:03 +000025 arch/arm/cpu/arm1136/start.o (.text*)
Stefano Babice9a05792012-10-10 21:11:43 +000026 *(.text*)
27 } >.sram
28
29 . = ALIGN(4);
30 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
31
32 . = ALIGN(4);
33 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
34 . = ALIGN(4);
35 __image_copy_end = .;
36 _end = .;
37
38 .bss :
39 {
40 . = ALIGN(4);
41 __bss_start = .;
42 *(.bss*)
43 . = ALIGN(4);
Simon Glassed70c8f2013-03-14 06:54:53 +000044 __bss_end = .;
Stefano Babice9a05792012-10-10 21:11:43 +000045 } >.sdram
46}