Gary Jennejohn | ffd0be3 | 2007-08-31 14:29:04 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
| 3 | * Gary Jennejohn, DENX Software Engineering, garyj@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | * |
| 23 | */ |
| 24 | /* sil680.c - ide support functions for the Sil0680A controller */ |
| 25 | |
| 26 | /* |
| 27 | * The following parameters must be defined in the configuration file |
| 28 | * of the target board: |
| 29 | * |
Jean-Christophe PLAGNIOL-VILLARD | 92dbcc3 | 2008-08-13 01:40:39 +0200 | [diff] [blame] | 30 | * #define CONFIG_IDE_SIL680 |
Gary Jennejohn | ffd0be3 | 2007-08-31 14:29:04 +0200 | [diff] [blame] | 31 | * |
| 32 | * #define CONFIG_PCI_PNP |
| 33 | * NOTE it may also be necessary to define this if the default of 8 is |
| 34 | * incorrect for the target board (e.g. the sequoia board requires 0). |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 35 | * #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 0 |
Gary Jennejohn | ffd0be3 | 2007-08-31 14:29:04 +0200 | [diff] [blame] | 36 | * |
| 37 | * #define CONFIG_CMD_IDE |
| 38 | * #undef CONFIG_IDE_8xx_DIRECT |
| 39 | * #undef CONFIG_IDE_LED |
| 40 | * #undef CONFIG_IDE_RESET |
| 41 | * #define CONFIG_IDE_PREINIT |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 42 | * #define CONFIG_SYS_IDE_MAXBUS 2 - modify to suit |
| 43 | * #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) - modify to suit |
| 44 | * #define CONFIG_SYS_ATA_BASE_ADDR 0 |
| 45 | * #define CONFIG_SYS_ATA_IDE0_OFFSET 0 |
| 46 | * #define CONFIG_SYS_ATA_IDE1_OFFSET 0 |
| 47 | * #define CONFIG_SYS_ATA_DATA_OFFSET 0 |
| 48 | * #define CONFIG_SYS_ATA_REG_OFFSET 0 |
| 49 | * #define CONFIG_SYS_ATA_ALT_OFFSET 0x0004 |
Gary Jennejohn | ffd0be3 | 2007-08-31 14:29:04 +0200 | [diff] [blame] | 50 | * |
| 51 | * The mapping for PCI IO-space. |
| 52 | * NOTE this is the value for the sequoia board. Modify to suit. |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 53 | * #define CONFIG_SYS_PCI0_IO_SPACE 0xE8000000 |
Gary Jennejohn | ffd0be3 | 2007-08-31 14:29:04 +0200 | [diff] [blame] | 54 | */ |
| 55 | |
| 56 | #include <common.h> |
Gary Jennejohn | ffd0be3 | 2007-08-31 14:29:04 +0200 | [diff] [blame] | 57 | #include <ata.h> |
| 58 | #include <ide.h> |
| 59 | #include <pci.h> |
| 60 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 61 | extern ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS]; |
Gary Jennejohn | ffd0be3 | 2007-08-31 14:29:04 +0200 | [diff] [blame] | 62 | |
| 63 | int ide_preinit (void) |
| 64 | { |
| 65 | int status; |
| 66 | pci_dev_t devbusfn; |
| 67 | int l; |
| 68 | |
| 69 | status = 1; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 70 | for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) { |
Gary Jennejohn | ffd0be3 | 2007-08-31 14:29:04 +0200 | [diff] [blame] | 71 | ide_bus_offset[l] = -ATA_STATUS; |
| 72 | } |
| 73 | devbusfn = pci_find_device (0x1095, 0x0680, 0); |
| 74 | if (devbusfn != -1) { |
| 75 | status = 0; |
| 76 | |
| 77 | pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, |
| 78 | (u32 *) &ide_bus_offset[0]); |
| 79 | ide_bus_offset[0] &= 0xfffffff8; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 80 | ide_bus_offset[0] += CONFIG_SYS_PCI0_IO_SPACE; |
Gary Jennejohn | ffd0be3 | 2007-08-31 14:29:04 +0200 | [diff] [blame] | 81 | pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_2, |
| 82 | (u32 *) &ide_bus_offset[1]); |
| 83 | ide_bus_offset[1] &= 0xfffffff8; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 84 | ide_bus_offset[1] += CONFIG_SYS_PCI0_IO_SPACE; |
Gary Jennejohn | ffd0be3 | 2007-08-31 14:29:04 +0200 | [diff] [blame] | 85 | /* init various things - taken from the Linux driver */ |
| 86 | /* set PIO mode */ |
| 87 | pci_write_config_byte(devbusfn, 0x80, 0x00); |
| 88 | pci_write_config_byte(devbusfn, 0x84, 0x00); |
| 89 | /* IDE0 */ |
| 90 | pci_write_config_byte(devbusfn, 0xA1, 0x02); |
| 91 | pci_write_config_word(devbusfn, 0xA2, 0x328A); |
| 92 | pci_write_config_dword(devbusfn, 0xA4, 0x62DD62DD); |
| 93 | pci_write_config_dword(devbusfn, 0xA8, 0x43924392); |
| 94 | pci_write_config_dword(devbusfn, 0xAC, 0x40094009); |
| 95 | /* IDE1 */ |
| 96 | pci_write_config_byte(devbusfn, 0xB1, 0x02); |
| 97 | pci_write_config_word(devbusfn, 0xB2, 0x328A); |
| 98 | pci_write_config_dword(devbusfn, 0xB4, 0x62DD62DD); |
| 99 | pci_write_config_dword(devbusfn, 0xB8, 0x43924392); |
| 100 | pci_write_config_dword(devbusfn, 0xBC, 0x40094009); |
| 101 | } |
| 102 | return (status); |
| 103 | } |
| 104 | |
| 105 | void ide_set_reset (int flag) { |
| 106 | return; |
| 107 | } |