blob: 44870e8c90a519678d9dd164a3ca126951253764 [file] [log] [blame]
Daniel Hellstrom9d7c6b22008-03-28 09:47:00 +01001/*
2 * (C) Copyright 2008,
3 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25#ifndef __SPARC_CACHE_H__
26#define __SPARC_CACHE_H__
27
28#include <linux/config.h>
29#include <asm/processor.h>
30
Anton Staaffb2df082011-10-17 16:46:08 -070031/*
32 * If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment. Otherwise
33 * use 32-bytes, the cacheline size for Sparc.
34 */
35#ifdef CONFIG_SYS_CACHELINE_SIZE
36#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
37#else
38#define ARCH_DMA_MINALIGN 32
39#endif
40
Daniel Hellstrom9d7c6b22008-03-28 09:47:00 +010041#endif