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Vishwanathrao Badarkhe, Manish213c0eb2013-05-29 21:55:11 +00001/*
2 * Pinmux configurations for the DA830 SoCs
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <common.h>
22#include <asm/arch/davinci_misc.h>
23#include <asm/arch/hardware.h>
24#include <asm/arch/pinmux_defs.h>
25
26/* SPI0 pin muxer settings */
27const struct pinmux_config spi0_pins_base[] = {
28 { pinmux(7), 1, 3 }, /* SPI0_SOMI */
29 { pinmux(7), 1, 4 }, /* SPI0_SIMO */
30 { pinmux(7), 1, 6 } /* SPI0_CLK */
31};
32
33const struct pinmux_config spi0_pins_scs0[] = {
34 { pinmux(7), 1, 7 } /* SPI0_SCS[0] */
35};
36
37const struct pinmux_config spi0_pins_ena[] = {
38 { pinmux(7), 1, 5 } /* SPI0_ENA */
39};
40
41/* NAND pin muxer settings */
42const struct pinmux_config emifa_pins_cs0[] = {
43 { pinmux(18), 1, 2 } /* EMA_CS[0] */
44};
45
46const struct pinmux_config emifa_pins_cs2[] = {
47 { pinmux(18), 1, 3 } /* EMA_CS[2] */
48};
49
50const struct pinmux_config emifa_pins_cs3[] = {
51 { pinmux(18), 1, 4 } /* EMA_CS[3] */
52};
53
54#ifdef CONFIG_USE_NAND
55const struct pinmux_config emifa_pins[] = {
56 { pinmux(13), 1, 6 }, /* EMA_D[0] */
57 { pinmux(13), 1, 7 }, /* EMA_D[1] */
58 { pinmux(14), 1, 0 }, /* EMA_D[2] */
59 { pinmux(14), 1, 1 }, /* EMA_D[3] */
60 { pinmux(14), 1, 2 }, /* EMA_D[4] */
61 { pinmux(14), 1, 3 }, /* EMA_D[5] */
62 { pinmux(14), 1, 4 }, /* EMA_D[6] */
63 { pinmux(14), 1, 5 }, /* EMA_D[7] */
64 { pinmux(14), 1, 6 }, /* EMA_D[8] */
65 { pinmux(14), 1, 7 }, /* EMA_D[9] */
66 { pinmux(15), 1, 0 }, /* EMA_D[10] */
67 { pinmux(15), 1, 1 }, /* EMA_D[11] */
68 { pinmux(15), 1, 2 }, /* EMA_D[12] */
69 { pinmux(15), 1, 3 }, /* EMA_D[13] */
70 { pinmux(15), 1, 4 }, /* EMA_D[14] */
71 { pinmux(15), 1, 5 }, /* EMA_D[15] */
72 { pinmux(15), 1, 6 }, /* EMA_A[0] */
73 { pinmux(15), 1, 7 }, /* EMA_A[1] */
74 { pinmux(16), 1, 0 }, /* EMA_A[2] */
75 { pinmux(16), 1, 1 }, /* EMA_A[3] */
76 { pinmux(16), 1, 2 }, /* EMA_A[4] */
77 { pinmux(16), 1, 3 }, /* EMA_A[5] */
78 { pinmux(16), 1, 4 }, /* EMA_A[6] */
79 { pinmux(16), 1, 5 }, /* EMA_A[7] */
80 { pinmux(16), 1, 6 }, /* EMA_A[8] */
81 { pinmux(16), 1, 7 }, /* EMA_A[9] */
82 { pinmux(17), 1, 0 }, /* EMA_A[10] */
83 { pinmux(17), 1, 1 }, /* EMA_A[11] */
84 { pinmux(17), 1, 2 }, /* EMA_A[12] */
85 { pinmux(17), 1, 3 }, /* EMA_BA[1] */
86 { pinmux(17), 1, 4 }, /* EMA_BA[0] */
87 { pinmux(17), 1, 5 }, /* EMA_CLK */
88 { pinmux(17), 1, 6 }, /* EMA_SDCKE */
89 { pinmux(17), 1, 7 }, /* EMA_CAS */
90 { pinmux(18), 1, 0 }, /* EMA_CAS */
91 { pinmux(18), 1, 1 }, /* EMA_WE */
92 { pinmux(18), 1, 5 }, /* EMA_OE */
93 { pinmux(18), 1, 6 }, /* EMA_WE_DQM[1] */
94 { pinmux(18), 1, 7 }, /* EMA_WE_DQM[0] */
95 { pinmux(10), 1, 0 } /* Tristate */
96};
97#endif
98
99/* EMAC PHY interface pins */
100const struct pinmux_config emac_pins_rmii[] = {
101 { pinmux(10), 2, 1 }, /* RMII_TXD[0] */
102 { pinmux(10), 2, 2 }, /* RMII_TXD[1] */
103 { pinmux(10), 2, 3 }, /* RMII_TXEN */
104 { pinmux(10), 2, 4 }, /* RMII_CRS_DV */
105 { pinmux(10), 2, 5 }, /* RMII_RXD[0] */
106 { pinmux(10), 2, 6 }, /* RMII_RXD[1] */
107 { pinmux(10), 2, 7 } /* RMII_RXER */
108};
109
110const struct pinmux_config emac_pins_mdio[] = {
111 { pinmux(11), 2, 0 }, /* MDIO_CLK */
112 { pinmux(11), 2, 1 } /* MDIO_D */
113};
114
115const struct pinmux_config emac_pins_rmii_clk_source[] = {
116 { pinmux(9), 0, 5 } /* ref.clk from external source */
117};
118
119/* UART2 pin muxer settings */
120const struct pinmux_config uart2_pins_txrx[] = {
121 { pinmux(8), 2, 7 }, /* UART2_RXD */
122 { pinmux(9), 2, 0 } /* UART2_TXD */
123};
124
125/* I2C0 pin muxer settings */
126const struct pinmux_config i2c0_pins[] = {
127 { pinmux(8), 2, 3 }, /* I2C0_SDA */
128 { pinmux(8), 2, 4 } /* I2C0_SCL */
129};
130
131/* USB0_DRVVBUS pin muxer settings */
132const struct pinmux_config usb_pins[] = {
133 { pinmux(9), 1, 1 } /* USB0_DRVVBUS */
134};
135
136#ifdef CONFIG_DAVINCI_MMC
137/* MMC0 pin muxer settings */
138const struct pinmux_config mmc0_pins_8bit[] = {
139 { pinmux(15), 2, 7 }, /* MMCSD0_CLK */
140 { pinmux(16), 2, 0 }, /* MMCSD0_CMD */
141 { pinmux(13), 2, 6 }, /* MMCSD0_DAT_0 */
142 { pinmux(13), 2, 7 }, /* MMCSD0_DAT_1 */
143 { pinmux(14), 2, 0 }, /* MMCSD0_DAT_2 */
144 { pinmux(14), 2, 1 }, /* MMCSD0_DAT_3 */
145 { pinmux(14), 2, 2 }, /* MMCSD0_DAT_4 */
146 { pinmux(14), 2, 3 }, /* MMCSD0_DAT_5 */
147 { pinmux(14), 2, 4 }, /* MMCSD0_DAT_6 */
148 { pinmux(14), 2, 5 } /* MMCSD0_DAT_7 */
149 /* DA830 supports 8-bit mode */
150};
151#endif