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Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +02001/*
2 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +02004 * Lead Tech Design <www.leadtechdesign.com>
5 *
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +00006 * (C) Copyright 2009-2011
Daniel Gorsulowski96d1b472009-06-30 23:03:33 +02007 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
8 * esd electronic system design gmbh <www.esd.eu>
9 *
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020010 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#include <common.h>
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +000030#include <asm/io.h>
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020031#include <asm/arch/at91_common.h>
32#include <asm/arch/at91_pmc.h>
Xu, Hong4fae89c2011-06-10 21:31:25 +000033#include <asm/arch/gpio.h>
34
35/*
36 * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
37 * peripheral pins. Good to have if hardware is soldered optionally
38 * or in case of SPI no slave is selected. Avoid lines to float
39 * needlessly. Use a short local PUP define.
40 *
41 * Due to errata "TXD floats when CTS is inactive" pullups are always
42 * on for TXD pins.
43 */
44#ifdef CONFIG_AT91_GPIO_PULLUP
45# define PUP CONFIG_AT91_GPIO_PULLUP
46#else
47# define PUP 0
48#endif
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020049
50void at91_serial0_hw_init(void)
51{
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +000052 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010053
Jens Scharsigb49d15c2010-02-03 22:46:46 +010054 at91_set_a_periph(AT91_PIO_PORTA, 26, 1); /* TXD0 */
Xu, Hong4fae89c2011-06-10 21:31:25 +000055 at91_set_a_periph(AT91_PIO_PORTA, 27, PUP); /* RXD0 */
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +000056 writel(1 << ATMEL_ID_USART0, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020057}
58
59void at91_serial1_hw_init(void)
60{
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +000061 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010062
Jens Scharsigb49d15c2010-02-03 22:46:46 +010063 at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* TXD1 */
Xu, Hong4fae89c2011-06-10 21:31:25 +000064 at91_set_a_periph(AT91_PIO_PORTD, 1, PUP); /* RXD1 */
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +000065 writel(1 << ATMEL_ID_USART1, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020066}
67
68void at91_serial2_hw_init(void)
69{
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +000070 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010071
Jens Scharsigb49d15c2010-02-03 22:46:46 +010072 at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* TXD2 */
Xu, Hong4fae89c2011-06-10 21:31:25 +000073 at91_set_a_periph(AT91_PIO_PORTD, 3, PUP); /* RXD2 */
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +000074 writel(1 << ATMEL_ID_USART2, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020075}
76
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +000077void at91_seriald_hw_init(void)
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020078{
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +000079 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010080
Xu, Hong4fae89c2011-06-10 21:31:25 +000081 at91_set_a_periph(AT91_PIO_PORTC, 30, PUP); /* DRXD */
Jens Scharsigb49d15c2010-02-03 22:46:46 +010082 at91_set_a_periph(AT91_PIO_PORTC, 31, 1); /* DTXD */
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +000083 writel(1 << ATMEL_ID_SYS, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020084}
85
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +000086#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020087void at91_spi0_hw_init(unsigned long cs_mask)
88{
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +000089 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010090
Xu, Hong4fae89c2011-06-10 21:31:25 +000091 at91_set_b_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */
92 at91_set_b_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */
93 at91_set_b_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020094
95 /* Enable clock */
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +000096 writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020097
98 if (cs_mask & (1 << 0)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010099 at91_set_b_periph(AT91_PIO_PORTA, 5, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200100 }
101 if (cs_mask & (1 << 1)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100102 at91_set_b_periph(AT91_PIO_PORTA, 3, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200103 }
104 if (cs_mask & (1 << 2)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100105 at91_set_b_periph(AT91_PIO_PORTA, 4, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200106 }
107 if (cs_mask & (1 << 3)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100108 at91_set_b_periph(AT91_PIO_PORTB, 11, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200109 }
110 if (cs_mask & (1 << 4)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100111 at91_set_pio_output(AT91_PIO_PORTA, 5, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200112 }
113 if (cs_mask & (1 << 5)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100114 at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200115 }
116 if (cs_mask & (1 << 6)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100117 at91_set_pio_output(AT91_PIO_PORTA, 4, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200118 }
119 if (cs_mask & (1 << 7)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100120 at91_set_pio_output(AT91_PIO_PORTB, 11, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200121 }
122}
123
124void at91_spi1_hw_init(unsigned long cs_mask)
125{
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +0000126 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +0100127
Xu, Hong4fae89c2011-06-10 21:31:25 +0000128 at91_set_a_periph(AT91_PIO_PORTB, 12, PUP); /* SPI1_MISO */
129 at91_set_a_periph(AT91_PIO_PORTB, 13, PUP); /* SPI1_MOSI */
130 at91_set_a_periph(AT91_PIO_PORTB, 14, PUP); /* SPI1_SPCK */
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200131
132 /* Enable clock */
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +0000133 writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200134
135 if (cs_mask & (1 << 0)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100136 at91_set_a_periph(AT91_PIO_PORTB, 15, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200137 }
138 if (cs_mask & (1 << 1)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100139 at91_set_a_periph(AT91_PIO_PORTB, 16, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200140 }
141 if (cs_mask & (1 << 2)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100142 at91_set_a_periph(AT91_PIO_PORTB, 17, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200143 }
144 if (cs_mask & (1 << 3)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100145 at91_set_a_periph(AT91_PIO_PORTB, 18, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200146 }
147 if (cs_mask & (1 << 4)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100148 at91_set_pio_output(AT91_PIO_PORTB, 15, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200149 }
150 if (cs_mask & (1 << 5)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100151 at91_set_pio_output(AT91_PIO_PORTB, 16, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200152 }
153 if (cs_mask & (1 << 6)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100154 at91_set_pio_output(AT91_PIO_PORTB, 17, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200155 }
156 if (cs_mask & (1 << 7)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100157 at91_set_pio_output(AT91_PIO_PORTB, 18, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200158 }
159}
160#endif
161
162#ifdef CONFIG_MACB
163void at91_macb_hw_init(void)
164{
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100165 at91_set_a_periph(AT91_PIO_PORTE, 21, 0); /* ETXCK_EREFCK */
166 at91_set_b_periph(AT91_PIO_PORTC, 25, 0); /* ERXDV */
167 at91_set_a_periph(AT91_PIO_PORTE, 25, 0); /* ERX0 */
168 at91_set_a_periph(AT91_PIO_PORTE, 26, 0); /* ERX1 */
169 at91_set_a_periph(AT91_PIO_PORTE, 27, 0); /* ERXER */
170 at91_set_a_periph(AT91_PIO_PORTE, 28, 0); /* ETXEN */
171 at91_set_a_periph(AT91_PIO_PORTE, 23, 0); /* ETX0 */
172 at91_set_a_periph(AT91_PIO_PORTE, 24, 0); /* ETX1 */
173 at91_set_a_periph(AT91_PIO_PORTE, 30, 0); /* EMDIO */
174 at91_set_a_periph(AT91_PIO_PORTE, 29, 0); /* EMDC */
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200175
176#ifndef CONFIG_RMII
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100177 at91_set_a_periph(AT91_PIO_PORTE, 22, 0); /* ECRS */
178 at91_set_b_periph(AT91_PIO_PORTC, 26, 0); /* ECOL */
179 at91_set_b_periph(AT91_PIO_PORTC, 22, 0); /* ERX2 */
180 at91_set_b_periph(AT91_PIO_PORTC, 23, 0); /* ERX3 */
181 at91_set_b_periph(AT91_PIO_PORTC, 27, 0); /* ERXCK */
182 at91_set_b_periph(AT91_PIO_PORTC, 20, 0); /* ETX2 */
183 at91_set_b_periph(AT91_PIO_PORTC, 21, 0); /* ETX3 */
184 at91_set_b_periph(AT91_PIO_PORTC, 24, 0); /* ETXER */
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200185#endif
186}
187#endif
188
189#ifdef CONFIG_USB_OHCI_NEW
190void at91_uhp_hw_init(void)
191{
192 /* Enable VBus on UHP ports */
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100193 at91_set_pio_output(AT91_PIO_PORTA, 21, 0);
194 at91_set_pio_output(AT91_PIO_PORTA, 24, 0);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200195}
196#endif
Daniel Gorsulowski96d1b472009-06-30 23:03:33 +0200197
198#ifdef CONFIG_AT91_CAN
199void at91_can_hw_init(void)
200{
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +0000201 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +0100202
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100203 at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* CAN_TX */
204 at91_set_a_periph(AT91_PIO_PORTA, 14, 1); /* CAN_RX */
Daniel Gorsulowski96d1b472009-06-30 23:03:33 +0200205
206 /* Enable clock */
Daniel Gorsulowskibbe11692011-01-20 23:12:15 +0000207 writel(1 << ATMEL_ID_CAN, &pmc->pcer);
Daniel Gorsulowski96d1b472009-06-30 23:03:33 +0200208}
209#endif