Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / d6d7adb02e08e070859ebab8d891f9206ea68a23 / . / configs / P1010RDB-PA_NOR_defconfig
blob: 8db09ba2b83f4b55dc6886cc64bb46a831fafbef [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_PPC=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0xEFF40000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]3CONFIG_SYS_MALLOC_LEN=0x100000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]4CONFIG_ENV_SIZE=0x2000
5CONFIG_ENV_SECT_SIZE=0x20000
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]6CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]7CONFIG_MPC85xx=y
York Sun7f945ca2016-11-16 13:30:06 -0800[diff] [blame]8CONFIG_TARGET_P1010RDB_PA=y
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]9CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]10CONFIG_FIT=y
11CONFIG_FIT_VERBOSE=y
12CONFIG_OF_BOARD_SETUP=y
13CONFIG_OF_STDOUT_VIA_ALIAS=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]14CONFIG_BOOTDELAY=10
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]15CONFIG_USE_BOOTCOMMAND=y
16CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]17CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]18CONFIG_BOARD_EARLY_INIT_F=y
Mario Six75b23ed2018-03-28 14:38:15 +0200[diff] [blame]19CONFIG_BOARD_EARLY_INIT_R=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]20CONFIG_HUSH_PARSER=y
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]21CONFIG_CMD_IMLS=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]22CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
23CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]24CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]25CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]26CONFIG_CMD_USB=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]27CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]28CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]29CONFIG_CMD_EXT2=y
30CONFIG_CMD_FAT=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]31CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
32CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]33CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]34CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]35CONFIG_ENV_IS_IN_FLASH=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]36CONFIG_ENV_ADDR=0xEFF20000
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]37CONFIG_DM=y
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]38CONFIG_FSL_CAAM=y
Tom Rinif7246c22021-08-21 13:50:17 -0400[diff] [blame]39CONFIG_DDR_CLK_FREQ=66666666
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]40CONFIG_DM_I2C=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]41CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rinib1b13072021-08-18 23:12:37 -0400[diff] [blame]42CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rinibe94c762021-08-18 23:12:35 -0400[diff] [blame]43CONFIG_SYS_I2C_FSL=y
44CONFIG_SYS_FSL_I2C_OFFSET=0x3000
45CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
46CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]47CONFIG_FSL_ESDHC=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]48CONFIG_MTD=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]49CONFIG_MTD_NOR_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]50CONFIG_FLASH_CFI_DRIVER=y
51CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
52CONFIG_SYS_FLASH_CFI=y
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]53CONFIG_DM_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]54CONFIG_SF_DEFAULT_SPEED=10000000
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]55CONFIG_SPI_FLASH_SPANSION=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]56CONFIG_PHY_ATHEROS=y
57CONFIG_PHY_BROADCOM=y
58CONFIG_PHY_DAVICOM=y
59CONFIG_PHY_LXT=y
Mario Sixf504d1a2018-04-27 14:52:21 +0200[diff] [blame]60CONFIG_PHY_MARVELL=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]61CONFIG_PHY_NATSEMI=y
62CONFIG_PHY_REALTEK=y
63CONFIG_PHY_SMSC=y
64CONFIG_PHY_VITESSE=y
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]65CONFIG_DM_ETH=y
66CONFIG_DM_MDIO=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]67CONFIG_PHY_GIGE=y
Simon Glass9008a5b2015-08-19 09:33:43 -0600[diff] [blame]68CONFIG_E1000=y
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]69CONFIG_MII=y
70CONFIG_TSEC_ENET=y
Hou Zhiqiangaa27f172020-05-01 19:06:29 +0800[diff] [blame]71CONFIG_PCIE_FSL=y
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]72CONFIG_DM_RTC=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]73CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]74CONFIG_SPI=y
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]75CONFIG_DM_SPI=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]76CONFIG_FSL_ESPI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]77CONFIG_USB=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]78CONFIG_USB_EHCI_FSL=y